s6.m

Gives all the matlab codes for dynamic simulation of electric machinery by Chee-Mun Ong

add_line([sys,'/','Qaxis'],[640,225;695,225;695,90;80,90;80,120;95,120])
add_line([sys,'/','Qaxis'],[640,225;695,225;695,365;75,365;75,325;100,325])
add_line([sys,'/','Qaxis'],[640,225;695,225;695,180;425,180;425,150;445,150])
add_line([sys,'/','Qaxis'],[375,150;405,150;405,125;445,125])
add_line([sys,'/','Qaxis'],[475,140;490,140])
add_line([sys,'/','Qaxis'],[470,225;480,225])
add_line([sys,'/','Qaxis'],[375,150;405,150;405,210;440,210])
add_line([sys,'/','Qaxis'],[330,300;340,300])
add_line([sys,'/','Qaxis'],[325,150;335,150])
add_line([sys,'/','Qaxis'],[125,150;130,150])
add_line([sys,'/','Qaxis'],[590,140;730,140])
add_line([sys,'/','Qaxis'],[375,150;405,150;405,75;730,75])
add_line([sys,'/','Qaxis'],[75,150;95,150])
add_line([sys,'/','Qaxis'],[70,300;100,300])
add_line([sys,'/','Qaxis'],[590,315;730,315])
add_line([sys,'/','Qaxis'],[380,300;415,300;415,270;730,270])


%     Finished composite block 'Qaxis'.

set_param([sys,'/','Qaxis'],...
		'position',[335,178,370,247])


%     Subsystem  'ExtConn'.

new_system([sys,'/','ExtConn'])
set_param([sys,'/','ExtConn'],'Location',[81,184,933,743])

add_block('built-in/Logical Operator',[sys,'/',['ExtConn/Logical',13,'Operator3']])
set_param([sys,'/',['ExtConn/Logical',13,'Operator3']],...
		'Operator','AND',...
		'position',[580,320,610,360])

add_block('built-in/Switch',[sys,'/','ExtConn/Switch'])
set_param([sys,'/','ExtConn/Switch'],...
		'Threshold','0.5',...
		'position',[570,128,590,182])

add_block('built-in/Note',[sys,'/','ExtConn/Vcap'])
set_param([sys,'/','ExtConn/Vcap'],...
		'position',[520,110,525,115])

add_block('built-in/Outport',[sys,'/','ExtConn/out_Vcap'])
set_param([sys,'/','ExtConn/out_Vcap'],...
		'Port','3',...
		'position',[785,190,805,210])

add_block('built-in/Scope',[sys,'/','ExtConn/Scope1'])
set_param([sys,'/','ExtConn/Scope1'],...
		'Vgain','300.000000',...
		'Hgain','2.000000',...
		'Vmax','600.000000',...
		'Hmax','4.000000',...
		'Window',[244,752,972,1007],...
		'position',[735,380,765,410])

add_block('built-in/Outport',[sys,'/',['ExtConn/out_v''ds']])
set_param([sys,'/',['ExtConn/out_v''ds']],...
		'Port','2',...
		'position',[790,115,810,135])

add_block('built-in/Note',[sys,'/',['ExtConn/v''ds']])
set_param([sys,'/',['ExtConn/v''ds']],...
		'position',[765,105,770,110])

add_block('built-in/Outport',[sys,'/','ExtConn/out_vqs'])
set_param([sys,'/','ExtConn/out_vqs'],...
		'position',[765,40,785,60])

add_block('built-in/Switch',[sys,'/','ExtConn/Switch3'])
set_param([sys,'/','ExtConn/Switch3'],...
		'Threshold','0.5',...
		'position',[725,98,745,152])

add_block('built-in/Sum',[sys,'/','ExtConn/Sum2'])
set_param([sys,'/','ExtConn/Sum2'],...
		'inputs','+-',...
		'position',[640,126,660,164])

add_block('built-in/Inport',[sys,'/',['ExtConn/in_dpsidr''//dt']])
set_param([sys,'/',['ExtConn/in_dpsidr''//dt']],...
		'Port','4',...
		'position',[115,445,135,465])

add_block('built-in/Logical Operator',[sys,'/',['ExtConn/Logical',13,'Operator1']])
set_param([sys,'/',['ExtConn/Logical',13,'Operator1']],...
		'orientation',2,...
		'Operator','AND',...
		'position',[355,274,395,301])


%     Subsystem  'ExtConn/Latch1'.

new_system([sys,'/','ExtConn/Latch1'])
set_param([sys,'/','ExtConn/Latch1'],'Location',[102,336,551,502])

add_block('built-in/Fcn',[sys,'/','ExtConn/Latch1/Fcn'])
set_param([sys,'/','ExtConn/Latch1/Fcn'],...
		'orientation',2,...
		'Expr','u[1]>.2',...
		'position',[170,123,205,147])

add_block('built-in/Demux',[sys,'/','ExtConn/Latch1/Demux'])
set_param([sys,'/','ExtConn/Latch1/Demux'],...
		'outputs','2',...
		'position',[275,55,315,90])

add_block('built-in/Combinatorial Logic',[sys,'/','ExtConn/Latch1/Logic'])
set_param([sys,'/','ExtConn/Latch1/Logic'],...
		'Truth Table','[0 1;1 0;0 1;0 1;1 0;1 0;0 0;0 0]',...
		'position',[195,55,250,95])

add_block('built-in/Transport Delay',[sys,'/','ExtConn/Latch1/Transport Delay'])
set_param([sys,'/','ExtConn/Latch1/Transport Delay'],...
		'orientation',2,...
		'Initial Input','ini',...
		'position',[250,120,295,150])

add_block('built-in/Outport',[sys,'/','ExtConn/Latch1/out_2'])
set_param([sys,'/','ExtConn/Latch1/out_2'],...
		'Port','2',...
		'position',[395,70,415,90])

add_block('built-in/Outport',[sys,'/','ExtConn/Latch1/out_1'])
set_param([sys,'/','ExtConn/Latch1/out_1'],...
		'position',[355,55,375,75])

add_block('built-in/Mux',[sys,'/','ExtConn/Latch1/Mux'])
set_param([sys,'/','ExtConn/Latch1/Mux'],...
		'inputs','3',...
		'position',[135,59,165,91])

add_block('built-in/Inport',[sys,'/','ExtConn/Latch1/in_1'])
set_param([sys,'/','ExtConn/Latch1/in_1'],...
		'position',[20,50,40,70])

add_block('built-in/Inport',[sys,'/','ExtConn/Latch1/in_2'])
set_param([sys,'/','ExtConn/Latch1/in_2'],...
		'Port','2',...
		'position',[50,65,70,85])
add_line([sys,'/','ExtConn/Latch1'],[320,65;350,65])
add_line([sys,'/','ExtConn/Latch1'],[335,65;335,135;300,135])
add_line([sys,'/','ExtConn/Latch1'],[165,135;110,135;110,85;130,85])
add_line([sys,'/','ExtConn/Latch1'],[245,135;210,135])
add_line([sys,'/','ExtConn/Latch1'],[75,75;130,75])
add_line([sys,'/','ExtConn/Latch1'],[45,60;105,60;105,65;130,65])
add_line([sys,'/','ExtConn/Latch1'],[170,75;190,75])
add_line([sys,'/','ExtConn/Latch1'],[255,75;270,75])
add_line([sys,'/','ExtConn/Latch1'],[320,80;390,80])
set_param([sys,'/','ExtConn/Latch1'],...
		'Mask Display','S  1\n\nR  0',...
		'Mask Type','Latch',...
		'Mask Dialogue','Latch|Initial State for Output "1":',...
		'Mask Translate','ini=(@1~=0);')
set_param([sys,'/','ExtConn/Latch1'],...
		'Mask Help','Latches the S input.  When S (set) is one, the uncomplemented output (1) becomes one.  The output remains one until the R (reset) input becomes one, forcing the output to zero.  If both R and S are one, the latch will be in an undefined state.')
set_param([sys,'/','ExtConn/Latch1'],...
		'Mask Entries','0\/')


%     Finished composite block 'ExtConn/Latch1'.

set_param([sys,'/','ExtConn/Latch1'],...
		'position',[395,339,425,386])

add_block('built-in/Logical Operator',[sys,'/',['ExtConn/Logical',13,'Operator']])
set_param([sys,'/',['ExtConn/Logical',13,'Operator']],...
		'Operator','AND',...
		'position',[330,330,365,370])

add_block('built-in/Constant',[sys,'/',['ExtConn/cutoff',13,'speed']])
set_param([sys,'/',['ExtConn/cutoff',13,'speed']],...
		'Value','wrswbywb',...
		'position',[105,382,170,408])


%     Subsystem  'ExtConn/Latch'.

new_system([sys,'/','ExtConn/Latch'])
set_param([sys,'/','ExtConn/Latch'],'Location',[102,336,551,502])

add_block('built-in/Fcn',[sys,'/','ExtConn/Latch/Fcn'])
set_param([sys,'/','ExtConn/Latch/Fcn'],...
		'orientation',2,...
		'Expr','u[1]>.2',...
		'position',[170,123,205,147])

add_block('built-in/Demux',[sys,'/','ExtConn/Latch/Demux'])
set_param([sys,'/','ExtConn/Latch/Demux'],...
		'outputs','2',...
		'position',[275,55,315,90])

add_block('built-in/Combinatorial Logic',[sys,'/','ExtConn/Latch/Logic'])
set_param([sys,'/','ExtConn/Latch/Logic'],...
		'Truth Table','[0 1;1 0;0 1;0 1;1 0;1 0;0 0;0 0]',...
		'position',[195,55,250,95])

add_block('built-in/Transport Delay',[sys,'/','ExtConn/Latch/Transport Delay'])
set_param([sys,'/','ExtConn/Latch/Transport Delay'],...
		'orientation',2,...
		'Initial Input','ini',...
		'position',[250,120,295,150])

add_block('built-in/Outport',[sys,'/','ExtConn/Latch/out_2'])
set_param([sys,'/','ExtConn/Latch/out_2'],...
		'Port','2',...
		'position',[395,70,415,90])

add_block('built-in/Outport',[sys,'/','ExtConn/Latch/out_1'])
set_param([sys,'/','ExtConn/Latch/out_1'],...
		'position',[355,55,375,75])

add_block('built-in/Mux',[sys,'/','ExtConn/Latch/Mux'])
set_param([sys,'/','ExtConn/Latch/Mux'],...
		'inputs','3',...
		'position',[135,59,165,91])

add_block('built-in/Inport',[sys,'/','ExtConn/Latch/in_1'])
set_param([sys,'/','ExtConn/Latch/in_1'],...
		'position',[20,50,40,70])

add_block('built-in/Inport',[sys,'/','ExtConn/Latch/in_2'])
set_param([sys,'/','ExtConn/Latch/in_2'],...
		'Port','2',...
		'position',[50,65,70,85])
add_line([sys,'/','ExtConn/Latch'],[320,65;350,65])
add_line([sys,'/','ExtConn/Latch'],[335,65;335,135;300,135])
add_line([sys,'/','ExtConn/Latch'],[165,135;110,135;110,85;130,85])
add_line([sys,'/','ExtConn/Latch'],[245,135;210,135])
add_line([sys,'/','ExtConn/Latch'],[75,75;130,75])
add_line([sys,'/','ExtConn/Latch'],[45,60;105,60;105,65;130,65])
add_line([sys,'/','ExtConn/Latch'],[170,75;190,75])
add_line([sys,'/','ExtConn/Latch'],[255,75;270,75])
add_line([sys,'/','ExtConn/Latch'],[320,80;390,80])
set_param([sys,'/','ExtConn/Latch'],...
		'Mask Display','S  1\n\nR  0',...
		'Mask Type','Latch',...
		'Mask Dialogue','Latch|Initial State for Output "1":',...
		'Mask Translate','ini=(@1~=0);')
set_param([sys,'/','ExtConn/Latch'],...
		'Mask Help','Latches the S input.  When S (set) is one, the uncomplemented output (1) becomes one.  The output remains one until the R (reset) input becomes one, forcing the output to zero.  If both R and S are one, the latch will be in an undefined state.')
set_param([sys,'/','ExtConn/Latch'],...
		'Mask Entries','0\/')


%     Finished composite block 'ExtConn/Latch'.

set_param([sys,'/','ExtConn/Latch'],...
		'position',[270,348,300,392])

add_block('built-in/Inport',[sys,'/','ExtConn/in_wr//wb'])
set_param([sys,'/','ExtConn/in_wr//wb'],...
		'Port','2',...
		'position',[115,345,135,365])

add_block('built-in/Relational Operator',[sys,'/','ExtConn/Rel Op'])
set_param([sys,'/','ExtConn/Rel Op'],...
		'position',[215,348,245,372])

add_block('built-in/Relational Operator',[sys,'/','ExtConn/Rel Op1'])
set_param([sys,'/','ExtConn/Rel Op1'],...
		'Operator','<',...
		'position',[245,273,275,297])

add_block('built-in/Fcn',[sys,'/',['ExtConn/abs(i''ds)']])
set_param([sys,'/',['ExtConn/abs(i''ds)']],...
		'Expr','abs(u[1])',...
		'position',[160,265,200,295])

add_block('built-in/Constant',[sys,'/','ExtConn/eps'])
set_param([sys,'/','ExtConn/eps'],...
		'Value','5e-2',...
		'position',[160,320,195,340])

add_block('built-in/Switch',[sys,'/','ExtConn/Switch1'])
set_param([sys,'/','ExtConn/Switch1'],...
		'Threshold','0.5',...
		'position',[375,76,400,134])

add_block('built-in/Switch',[sys,'/','ExtConn/Switch2'])
set_param([sys,'/','ExtConn/Switch2'],...
		'Threshold','0.5',...
		'position',[370,166,395,224])

add_block('built-in/Integrator',[sys,'/','ExtConn/Vcap_'])
set_param([sys,'/','ExtConn/Vcap_'],...
		'position',[420,180,450,210])

add_block('built-in/Sum',[sys,'/','ExtConn/Sum'])
set_param([sys,'/','ExtConn/Sum'],...
		'position',[485,115,505,150])

add_block('built-in/Gain',[sys,'/','ExtConn/Gain2'])
set_param([sys,'/','ExtConn/Gain2'],...
		'Gain','Nq2Nd',...
		'position',[525,73,595,107])

add_block('built-in/Inport',[sys,'/',['ExtConn/in_i''ds']])
set_param([sys,'/',['ExtConn/in_i''ds']],...
		'Port','3',...
		'position',[40,165,60,185])

add_block('built-in/Inport',[sys,'/','ExtConn/in_vas'])
set_param([sys,'/','ExtConn/in_vas'],...
		'position',[40,40,60,60])

add_block('built-in/Gain',[sys,'/','ExtConn/Rcstart'])
set_param([sys,'/','ExtConn/Rcstart'],...
		'Gain','Rcstart',...
		'position',[255,106,330,144])

add_block('built-in/Gain',[sys,'/','ExtConn/Rcrun'])
set_param([sys,'/','ExtConn/Rcrun'],...
		'Gain','Rcrun',...
		'position',[200,64,255,106])

add_block('built-in/Gain',[sys,'/','ExtConn/1//Cstart'])
set_param([sys,'/','ExtConn/1//Cstart'],...
		'Gain','1/Cstart',...
		'position',[255,198,325,232])

add_block('built-in/Gain',[sys,'/','ExtConn/1//Crun'])
set_param([sys,'/','ExtConn/1//Crun'],...
		'Gain','1/Crun',...
		'position',[200,157,270,193])

add_block('built-in/Constant',[sys,'/','ExtConn/Caprun'])
set_param([sys,'/','ExtConn/Caprun'],...
		'orientation',2,...
		'Value','Caprun',...
		'position',[450,269,505,291])

add_block('built-in/Constant',[sys,'/','ExtConn/Capstart'])
set_param([sys,'/','ExtConn/Capstart'],...
		'orientation',2,...
		'Value','Capstart',...
		'position',[575,270,630,290])