s3c2410xsio.h

操作系统中的一找你个的相关的淡淡的码源代码

/* s3c2410xSio.h - MagicARM2410 UART header file */



#ifndef __INCs3c2410xSioh 
#define __INCs3c2410xSioh 

#ifdef __cplusplus
extern "C" {
#endif

/* Register description OF Samsung s3c2410x UART */

#ifndef _ASMLANGUAGE

/* Register offsets from base address */
#define OFFSET_ULCON	  (0x00)
#define OFFSET_UCON	    (0x04)
#define OFFSET_UFCON	  (0x08)
#define OFFSET_UMCON	  (0x0c)
/**/
#define OFFSET_UTRSTAT	(0x10)
#define OFFSET_UERSTAT	(0x14)
#define OFFSET_UFSTAT	  (0x18)
#define OFFSET_UMSTAT	  (0x1c)
/**/
#define OFFSET_UTXH	    (0x20)
#define OFFSET_URXH	    (0x24)
#define OFFSET_UDIV	    (0x28)


/* bit mask definitions within ULCON register */
	/* bit6 */
	#define InfraRed_OFF	(0)
	#define InfraRed_ON		(0x00000001<<6)
	/* bit5..3 */
	#define NO_PARITY		  (0)
	#define ODD_PARITY		(0x00000004<<3)
	#define EVEN_PARITY		(0x00000005<<3)
	/* bit2 */
	#define ONE_STOPBIT		(0)
	#define TWO_STOPBIT		(0x00000001<<2)
	/* bit1..0 */
	#define DATABIT_5		  (0)
	#define DATABIT_6		  (0x00000001)
	#define DATABIT_7		  (0x00000002)
	#define DATABIT_8		  (0x00000003)

/* bit mask definitions within UCON register */
	/* bit10 */
	#define CLK_PCLK		  (0)
	#define CLK_UCLK		  (0x00000001<<10)
	/* bit9 */
	#define TxInt_Pulse		(0)
	#define TxInt_Level		(0x00000001<<9)
	/* bit8 */
	#define RxInt_Pulse		(0)
	#define RxInt_Level		(0x00000001<<8)
	/* bit7 */
	#define RxTimeOut_OFF	(0)
	#define RxTimeOut_ON	(0x00000001<<7)
	/* bit6 */
	#define RxErrInt_OFF	(0)
	#define RxErrInt_ON		(0x00000001<<6)
	/* bit5 */
	#define LOOPBACK_OFF	(0)
	#define LOOPBACK_ON		(0x00000001<<5)
	/* bit4 */
	#define TxBreak_OFF		(0)
	#define TxBreak_ON		(0x00000001<<4)
	/* bit3..2 */
	#define TxMode_OFF		 (0)
	#define TxMode_IntPoll (0x00000001<<2)
	#define TxMode_DMA03	 (0x00000002<<2)
	#define TxMode_DMA1		 (0x00000003<<2)
	/* bit1..0 */
	#define RxMode_OFF		 (0)
	#define RxMode_IntPoll (0x00000001)
	#define RxMode_DMA03	 (0x00000002)
	#define RxMode_DMA1		 (0x00000003)

/* bit mask definitions within UFCON register */
	/* bit7..6 */
	#define TxTrigger_0		(0)
	#define TxTrigger_4		(0x00000001<<6)
	#define TxTrigger_8		(0x00000002<<6)
	#define TxTrigger_12	(0x00000003<<6)
	/* bit5..4 */
	#define RxTrigger_4		(0)
	#define RxTrigger_8		(0x00000001<<4)
	#define RxTrigger_12	(0x00000002<<4)
	#define RxTrigger_16	(0x00000003<<4)
	/* bit2 */
	#define TxFifoReset		(0x00000001<<2)
	/* bit1 */
	#define RxFifoReset		(0x00000001<<1)
	/* bit0 */
	#define FIFO_OFF		  (0)
	#define FIFO_ON			  (0x00000001)

/* bit mask definitions within UMCON register */
	/* bit4 */
	#define AFC_OFF		    (0)
	#define AFC_ON		    (0x00000001<<4)
	/* bit0 */
	#define RTS_HIGH	    (0)
	#define RTS_LOW		    (0x00000001<<0)


/* bit mask definitions within UTRSTAT register */
#define UTRSTAT_TRNSR_EM	(0x00000001<<2)
#define UTRSTAT_TB_EM		  (0x00000001<<1)
#define UTRSTAT_RB_RDY		(0x00000001<<0)
/* bit mask definitions within UERSTAT register */
#define UERSTAT_FRM_ERR		(0x00000001<<2)
#define UERSTAT_OVR_ERR		(0x00000001<<0)
/* bit mask definitions within UFSTAT register */
#define UFSTAT_TXFULL		  (0x00000001<<9)
#define UFSTAT_RXFULL		  (0x00000001<<8)
#define UFSTAT_TFCNT		  (0x00000015<<4)
#define UFSTAT_RFCNT		  (0x00000015<<0)
/* bit mask definitions within UMSTAT register */
#define UMSTAT_DELTA_CTS	(0x00000001<<2)
#define UMSTAT_CTS_LVL		(0x00000001<<0)
/* bit mask definitions within UXXH register */
#define UXXH_BYTE		      (0x000000ff<<0)
/* bit mask definitions within UDIV register */
#define UDIV_DIV		      (0x0000ffff<<0)


typedef struct s3c2410x_CHAN
{
	/* must be first */
	SIO_CHAN	sio;		        /* standard SIO_CHAN element SIO_DRV_FUNCS * pDrvFuncs;*/
	
	/* callbacks */
	STATUS	(*getTxChar) ();  /* installed Tx callback routine */
	STATUS	(*putRcvChar) (); /* installed Rx callback routine */
	void *	getTxArg;	        /* argument to Tx callback routine */
	void *	putRcvArg;	      /* argument to Rx callback routine */

	UINT32*	regs;		          /* s3c2410x registers */
	UINT8 	intLevelRx;	      /* Rx Interrupt level for this device */
	UINT8 	intLevelTx;	      /* Tx Interrupt level for this device */

	UINT32	channelMode;	    /* such as INT, POLL modes */
	int	baudRate;	            /* the current baud rate */
	UINT32	xtal;		          /* UART clock frequency */     
	
	int	options;
} s3c2410x_CHAN;


/* function declarations */

extern void s3c2410xSioInt     (s3c2410x_CHAN *pChan);
extern void s3c2410xSioIntTx   (s3c2410x_CHAN *pChan);
extern void s3c2410xSioIntRx   (s3c2410x_CHAN *pChan);
extern void s3c2410xSioDevInit (s3c2410x_CHAN *pChan);

#endif	/* _ASMLANGUAGE */

#ifdef __cplusplus
}
#endif
 
#endif /* __INCs3c2410xSioh */