p8-76.sp

来自「《CMOS电路模拟与设计——基于Hspice》——电路设计与仿真,钟文耀, 郑美」· SP 代码 · 共 27 行

*EXERCISE8_16  twostage INVERTER
.options post=2 list
.PARAM Length=2u
M1  3  1  2  2  MP  L=Length W=4u
M2  3  1  0  0  MN  L=2u W=4u
M3  4  3  2  2  MP  L=Length W=4u
M4  4  3  0  0  MN  L=2u W=4u
C1  3  0  0.1pF
C2  4  0  0.1pf 
VDD  2   0   DC 5V
VIN  1   0   pulse 0   5   0n   10n   10n   90n   200n
.MODEL MP PMOS (level=2 LD=0.250U TOX=365E-10
+ UCRIT=19100.4 DELTA=0.859687 VMAX=47972.9 XJ=0.250U
+ LAMBDA=5.403347E-02 NFS=2.351269E+11 NEFF=1.001
+ NSS=1.0E+12 TPG=-1.0 RSH=76.020 CGDO=3.54775E-10
+ CGSO=3.54775E-10 CGBO=6.981174E-10 CJ=2.2624E-04
+ MJ=0.46650 CJSW=2.3825E-10 MJSW=0.24660 PB=0.700)
.MODEL MN NMOS (LEVEL=2 LD=0.250U TOX=365E-10
+ NSUB=2.13818E+16 VTO=0.84898 KP=5.7790E-05
+ NSS=1.0E+12 TPG=1.0 RSH=22.730 CGDO=3.54775E-10
+ CGSO=3.54775E-10 CGBO=6.354506E-10 CJ=3.7740E-04
+ MJ=0.45890 CJSW=5.1360E-10 MJSW=0.36620 PB=0.800)
.tran 1n 400n sweep length  2u   10u  1u
.MEAS TRAN TDelay TRIG V(1) val=2.5 TD=150ns RISE=1 TARG V(4)
val=2.5 RISE=1
.END