_csl_pscmdstateenableall.c

TI的DM6446的硬件平台搭建的相关例子

/** @file _csl_pscDspLocalReset.c
 *
 *  @brief    File for functional layer of CSL API @a CSL_ccdcEnable()
 *
 *  Description
 *    - The @a CSL_ccdcEnable() function definition & it's associated
 *      functions
 *
 *  @date 27-May-2005
 *  @author Lawrence Ronk
 */

#include <csl_pscAux.h>

#pragma CODE_SECTION (CSL_pscMdEnableAll, ".text:csl_section:psc");

/** @brief Power on DSP from start-to-finish (no intervention)
 *	
 */
CSL_Status  CSL_pscMdEnableAll(
    CSL_PscHandle     hPsc,
    CSL_PscMdState    mdStateRecord[CSL_PSC_NUM_MD]
	){

  CSL_PscRegsOvly pscRegs = hPsc->regs;
  Uint16 i;


  /* Wait for PTSTAT.GOSTAT1 to clear to 0x0 before initiating a new transition */  
  while( ( CSL_FEXT(pscRegs->PTSTAT, PSC_PTSTAT_GOSTAT1) )  ==  CSL_PSC_PTSTAT_GOSTAT_TRANSITIONING ){/* wait */;}

  for( i = 0; i < CSL_PSC_NUM_MD; i++ ){
    /* Set MDCTLx.NEXT to new state value for all modules in all Power Domains*/
    CSL_FINS(pscRegs->MDCTL[i], PSC_MDCTL_NEXT, CSL_PSC_MD_STATE_ENABLE);
    
    /* Do special workaround */
    if( i == CSL_PSC_MD_VPSSSLV  ||
        i == CSL_PSC_MD_EMAC     ||
        i == CSL_PSC_MD_EMACCTRL ||
        i == CSL_PSC_MD_MDIO     ||
        i == CSL_PSC_MD_IEEE1394 ||
        i == CSL_PSC_MD_USB      ||
        i == CSL_PSC_MD_ATA      ||
        i == CSL_PSC_MD_VLYNQ    ||
        i == CSL_PSC_MD_HPI      ||
        i == CSL_PSC_MD_DDREMIF  ||
        i == CSL_PSC_MD_AEMIF    ||
        i == CSL_PSC_MD_MMCSD    ||
        i == CSL_PSC_MD_MEMSTICK ||
        i == CSL_PSC_MD_MCBSP    ||
        i == CSL_PSC_MD_GPIO     ||
        i == CSL_PSC_MD_IMCOP    ){
        CSL_FINS(pscRegs->MDCTL[i], PSC_MDCTL_EMURSTIE, CSL_PSC_MDCTL_EMURSTIE_INT_ENABLE); 
    } 

    /* Update the state record array if not NULL */
    if( mdStateRecord != NULL ){ 
      mdStateRecord[i] = CSL_PSC_MD_STATE_ENABLE;
    }
    
    
  }

  /* Set PTCMD.GO0 to 0x1 to initiate the state transition for modules in the ALWAYSON PD */
  CSL_FINS(pscRegs->PTCMD, PSC_PTCMD_GO0, CSL_PSC_PTCMD_GO_GO );                             
                                                   
  /* Wait for PTSTAT.GOSTAT0 to clear to 0x0 */
  while( ( CSL_FEXT(pscRegs->PTSTAT, PSC_PTSTAT_GOSTAT0) )  == CSL_PSC_PTSTAT_GOSTAT_TRANSITIONING  ){/* wait */;}


      /* Transition the DSP PD */
      /* Set PTCMD.GO1 to 0x1 to initiate the state transition for modules in the DSP */
      CSL_FINS(pscRegs->PTCMD, PSC_PTCMD_GO1, CSL_PSC_PTCMD_GO_GO );                             


      /* Wait for PTSTAT.GOSTAT1 to clear to 0x0 */
      while( ( CSL_FEXT(pscRegs->PTSTAT, PSC_PTSTAT_GOSTAT1) )  == CSL_PSC_PTSTAT_GOSTAT_TRANSITIONING  ){/* wait */;}
  
  for( i = 0; i < CSL_PSC_NUM_MD; i++ ){
    /* Clear bit for special workaround */
    if( i == CSL_PSC_MD_VPSSSLV  |
        i == CSL_PSC_MD_EMAC     ||
        i == CSL_PSC_MD_EMACCTRL ||
        i == CSL_PSC_MD_MDIO     ||
        i == CSL_PSC_MD_IEEE1394 ||
        i == CSL_PSC_MD_USB      ||
        i == CSL_PSC_MD_ATA      ||
        i == CSL_PSC_MD_VLYNQ    ||
        i == CSL_PSC_MD_HPI      ||
        i == CSL_PSC_MD_DDREMIF  ||
        i == CSL_PSC_MD_AEMIF    ||
        i == CSL_PSC_MD_MMCSD    ||
        i == CSL_PSC_MD_MEMSTICK ||
        i == CSL_PSC_MD_MCBSP    ||
        i == CSL_PSC_MD_GPIO     ||
        i == CSL_PSC_MD_IMCOP    ){
        CSL_FINS(pscRegs->MDCTL[i], PSC_MDCTL_EMURSTIE, CSL_PSC_MDCTL_EMURSTIE_INT_DISABLE); 
    } 
  }


  return (CSL_SOK);
}