csl_mmcsdhwsetup.c

TI的DM6446的硬件平台搭建的相关例子

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005                 
 *                                                                              
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.             
 *   ===========================================================================
 */ 

/** @file csl_mmcsdHwSetup.c
 *    Path: \\(CSLPATH)\\ipmodules\\mmcsd\\src
 *  @brief File for functional layer of CSL API @a CSL_mmcsdHwSetup()
 *
 *  Description
 *   - The @a CSL_mmcsdHwSetup() function definition & it's associated functions
 *
 *  @date 7 May, 2004
 *  @author Pratheesh Gangadhar
 */

/* =============================================================================
 *  Revision History
 *  ===============
 *  12-Oct-2004 Hs Updated according to review comments
 *  01-Sep-2004 Hs File Created.
 * =============================================================================
 */

#include <csl_mmcsd.h>

/** ============================================================================
 *   @n@b CSL_mmcsdHwSetup
 *
 *   @b Description
 *   @n It configures the mmcsd registers as per the values passed
 *      in the hardware setup structure.
 *
 *   @b Arguments
 *   @verbatim
            hMmcsd              Handle to the mmcsd
 
            hwSetup             Pointer to harware setup structure
 
     @endverbatim
 *
 *   <b> Return Value </b>  CSL_Status
 *   @li                    CSL_SOK             - Hardware setup successful
 *   @li                    CSL_ESYS_BADHANDLE  - Invalid handle
 *   @li                    CSL_ESYS_INVPARAMS  - Hardware structure is not
                                                  properly initialized
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  MMCSD controller registers are configured according 
 *       to the hardware setup parameters
 *
 *   @b Modifies
 *   @n ARM PLL controller registers
 *
 *   @b Example
 *   @verbatim
            CSL_MmcsdHandle   hMmcsd;
            CSL_MmcsdObj      mmcsdObj;
            CSL_MmcsdHwSetup  hwSetup;
            CSL_status        status;

            ...
            
            hMmcsd = CSL_mmcsdOpen(&mmcsdObj, CSL_MMCSD, NULL, &status);            
                      
            status = CSL_mmcsdHwSetup(hMmcsd, &hwSetup);
     @endverbatim
 * ===========================================================================
 */
#pragma CODE_SECTION (CSL_mmcsdHwSetup, ".text:csl_section:mmcsd");
CSL_Status CSL_mmcsdHwSetup (
    CSL_MmcsdHandle   hMmcsd,
    CSL_MmcsdHwSetup  *setup
)
{
    CSL_MmcsdRegsOvly mmcsdRegs = hMmcsd->regs;
       
    if (setup == NULL)
      return CSL_ESYS_INVPARAMS;
    
    if (hMmcsd == NULL)
        return CSL_ESYS_BADHANDLE;
    
    mmcsdRegs->MMCCTL = ( CSL_FMKT ( MMCSD_MMCCTL_CMDRST, DISABLE)
                        | CSL_FMKT ( MMCSD_MMCCTL_DATRST, DISABLE));
                        
    mmcsdRegs->MMCCTL |= ( CSL_FMK ( MMCSD_MMCCTL_PERMDX, setup->writeEndian)
                         | CSL_FMK ( MMCSD_MMCCTL_PERMDR, setup->readEndian)
                         | CSL_FMK ( MMCSD_MMCCTL_DATEG, setup->dat3Detect)
                         | CSL_FMK ( MMCSD_MMCCTL_WIDTH, setup->busWidth));
    
    mmcsdRegs->MMCTOR = ( CSL_FMK ( MMCSD_MMCTOR_TOR, setup->responseTimeout)
                        | CSL_FMK ( MMCSD_MMCTOR_TOD_20_16,
                         (setup->dataTimeout & 0x1F0000)>>16)); 
                                    
    mmcsdRegs->MMCTOD = CSL_FMK ( MMCSD_MMCTOD_TOD_15_0, setup->dataTimeout);
    
    mmcsdRegs->MMCIM = setup->intEnable;
    
    
    mmcsdRegs->MMCCTL &= ~( CSL_FMKT ( MMCSD_MMCCTL_CMDRST, DISABLE)
                        | CSL_FMKT ( MMCSD_MMCCTL_DATRST, DISABLE));
    
    CSL_FINS (mmcsdRegs->MMCCLK, MMCSD_MMCCLK_CLKEN, setup->memClkEnable);    
    
    CSL_FINS (mmcsdRegs->MMCCLK, MMCSD_MMCCLK_CLKRT, setup->clockPinRate);    

    return CSL_SOK;
}