mmcsd_evm.h

TI的DM6446的硬件平台搭建的相关例子

/*
    DaVinci ARM Evaluation Software

    (c)Texas Instruments 2003
*/

/** \defgroup MMCSD MMC/SD module*/
/*@{*/

/** \file  mmcsd_evm.h
     \brief MMC/SD DVinci EVM Related APIs

*/

#ifndef _MMCSD_EVM_H_
#define _MMCSD_EVM_H_


#define MMCSD_DMA_CHANNEL		  SDRC_DMACH_1
#define SDRAM_TO_MMCIF             1
#define MMCIF_TO_SDRAM             0


#define MMCSD_GET_WORD()       			CSL_FEXTR(CSL_MMCSD_0_REGS->MMCDRR,31,0)           ///< Reads a word from the MMCSD Data Register
#define MMCSD_SET_WORD(word16)    		CSL_FINS(CSL_MMCSD_0_REGS->MMCDXR,31,0,(word16))   ///< Writes a word to the MMCSD Data Register
#define MMCSD_GET_OCR_POWERON_STATUS()  (CSL_FEXT(CSL_MMCSD_0_REGS->MMCRSP67,MMCSD_MMCRSP67_MMCRSP7) & 0x8000)     ///< Reads a word from the MMCSD Data Register
#define MMCSD_FASTIO_DATA()        		(CSL_FEXT(CSL_MMCSD_0_REGS->MMCRSP67,MMCSD_MMCRSP67_MMCRSP6) & 0x00FF)///< Reads the register contents read using FAST IO command, from MMC
#define MMCSD_RCA_RCVD()              	 CSL_FEXT(CSL_MMCSD_0_REGS->MMCRSP67,MMCSD_MMCRSP67_MMCRSP7)          ///< RCA received on Interrupt Request - of winning card or of the host (rca =0)
#define MMCSD_LOCK_UNLOCK_FAIL_CHK()     CSL_FEXT(CSL_MMCSD_0_REGS->MMCRSP67,MMCSD_MMCRSP67_MMCRSP7) & 0x0100       ///< RCA received on Interrupt Request - o
#define MMCSD_CARD_LOCK_AND_PASSWD_CHK() (CSL_FEXT(CSL_MMCSD_0_REGS->MMCRSP67,MMCSD_MMCRSP67_MMCRSP7) & 0x0300)>>8   ///< RCA received on Interrupt Request - o




#define MMCSD_OP_TIMEOUT           2048
#define MMCSD_BSYEXP		       0x0100
#define MMCSD_PPLEN			       0x0080
#define MMCSD_FNCLK_INIT           1
#define MMCSD_CLK_INIT             300000


/*Flag used to enable throughtput measurement related code */

#define THROUGHPUT 1

/**
    \brief FIFO LEVEL
*/
typedef enum {
  MMCSD_FIFOLEVEL_16BYTES,           ///< MMCSD_FIFO Levelzero (16 bytes)
  MMCSD_FIFOLEVEL_32BYTES            ///< MMCSD_FIFO LevelOne (32 Bytes)
} MMCSD_FIFOTHR_LEVEL;


/**
    \brief Media Card Type
*/
typedef enum {
  MMCSD_MULTIMEDIACARD,            ///< MMC
  MMCSD_SECUREDIGITALCARD         ///< SD
} MMCSD_CARD_TYPE;

/**
    \brief Endianness Select
*/
typedef enum {
  MMCSD_LITTLE_ENDIAN,      ///< Little Endian Selection
  MMCSD_BIG_ENDIAN         ///< Big Endian Selection
} MMCSD_ENDIAN;

/**
    \brief Data Bus Width
*/
typedef enum {
  MMCSD_DATA_BUS_1,     ///< Data bus has 1 bit
  MMCSD_DATA_BUS_4      ///< Data bus has 4 bits
} MMCSD_DATA_BUS_WIDTH;

/**
    \brief DAT3 Edge Detection select
*/
typedef enum {
  MMCSD_DAT3_DISABLE,   ///< DAT3 edge detection is disabled
  MMCSD_DAT3_RISE,      ///< DAT3 rising edge detection is enabled
  MMCSD_DAT3_FALL,      ///< DAT3 falling edge detection is enabled
  MMCSD_DAT3_BOTH       ///< DAT3 both edge detection is enabled
} MMCSD_DAT3_DETECT;

/**
    \brief Status bits of Register - Status0
*/
#define MMCSD_STAT0_DATDNE 0x0001     ///< Data Done Status
#define MMCSD_STAT0_BSYDNE 0x0002     ///< Busy Done Status
#define MMCSD_STAT0_RSPDNE 0x0004     ///< Command / Response Done Status
#define MMCSD_STAT0_TOUTRD 0x0008     ///< Time-Out (read data) Status
#define MMCSD_STAT0_TOUTRS 0x0010     ///< Time-Out (response) Status
#define MMCSD_STAT0_CRCWR  0x0020     ///< CRC error (write data) Status
#define MMCSD_STAT0_CRCRD  0x0040     ///< CRC error (read data) Status
#define MMCSD_STAT0_CRCRS  0x0080     ///< CRC error (response) Status
#define MMCSD_STAT0_SPIERR 0x0100     ///< Data Error (in SPI mode) Status
#define MMCSD_STAT0_DXRDY  0x0200     ///< Data Transmit Ready Status
#define MMCSD_STAT0_DRRDY  0x0400     ///< Data Receive Ready Status
#define MMCSD_STAT0_DATED  0x0800     ///< DAT3 Edge Detect Status

/**
    \brief Status bits of Register - Status1
*/
typedef enum {
  MMCSD_STAT1_BUSY =      0x0001,           ///< Busy Status
  MMCSD_STAT1_CLKSTP =    0x0002,        ///< Clock Stop Status
  MMCSD_STAT1_DXEMP =     0x0004,        ///< Data transmit empty Status
  MMCSD_STAT1_DRFUL =     0x0008,       ///< Data receive full Status
  MMCSD_STAT1_DAT3ST =    0x0010,      ///< DAT3 Status
  MMCSD_STAT1_FIFOEMP =   0x0020,  ///< FIFO empty status
  MMCSD_STAT1_FIFOFULL  = 0x0040 ///< FIFO full status
} MMCSD_STATUS1_REG;

/**
    \brief Card States as per MMC/SD Specifications
*/
typedef enum {
  MMCSD_STATE_IDLE=0,
  MMCSD_STATE_READY,
  MMCSD_STATE_IDENT,
  MMCSD_STATE_STBY,
  MMCSD_STATE_TRAN,
  MMCSD_STATE_DATA,
  MMCSD_STATE_RCV,
  MMCSD_STATE_PRG,
  MMCSD_STATE_DIS,
  MMCSD_STATE_INA
} MMCSD_CARD_STATE;

/**
    \brief Direction of DMA Transfer
*/
typedef enum {
  MMCSD_FROM_MMC,   ///< MMCIF to SDRAM
  MMCSD_TO_MMC      ///< SDRAM to MMCIF
} MMCSD_TRANSFER_DIRECTION;

/**
    \brief MMCSD Controller Configuration parameters
*/
typedef struct {
  MMCSD_ENDIAN writeEndian;                ///< Endian select enable while writing
  MMCSD_ENDIAN readEndian;                ///< Endian select enable while reading
  MMCSD_DAT3_DETECT dat3Detect;          ///< DAT3 Edge detection
  Bool cardReadyFlag;                   ///< Card Ready flag in SDIO init response TRUE: Card Ready FALSE: Card not ready
  Bool IOflag;                         ///< SDIO I/O function flag TRUE: I/O present FALSE: I/O absent
  Bool memoryFlag;                    ///< SD memory function presence flag TRUE: memory present FALSE: memory absent
  Uint8  numFunctions;                   ///< Number of I/O functions available in SDIO card
  Bool spiModeEnable;                   ///< SPI mode, TRUE:Enable SPI Mode, FALSE:Enable Native Mode
  Bool csEnable;                       ///< Card Select enable when writing, TRUE:CS output is LOW, FALSE: CS output is HIGH. Valid Only in SPI mode
  Bool spiCrcErrCheckEnable;          ///< CRC Error check enabled, TRUE:Enable CRC check, FALSE:Disable CRC check. Valid Only in SPI mode
  MMCSD_DATA_BUS_WIDTH busWidth;     ///< Data bus width, Only in Native mode, MMCSD_DATA_BUS_1:1 bit data bus, MMCSD_DATA_BUS_4:4 bit data bus
  Uint16 timeoutResponse;           ///< Timeout value for response, range 0 to 255 MMC CLK clock cycles for Native mode, for SPI mode timeout value is equal to this value multiplied by 8 MMC CLK clock cycles
  Uint16 timeoutRead;              ///< Time out value for data read, range from 0 to 65535 MMC CLK clock cycles in native mode,  for SPI mode timeout value is equal to this value multiplied by 8 MMC CLK clock cycles
  MMCSD_FIFOTHR_LEVEL fifoThreshold; ///< To set the FIFO depth 16bytes or 32 bytes
} MMCSD_ConfigData;

/**
    \brief Interrupt Enable/disable mask for MMCSD interrupts
*/
typedef struct {
  Bool dmaWriteRequest;			      ///< TRUE:Enable, FALSE:disable
  Bool dmaReadRequest;			      ///< TRUE:Enable, FALSE:disable
  Bool dmaTransferDone;			      ///< TRUE:Enable, FALSE:disable
  Bool datedIntEnable;                ///< TRUE:Enable, FALSE:disable
  Bool drRdyIntEnable;                ///< TRUE:Enable, FALSE:disable
  Bool dxRdyIntEnable;                ///< TRUE:Enable, FALSE:disable
  Bool spiErrIntEnable;               ///< TRUE:Enable, FALSE:disable
  Bool crcErrReadIntEnable;           ///< TRUE:Enable, FALSE:disable
  Bool crcErrResponseIntEnable;       ///< TRUE:Enable, FALSE:disable
  Bool crcErrWriteIntEnable;          ///< TRUE:Enable, FALSE:disable
  Bool timeoutResponseIntEnable;      ///< TRUE:Enable, FALSE:disable
  Bool timeoutReadIntEnable;          ///< TRUE:Enable, FALSE:disable
  Bool rspDneIntEnable;               ///< TRUE:Enable, FALSE:disable
  Bool bsyDneIntEnable;               ///< TRUE:Enable, FALSE:disable
  Bool datDneIntEnable;               ///< TRUE:Enable, FALSE:disable
} MMCSD_IntMode;

/**
    \brief Response information received from MMCSD
*/
typedef struct {
  Uint16 response[8];           ///< Response of the command
  Uchar dataResponse;           ///< Data response
  Uchar errorToken;             ///< Error Token
  Uchar commandIdk;             ///< Command Index
} MMCSD_ResponseData;

/**
    \brief MMC-SD: Card Status Register \n
    In native mode, all the fields will be set. \n
    In SPI mode, the error flags will contain the entire response.
*/
typedef struct {
  Uint8      appSpecific;
  Uint8      ready;
  MMCSD_CARD_STATE  currentState;
  Uint8      eraseReset;
  Uint8      eccDisabled;
  Uint8      wpEraseSkip;
  Uint16     errorFlags;
  Bool       multiMediaCard;
} MMCSD_cardStatusReg;


/**
    \brief MMC-SD: Native mode Card CSD Register Information, required by the driver
*/
typedef struct {
  Uint8  permWriteProtect;
  Uint8  tmpWriteProtect;
  Uint8  writeBlkPartial;
  Uint16 writeBlkLenBytes;
  Uint8  wpGrpEnable;
  Uint8  wpGrpSize;                ///> Extracting 7 bits: For MMC - 5 bits reqd; For SD - 7 bits reqd. (have to be taken care by user)
  Uint8  dsrImp;
  Uint8  readBlkMisalign;
  Uint8  writeBlkMisalign;
  Uint8  readBlkPartial;
  Uint16 readBlkLenBytes;
  Uint8  sysSpecVersion;        ///> These bits are reserved in the case of SD card
} MMCSD_csdRegInfo;

/**
    \brief Interrupt Enable/disable mask for MMCSD interrupts
*/
typedef struct {
  Bool earlyReadDataDone;             ///< TRUE: DATDNE has been rcvd while reading, FALSE: no DATDNE rcvd while reading
  Bool earlyWriteDataDone;            ///< TRUE: DATDNE has been rcvd while writing, FALSE: no DATDNE rcvd while writing
} MMCSD_rwDataDoneStatus;

/**
    \brief DMA Controller Configuration parameters for MMCSD
*/
typedef struct {
  MMCSD_TRANSFER_DIRECTION direction;   ///< Direction of transfer, MMCSD_FROM_MMC:MMC to SDRAM, MMCSD_TO_MMC:SDRAM to MMC
  Bool wordSwapEnable;          ///< TRUE:Enable word swap, FALSE:Disable word swap
  Bool timeoutIntEnable;        ///< TRUE:Enable Timeout interrupt, FALSE:Disable timeout interrupt
  Uint16 timeoutValue;          ///< timeout value range 0 to 65535 MMC CLK cycles
  Uint32 sdramAddress;          ///< Absolute SDRAM address for DMA transfer, must be 32-bit aligned
} MMCSD_DmaConfigData;


/*----- Inline Functions --------*/
/**
    \brief  Set Data size for MMC/SD

    \param  numBlks  Number of blocks for transfer, 0 for infinite number of blocks
    \param  blockSize  Block size for MMC/SD, value of 0 is not allowed

    \return if success, \c E_PASS, else error code

*/
inline STATUS MMCSD_setDataSize(Uint16 numBlks, Uint16 blockSize) {

  if(blockSize == 0)
    return E_INVALID_INPUT;

  	CSL_FINS(CSL_MMCSD_0_REGS->MMCBLEN, MMCSD_MMCBLEN_BLEN, blockSize);

    CSL_MMCSD_0_REGS->MMCNBLK=(Uint16)numBlks;

  return E_PASS;
}


inline STATUS MMCSD_setNumofBlocks(Uint16 numBlks) {

	   CSL_MMCSD_0_REGS->MMCNBLK=(Uint16)numBlks;

  return E_PASS;
}

/**
    \brief  Set and Enable clock for MMC/SD card

    \param  enable      TRUE:Enable clock FALSE:Disable Clock
    \param  fnClockRate  function clock rate divider value (MMC Clk Rate = (ARM Clk/1+fnClockrate))
    \param  mmcClockRate MMC clock rate divider value (MMC Clk Output = (MMC Clk Rate/2*(1+mmcClockRate)))

    \return if success, \c E_PASS, else error code
*/
inline STATUS MMCSD_setClock(Bool enable, Uint16 fnClockRate, Uint16 mmcClockRate ) {

  //CLKC_FSET( DIV3, MMC, fnClockRate );

//  MMCSD_FSET(MMCCLK, CLKRT, mmcClockRate );

	CSL_FINS(CSL_MMCSD_0_REGS->MMCCLK, MMCSD_MMCCLK_CLKRT, mmcClockRate );

  if(enable == TRUE)
    //MMCSD_FSET(MMCCLK, CLEN, 1);
    CSL_FINS(CSL_MMCSD_0_REGS->MMCCLK, MMCSD_MMCCLK_CLKEN, 1);

  else
   // MMCSD_FSET(MMCCLK, CLEN, 0);
   CSL_FINS(CSL_MMCSD_0_REGS->MMCCLK, MMCSD_MMCCLK_CLKEN, 0);