📄 mmcsd_evm.c
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/* Set the Transfer direction from the FIFO as transmit*/
MMCSD_FIFOTransmit();
/*Check the FIFO level to used. This is set in MMCSD_init */
fifoThrlevel = CSL_FEXT(CSL_MMCSD_0_REGS->MMCFIFOCTL,MMCSD_MMCFIFOCTL_FIFOLEV);
/* Check the FIFO Threshold Level is not as default(16bytes) set it to 32Bytes*/
if(fifoThrlevel){
MMCSD_FIFOThreshold(MMCSD_FIFOLEVEL_32BYTES);
fifoWriteItrCount=numofBytes/32;
extraBytes=numofBytes%32;
fifoDxrWrCnt=8;
if(extraBytes)
fifoWriteItrCount=(numofBytes/32)+1;
else
fifoWriteItrCount= numofBytes/32;
}
else{
fifoWriteItrCount=numofBytes/16;
extraBytes=numofBytes%16;
fifoDxrWrCnt=4;
if(extraBytes){
fifoWriteItrCount=(numofBytes/16)+1;
}
else
fifoWriteItrCount= numofBytes/16;
}
if(!dmaEnable) /*CPU used for data Tranfer*/
{
status=MMCSD_sendCmd(0x13880|MMC_WRITE_DAT_UNTIL_STOP, cardMemAddr, (Bool)0, MMCSD_STAT0_RSPDNE);
if(status!=E_PASS)
return E_DEVICE;
for(ii=0; ii < fifoWriteItrCount;ii++)
{
for(jj=0;jj < fifoDxrWrCnt; jj++)
CSL_MMCSD_0_REGS->MMCDXR= (Uint32)*data++;
while(!(CSL_FEXT(CSL_MMCSD_0_REGS->MMCST0,MMCSD_MMCST0_DXRDY)));
if(ii==(fifoWriteItrCount-1))
{
for(jj=0;jj <100; jj++)
{
CSL_MMCSD_0_REGS->MMCDXR= 0x0000000;
if(jj==95) {
CSL_MMCSD_0_REGS->MMCARGHL=(Uint32)0x0;
CSL_MMCSD_0_REGS->MMCCMD=(Uint32)0x1b8c;
//status = MMCSD_checkStatus((MMCSD_STAT0_RSPDNE|MMCSD_STAT0_BSYDNE), 0, 0); //> TimeOut = 0
//if(status!=E_PASS)
// return E_DEVICE;
}
}
}
}
if(extraBytes)
{
if(ii==(fifoWriteItrCount-1))
{
memcpy((Uint8*)fifoBuffPtr,(Uint8*)data,extraBytes);
for(jj=0;jj < fifoDxrWrCnt; jj++)
{
CSL_MMCSD_0_REGS->MMCDXR= (Uint32)*fifoBuffPtr++;
}
}
}
}
else
{
status=MMCSD_sendCmd(0x3880|MMC_WRITE_DAT_UNTIL_STOP, cardMemAddr, (Bool)1, MMCSD_STAT0_RSPDNE);
if(status!=E_PASS)
return E_DEVICE;
//status=MMCSD_EDMAWrite(data,fifoDxrWrCnt,fifoWriteItrCount);
//if(status!=E_PASS)
// return E_FAIL;
}
return E_PASS;
}
#if 0
/*Function to Write Data to MMCSD card using EDMA */
STATUS MMCSD_EDMAWrite(Uint32 * srcBuff,
Uint32 bcnt,
Uint32 ccnt
)
{
CSL_EdmaHandle hModule;
CSL_EdmaParamHandle hParaMmctx;
CSL_EdmaChanObj ChObjMmctx;
CSL_EdmaChanHandle hMmcChtx;
CSL_EdmaParamSetup paramSetupMmctx;
CSL_EdmaContext edmaContext;
CSL_EdmaChannelParam chParamMmctx;
CSL_EdmaRegionObj edmaShObj;
CSL_EdmaRegionParam regionParam;
CSL_EdmaHwChannelSetup chSetupMmctx;
CSL_EdmaRegionHandle shHandle;
CSL_EdmaCmdDmaRegion draeAttr;
CSL_Status chStatus;
Uint32 revision;
Uint32 intrQuery[2];
// Module Initialization
CSL_edmaInit(&edmaContext);
// Module Level Open
hModule = CSL_edmaOpen(NULL,CSL_EDMA_0,NULL,NULL);
// Query Module revision
CSL_edmaGetHwStatus(hModule,CSL_EDMA_QUERY_REVISION,&revision);
// Setup the DRAE Masks
// Region 0 for ARM based peripherals.
draeAttr.region = CSL_EDMA_REGION_0;
draeAttr.drae = 0xFFFFFFFF;
draeAttr.draeh = 0x1FFFFFFF;
CSL_edmaHwControl(hModule,CSL_EDMA_CMD_DMAREGION_ENABLE,&draeAttr);
// Shadow Region 0 Open: ARM Shadow Region
regionParam.regionNum = CSL_EDMA_REGION_0;
shHandle = CSL_edmaRegionOpen(&edmaShObj,CSL_EDMA_0,®ionParam,NULL);
// Channel Open
chParamMmctx.regionNum = CSL_EDMA_REGION_0;
chParamMmctx.chaNum = CSL_EDMA_MMCTXEVT; //MMCSDXEVT sync event
hMmcChtx = CSL_edmaChannelOpen(&ChObjMmctx,
CSL_EDMA_0,
&chParamMmctx,
&chStatus);
// Channel Setup
chSetupMmctx.paramEntry = 27; // This number corresponds to channel/event number=paramentry associated w/ a periph. Refer Table 5-9 (chap5)
chSetupMmctx.que = CSL_EDMA_EVT_QUE1;// Use Q1 as default, might change when building Chains.
CSL_edmaHwChannelSetup(hMmcChtx,&chSetupMmctx);
// Acquire parameters and set them up
// Acquire basic param and set it up
// Parameter entry 0
/* Basic Setup */
hParaMmctx = CSL_edmaGetParamHandle(hMmcChtx,27,NULL);// Need to put the paramentry number here too.
// Your ACNT will change depending on whether its 8 bit (ACNT=1),16-bit (ACNT=2) or 32 bit (ACNT=4)data, as ACNT is always in # of bytes
paramSetupMmctx.option = CSL_EDMA_OPT_MAKE(FALSE,FALSE,FALSE,TRUE,27,CSL_EDMA_TCC_NORMAL,CSL_EDMA_FIFOWIDTH_128BIT,FALSE,CSL_EDMA_SYNC_FRAME,CSL_EDMA_ADDRMODE_INCR,CSL_EDMA_ADDRMODE_INCR);
paramSetupMmctx.srcAddr = (Uint32)srcBuff;
//ACNT=4 since DXR is 32 bit wide, BCNT= FifoDepth/ACNT
paramSetupMmctx.elmArrCnt = CSL_EDMA_CNT_MAKE(4,bcnt);
/*MMCSD DXR Register address- Destination */
paramSetupMmctx.dstAddr = (Uint32)0x01E1002c;
// Source IDX is incremented by 4 since ACNT =4, Dst Idx=Stays same
paramSetupMmctx.srcDstBidx = CSL_EDMA_BIDX_MAKE(4,0);
//Link to NULL , BCNTRLD=0
paramSetupMmctx.linkBcntrld = CSL_EDMA_LINKBCNTRLD_MAKE(CSL_EDMA_LINK_NULL,0);
//Src Cidx is (ACNT*BCNT) Dst Cidx is 0 .
paramSetupMmctx.srcDstCidx = CSL_EDMA_CIDX_MAKE((4*bcnt),0);
//
paramSetupMmctx.cCnt = ccnt;
paramSetupMmctx.triggerWord = CSL_EDMA_TRIGWORD_NONE; //Set this as NONE for EDMA x'fers. Useful in QDMA x'fers
CSL_edmaParamSetup(hParaMmctx,¶mSetupMmctx,CSL_EDMA_PARAM_BASIC);
CSL_edmaHwChannelControl(hMmcChtx,CSL_EDMA_CMD_CHANNEL_ENABLE,NULL);
/*Generate EDMA Txfer Event */
CSL_FINS(CSL_MMCSD_0_REGS->MMCCMD,MMCSD_MMCCMD_DMATRIG,1);
// Poll for transfer completions, wherein in this case IPR bit 27 (TCC#) will be set
// Important to have TCCINTEN =1 in the OPT field
do
{
CSL_edmaGetHwRegionStatus(shHandle,CSL_EDMA_QUERY_REGION_INTERRUPT_PENDSTATUS,intrQuery);
} while (!(intrQuery[0] & 0x08000000));
CSL_edmaChannelClose(hMmcChtx);
CSL_edmaRegionClose(shHandle);
CSL_edmaClose(hModule);
return E_PASS;
}
/*Function to Read Data from MMCSD card using EDMA */
STATUS MMCSD_EDMARead(Uint32 * dstBuff,
Uint32 bcnt,
Uint32 ccnt
)
{
CSL_EdmaHandle hModule;
CSL_EdmaParamHandle hParaMmcrx;
CSL_EdmaChanObj ChObjMmcrx;
CSL_EdmaChanHandle hMmcChrx;
CSL_EdmaParamSetup paramSetupMmcrx;
CSL_EdmaContext edmaContext;
CSL_EdmaChannelParam chParamMmcrx;
CSL_EdmaRegionObj edmaShObj;
CSL_EdmaRegionParam regionParam;
CSL_EdmaHwChannelSetup chSetupMmcrx;
CSL_EdmaRegionHandle shHandle;
CSL_EdmaCmdDmaRegion draeAttr;
CSL_Status chStatus;
Uint32 revision;
Uint32 intrQuery[2];
// Module Initialization
CSL_edmaInit(&edmaContext);
// Module Level Open
hModule = CSL_edmaOpen(NULL,CSL_EDMA_0,NULL,NULL);
// Query Module revision
CSL_edmaGetHwStatus(hModule,CSL_EDMA_QUERY_REVISION,&revision);
// Setup the DRAE Masks
// Region 0 for ARM based peripherals.
draeAttr.region = CSL_EDMA_REGION_0;
draeAttr.drae = 0xFFFFFFFF;
draeAttr.draeh = 0x1FFFFFFF;
CSL_edmaHwControl(hModule,CSL_EDMA_CMD_DMAREGION_ENABLE,&draeAttr);
// Shadow Region 0 Open: ARM Shadow Region
regionParam.regionNum = CSL_EDMA_REGION_0;
shHandle = CSL_edmaRegionOpen(&edmaShObj,CSL_EDMA_0,®ionParam,NULL);
// Channel Open
chParamMmcrx.regionNum = CSL_EDMA_REGION_0;
chParamMmcrx.chaNum = CSL_EDMA_MMCRXEVT; //MMCSDREVT sync event
hMmcChrx = CSL_edmaChannelOpen(&ChObjMmcrx,
CSL_EDMA_0,
&chParamMmcrx,
&chStatus);
// Channel Setup
chSetupMmcrx.paramEntry = 26; // This number corresponds to channel/event number=paramentry associated w/ a periph. Refer Table 5-9 (chap5)
chSetupMmcrx.que = CSL_EDMA_EVT_QUE1;// Use Q1 as default, might change when building Chains.
CSL_edmaHwChannelSetup(hMmcChrx,&chSetupMmcrx);
// Acquire parameters and set them up
// Acquire basic param and set it up
// Parameter entry 0
/* Basic Setup */
hParaMmcrx = CSL_edmaGetParamHandle(hMmcChrx,26,NULL);// Need to put the paramentry number here too.
// Your ACNT will change depending on whether its 8 bit (ACNT=1),16-bit (ACNT=2) or 32 bit (ACNT=4)data, as ACNT is always in # of bytes
paramSetupMmcrx.option = CSL_EDMA_OPT_MAKE(FALSE,FALSE,FALSE,TRUE,26,CSL_EDMA_TCC_NORMAL,CSL_EDMA_FIFOWIDTH_128BIT,FALSE,CSL_EDMA_SYNC_FRAME,CSL_EDMA_ADDRMODE_INCR,CSL_EDMA_ADDRMODE_INCR);
/*MMCSD DRR Register - Source Address */
paramSetupMmcrx.srcAddr = (Uint32)0x01E10028;
//ACNT=4 since DRR is 32 bit wide, BCNT= FifoDepth/ACNT
paramSetupMmcrx.elmArrCnt = CSL_EDMA_CNT_MAKE(4,bcnt);
paramSetupMmcrx.dstAddr = (Uint32)dstBuff;
// Source BIDX stays same, Dst Idx changes by 4 since ACNT =4
paramSetupMmcrx.srcDstBidx = CSL_EDMA_BIDX_MAKE(0,4);
//Link to NULL , BCNTRLD=0.
paramSetupMmcrx.linkBcntrld = CSL_EDMA_LINKBCNTRLD_MAKE(CSL_EDMA_LINK_NULL,0);
//Dst Cidx is (ACNT*BCNT) Src Cidx is 0 .
paramSetupMmcrx.srcDstCidx = CSL_EDMA_CIDX_MAKE(0,(4*bcnt));
paramSetupMmcrx.cCnt = ccnt;
paramSetupMmcrx.triggerWord = CSL_EDMA_TRIGWORD_NONE; //Set this as NONE for EDMA x'fers. Useful in QDMA x'fers
CSL_edmaParamSetup(hParaMmcrx,¶mSetupMmcrx,CSL_EDMA_PARAM_BASIC);
CSL_edmaHwChannelControl(hMmcChrx,CSL_EDMA_CMD_CHANNEL_ENABLE,NULL);
// Poll for transfer completions, wherein in this case IPR bit 26 (TCC#) will be set
// Important to have TCCINTEN =1 in the OPT field
do
{
CSL_edmaGetHwRegionStatus(shHandle,CSL_EDMA_QUERY_REGION_INTERRUPT_PENDSTATUS,intrQuery);
} while (!(intrQuery[0] & 0x04000000));
CSL_edmaChannelClose(hMmcChrx);
CSL_edmaRegionClose(shHandle);
CSL_edmaClose(hModule);
return E_PASS;
}
#endif
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 1 24 Jun 2004 14:41:05 1864 xjarlika */
/* */
/* Checking in MMCSD drv include and src files */
/********************************************************************/
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 2 Jul 15:22:21 8 2049 xjarlika */
/* */
/* FIFOCTL renamed as MMCFIFOCTL */
/* Update due to Register Name Change */
/********************************************************************/
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 3 13 Aug 2004 18:21:56 2296 xjarlika */
/* */
/* Updating MMCSD include and src file after inital testing on Hibari*/
/* Updating MMCSD include and src file after inital testing on Hibari*/
/********************************************************************/
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 4 20 Aug 2004 11:18:18 2346 xjarlika */
/* */
/* Added EDMA functions to MMCSD library */
/********************************************************************/
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 5 24 Aug 2004 14:45:34 2401 xjarlika */
/* */
/* Updating MMCSD drv include and src files after testing on Hibari */
/********************************************************************/
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 6 14 Jan 2005 11:28:32 5879 xjarlika */
/* */
/* Updating after testing on DaVinci QT */
/********************************************************************/
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 7 Feb 09:55:24 4 6639 xjarlika */
/* */
/* Checking in after firstcut thruput data collection for MMCSD */
/********************************************************************/
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 8 17 Feb 2005 09:43:06 7097 xjarlika */
/* */
/* Updating for MMCSD regression tests */
/********************************************************************/
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 9 21 Feb 2005 14:58:56 7286 xjarlika */
/* */
/* Updating MMC/SD and MS/MSPRO files for regression. Added code for enabling 3P3V I/O cells used for MMC/SD MS/MSPRO pins*/
/********************************************************************/
/* Rev.No. Date/Time ECN No. Modifier */
/* ------- --------- ------- -------- */
/* 10 Mar 14:21:45 2 7763 xjarlika */
/* */
/* Updating for regression. SendCmd function in MMCSD drv modified for regression.*/
/********************************************************************/
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