📄 cslr_edmacc_001.h

📁 TI的DM6446的硬件平台搭建的相关例子
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#define CSL_EDMACC_QSTAT_STRTPTR_MASK    (0x0000000Fu)#define CSL_EDMACC_QSTAT_STRTPTR_SHIFT   (0x00000000u)#define CSL_EDMACC_QSTAT_STRTPTR_RESETVAL (0x00000000u)#define CSL_EDMACC_QSTAT_RESETVAL        (0x00000000u)/* QWMTHRA */#define CSL_EDMACC_QWMTHRA_Q1_MASK       (0x00001F00u)#define CSL_EDMACC_QWMTHRA_Q1_SHIFT      (0x00000008u)#define CSL_EDMACC_QWMTHRA_Q1_RESETVAL   (0x00000010u)#define CSL_EDMACC_QWMTHRA_Q0_MASK       (0x0000001Fu)#define CSL_EDMACC_QWMTHRA_Q0_SHIFT      (0x00000000u)#define CSL_EDMACC_QWMTHRA_Q0_RESETVAL   (0x00000010u)#define CSL_EDMACC_QWMTHRA_RESETVAL      (0x00001010u)/* QWMTHRB */#define CSL_EDMACC_QWMTHRB_RESETVAL      (0x00000000u)/* CCSTAT */#define CSL_EDMACC_CCSTAT_QUEACTV1_MASK  (0x00020000u)#define CSL_EDMACC_CCSTAT_QUEACTV1_SHIFT (0x00000011u)#define CSL_EDMACC_CCSTAT_QUEACTV1_RESETVAL (0x00000000u)/*----QUEACTV1 Tokens----*/#define CSL_EDMACC_CCSTAT_QUEACTV1_NONE  (0x00000000u)#define CSL_EDMACC_CCSTAT_QUEACTV1_ACTIVE (0x00000001u)#define CSL_EDMACC_CCSTAT_QUEACTV0_MASK  (0x00010000u)#define CSL_EDMACC_CCSTAT_QUEACTV0_SHIFT (0x00000010u)#define CSL_EDMACC_CCSTAT_QUEACTV0_RESETVAL (0x00000000u)/*----QUEACTV0 Tokens----*/#define CSL_EDMACC_CCSTAT_QUEACTV0_NONE  (0x00000000u)#define CSL_EDMACC_CCSTAT_QUEACTV0_ACTIVE (0x00000001u)#define CSL_EDMACC_CCSTAT_COMPACT_MASK   (0x00003F00u)#define CSL_EDMACC_CCSTAT_COMPACT_SHIFT  (0x00000008u)#define CSL_EDMACC_CCSTAT_COMPACT_RESETVAL (0x00000000u)/*----COMPACT Tokens----*/#define CSL_EDMACC_CCSTAT_COMPACT_NONE   (0x00000000u)#define CSL_EDMACC_CCSTAT_ACTV_MASK      (0x00000010u)#define CSL_EDMACC_CCSTAT_ACTV_SHIFT     (0x00000004u)#define CSL_EDMACC_CCSTAT_ACTV_RESETVAL  (0x00000000u)/*----ACTV Tokens----*/#define CSL_EDMACC_CCSTAT_ACTV_IDLE      (0x00000000u)#define CSL_EDMACC_CCSTAT_ACTV_BUSY      (0x00000001u)#define CSL_EDMACC_CCSTAT_TRACTV_MASK    (0x00000004u)#define CSL_EDMACC_CCSTAT_TRACTV_SHIFT   (0x00000002u)#define CSL_EDMACC_CCSTAT_TRACTV_RESETVAL (0x00000000u)/*----TRACTV Tokens----*/#define CSL_EDMACC_CCSTAT_TRACTV_NONE    (0x00000000u)#define CSL_EDMACC_CCSTAT_TRACTV_ACTIVE  (0x00000001u)#define CSL_EDMACC_CCSTAT_QEVTACTV_MASK  (0x00000002u)#define CSL_EDMACC_CCSTAT_QEVTACTV_SHIFT (0x00000001u)#define CSL_EDMACC_CCSTAT_QEVTACTV_RESETVAL (0x00000000u)/*----QEVTACTV Tokens----*/#define CSL_EDMACC_CCSTAT_QEVTACTV_NONE  (0x00000000u)#define CSL_EDMACC_CCSTAT_QEVTACTV_ACTIVE (0x00000001u)#define CSL_EDMACC_CCSTAT_EVTACTV_MASK   (0x00000001u)#define CSL_EDMACC_CCSTAT_EVTACTV_SHIFT  (0x00000000u)#define CSL_EDMACC_CCSTAT_EVTACTV_RESETVAL (0x00000000u)/*----EVTACTV Tokens----*/#define CSL_EDMACC_CCSTAT_EVTACTV_NONE   (0x00000000u)#define CSL_EDMACC_CCSTAT_EVTACTV_ACTIVE (0x00000001u)#define CSL_EDMACC_CCSTAT_RESETVAL       (0x00000000u)/* AETCTL */#define CSL_EDMACC_AETCTL_EN_MASK        (0x80000000u)#define CSL_EDMACC_AETCTL_EN_SHIFT       (0x0000001Fu)#define CSL_EDMACC_AETCTL_EN_RESETVAL    (0x00000000u)/*----EN Tokens----*/#define CSL_EDMACC_AETCTL_EN_DISABLE     (0x00000000u)#define CSL_EDMACC_AETCTL_EN_ENABLE      (0x00000001u)#define CSL_EDMACC_AETCTL_ENDINT_MASK    (0x00003F00u)#define CSL_EDMACC_AETCTL_ENDINT_SHIFT   (0x00000008u)#define CSL_EDMACC_AETCTL_ENDINT_RESETVAL (0x00000000u)#define CSL_EDMACC_AETCTL_TYPE_MASK      (0x00000040u)#define CSL_EDMACC_AETCTL_TYPE_SHIFT     (0x00000006u)#define CSL_EDMACC_AETCTL_TYPE_RESETVAL  (0x00000000u)/*----TYPE Tokens----*/#define CSL_EDMACC_AETCTL_TYPE_DMA       (0x00000000u)#define CSL_EDMACC_AETCTL_TYPE_QDMA      (0x00000001u)#define CSL_EDMACC_AETCTL_STRTEVT_MASK   (0x0000003Fu)#define CSL_EDMACC_AETCTL_STRTEVT_SHIFT  (0x00000000u)#define CSL_EDMACC_AETCTL_STRTEVT_RESETVAL (0x00000000u)#define CSL_EDMACC_AETCTL_RESETVAL       (0x00000000u)/* AETSTAT */#define CSL_EDMACC_AETSTAT_STAT_MASK     (0x00000001u)#define CSL_EDMACC_AETSTAT_STAT_SHIFT    (0x00000000u)#define CSL_EDMACC_AETSTAT_STAT_RESETVAL (0x00000000u)/*----STAT Tokens----*/#define CSL_EDMACC_AETSTAT_STAT_LOW      (0x00000000u)#define CSL_EDMACC_AETSTAT_STAT_HIGH     (0x00000001u)#define CSL_EDMACC_AETSTAT_RESETVAL      (0x00000000u)/* AETCMD */#define CSL_EDMACC_AETCMD_CLR_MASK       (0x00000001u)#define CSL_EDMACC_AETCMD_CLR_SHIFT      (0x00000000u)#define CSL_EDMACC_AETCMD_CLR_RESETVAL   (0x00000000u)/*----CLR Tokens----*/#define CSL_EDMACC_AETCMD_CLR_CLEAR      (0x00000001u)#define CSL_EDMACC_AETCMD_RESETVAL       (0x00000000u)/* ER */#define CSL_EDMACC_ER_E31_MASK           (0x80000000u)#define CSL_EDMACC_ER_E31_SHIFT          (0x0000001Fu)#define CSL_EDMACC_ER_E31_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E30_MASK           (0x40000000u)#define CSL_EDMACC_ER_E30_SHIFT          (0x0000001Eu)#define CSL_EDMACC_ER_E30_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E29_MASK           (0x20000000u)#define CSL_EDMACC_ER_E29_SHIFT          (0x0000001Du)#define CSL_EDMACC_ER_E29_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E28_MASK           (0x10000000u)#define CSL_EDMACC_ER_E28_SHIFT          (0x0000001Cu)#define CSL_EDMACC_ER_E28_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E27_MASK           (0x08000000u)#define CSL_EDMACC_ER_E27_SHIFT          (0x0000001Bu)#define CSL_EDMACC_ER_E27_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E26_MASK           (0x04000000u)#define CSL_EDMACC_ER_E26_SHIFT          (0x0000001Au)#define CSL_EDMACC_ER_E26_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E25_MASK           (0x02000000u)#define CSL_EDMACC_ER_E25_SHIFT          (0x00000019u)#define CSL_EDMACC_ER_E25_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E24_MASK           (0x01000000u)#define CSL_EDMACC_ER_E24_SHIFT          (0x00000018u)#define CSL_EDMACC_ER_E24_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E23_MASK           (0x00800000u)#define CSL_EDMACC_ER_E23_SHIFT          (0x00000017u)#define CSL_EDMACC_ER_E23_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E22_MASK           (0x00400000u)#define CSL_EDMACC_ER_E22_SHIFT          (0x00000016u)#define CSL_EDMACC_ER_E22_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E21_MASK           (0x00200000u)#define CSL_EDMACC_ER_E21_SHIFT          (0x00000015u)#define CSL_EDMACC_ER_E21_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E20_MASK           (0x00100000u)#define CSL_EDMACC_ER_E20_SHIFT          (0x00000014u)#define CSL_EDMACC_ER_E20_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E19_MASK           (0x00080000u)#define CSL_EDMACC_ER_E19_SHIFT          (0x00000013u)#define CSL_EDMACC_ER_E19_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E18_MASK           (0x00040000u)#define CSL_EDMACC_ER_E18_SHIFT          (0x00000012u)#define CSL_EDMACC_ER_E18_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E17_MASK           (0x00020000u)#define CSL_EDMACC_ER_E17_SHIFT          (0x00000011u)#define CSL_EDMACC_ER_E17_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E16_MASK           (0x00010000u)#define CSL_EDMACC_ER_E16_SHIFT          (0x00000010u)#define CSL_EDMACC_ER_E16_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E15_MASK           (0x00008000u)#define CSL_EDMACC_ER_E15_SHIFT          (0x0000000Fu)#define CSL_EDMACC_ER_E15_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E14_MASK           (0x00004000u)#define CSL_EDMACC_ER_E14_SHIFT          (0x0000000Eu)#define CSL_EDMACC_ER_E14_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E13_MASK           (0x00002000u)#define CSL_EDMACC_ER_E13_SHIFT          (0x0000000Du)#define CSL_EDMACC_ER_E13_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E12_MASK           (0x00001000u)#define CSL_EDMACC_ER_E12_SHIFT          (0x0000000Cu)#define CSL_EDMACC_ER_E12_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E11_MASK           (0x00000800u)#define CSL_EDMACC_ER_E11_SHIFT          (0x0000000Bu)#define CSL_EDMACC_ER_E11_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E10_MASK           (0x00000400u)#define CSL_EDMACC_ER_E10_SHIFT          (0x0000000Au)#define CSL_EDMACC_ER_E10_RESETVAL       (0x00000000u)#define CSL_EDMACC_ER_E9_MASK            (0x00000200u)#define CSL_EDMACC_ER_E9_SHIFT           (0x00000009u)#define CSL_EDMACC_ER_E9_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_E8_MASK            (0x00000100u)#define CSL_EDMACC_ER_E8_SHIFT           (0x00000008u)#define CSL_EDMACC_ER_E8_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_E7_MASK            (0x00000080u)#define CSL_EDMACC_ER_E7_SHIFT           (0x00000007u)#define CSL_EDMACC_ER_E7_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_E6_MASK            (0x00000040u)#define CSL_EDMACC_ER_E6_SHIFT           (0x00000006u)#define CSL_EDMACC_ER_E6_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_E5_MASK            (0x00000020u)#define CSL_EDMACC_ER_E5_SHIFT           (0x00000005u)#define CSL_EDMACC_ER_E5_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_E4_MASK            (0x00000010u)#define CSL_EDMACC_ER_E4_SHIFT           (0x00000004u)#define CSL_EDMACC_ER_E4_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_E3_MASK            (0x00000008u)#define CSL_EDMACC_ER_E3_SHIFT           (0x00000003u)#define CSL_EDMACC_ER_E3_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_E2_MASK            (0x00000004u)#define CSL_EDMACC_ER_E2_SHIFT           (0x00000002u)#define CSL_EDMACC_ER_E2_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_E1_MASK            (0x00000002u)#define CSL_EDMACC_ER_E1_SHIFT           (0x00000001u)#define CSL_EDMACC_ER_E1_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_E0_MASK            (0x00000001u)#define CSL_EDMACC_ER_E0_SHIFT           (0x00000000u)#define CSL_EDMACC_ER_E0_RESETVAL        (0x00000000u)#define CSL_EDMACC_ER_RESETVAL           (0x00000000u)/* ERH */#define CSL_EDMACC_ERH_E63_MASK          (0x80000000u)#define CSL_EDMACC_ERH_E63_SHIFT         (0x0000001Fu)#define CSL_EDMACC_ERH_E63_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E62_MASK          (0x40000000u)#define CSL_EDMACC_ERH_E62_SHIFT         (0x0000001Eu)#define CSL_EDMACC_ERH_E62_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E61_MASK          (0x20000000u)#define CSL_EDMACC_ERH_E61_SHIFT         (0x0000001Du)#define CSL_EDMACC_ERH_E61_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E60_MASK          (0x10000000u)#define CSL_EDMACC_ERH_E60_SHIFT         (0x0000001Cu)#define CSL_EDMACC_ERH_E60_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E59_MASK          (0x08000000u)#define CSL_EDMACC_ERH_E59_SHIFT         (0x0000001Bu)#define CSL_EDMACC_ERH_E59_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E58_MASK          (0x04000000u)#define CSL_EDMACC_ERH_E58_SHIFT         (0x0000001Au)#define CSL_EDMACC_ERH_E58_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E57_MASK          (0x02000000u)#define CSL_EDMACC_ERH_E57_SHIFT         (0x00000019u)#define CSL_EDMACC_ERH_E57_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E56_MASK          (0x01000000u)#define CSL_EDMACC_ERH_E56_SHIFT         (0x00000018u)#define CSL_EDMACC_ERH_E56_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E55_MASK          (0x00800000u)#define CSL_EDMACC_ERH_E55_SHIFT         (0x00000017u)#define CSL_EDMACC_ERH_E55_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E54_MASK          (0x00400000u)#define CSL_EDMACC_ERH_E54_SHIFT         (0x00000016u)#define CSL_EDMACC_ERH_E54_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E53_MASK          (0x00200000u)#define CSL_EDMACC_ERH_E53_SHIFT         (0x00000015u)#define CSL_EDMACC_ERH_E53_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E52_MASK          (0x00100000u)#define CSL_EDMACC_ERH_E52_SHIFT         (0x00000014u)#define CSL_EDMACC_ERH_E52_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E51_MASK          (0x00080000u)#define CSL_EDMACC_ERH_E51_SHIFT         (0x00000013u)#define CSL_EDMACC_ERH_E51_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E50_MASK          (0x00040000u)#define CSL_EDMACC_ERH_E50_SHIFT         (0x00000012u)#define CSL_EDMACC_ERH_E50_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E49_MASK          (0x00020000u)#define CSL_EDMACC_ERH_E49_SHIFT         (0x00000011u)#define CSL_EDMACC_ERH_E49_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E48_MASK          (0x00010000u)#define CSL_EDMACC_ERH_E48_SHIFT         (0x00000010u)#define CSL_EDMACC_ERH_E48_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E47_MASK          (0x00008000u)#define CSL_EDMACC_ERH_E47_SHIFT         (0x0000000Fu)#define CSL_EDMACC_ERH_E47_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E46_MASK          (0x00004000u)#define CSL_EDMACC_ERH_E46_SHIFT         (0x0000000Eu)#define CSL_EDMACC_ERH_E46_RESETVAL      (0x00000000u)#define CSL_EDMACC_ERH_E45_MASK          (0x00
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