cslr_edmacc_001.h

TI的DM6446的硬件平台搭建的相关例子

#ifndef _CSLR_EDMACC_001_H_
#define _CSLR_EDMACC_001_H_
/*********************************************************************
 * Copyright (C) 2003-2004 Texas Instruments Incorporated. 
 * All Rights Reserved 
 *********************************************************************/
 /** \file cslr_edmacc_001.h
 * 
 * \brief This file contains the Register Desciptions for EDMACC
 * 
 *********************************************************************/

#include <cslr.h>

#include <tistdtypes.h>

/**************************************************************************\
* Register Overlay Structure for DRA 
\**************************************************************************/
typedef struct  {
    volatile Uint32 DRAE;
    volatile Uint32 DRAEH;
} CSL_EdmaccDraRegs;

/**************************************************************************\
* Register Overlay Structure for QUEEVTENTRY 
\**************************************************************************/
typedef struct  {
    volatile Uint32 EVT_ENTRY;
} CSL_EdmaccQueevtentryRegs;

/**************************************************************************\
* Register Overlay Structure for SHADOW 
\**************************************************************************/
typedef struct  {
    volatile Uint32 ER;
    volatile Uint32 ERH;
    volatile Uint32 ECR;
    volatile Uint32 ECRH;
    volatile Uint32 ESR;
    volatile Uint32 ESRH;
    volatile Uint32 CER;
    volatile Uint32 CERH;
    volatile Uint32 EER;
    volatile Uint32 EERH;
    volatile Uint32 EECR;
    volatile Uint32 EECRH;
    volatile Uint32 EESR;
    volatile Uint32 EESRH;
    volatile Uint32 SER;
    volatile Uint32 SERH;
    volatile Uint32 SECR;
    volatile Uint32 SECRH;
    volatile Uint8 RSVD0[8];
    volatile Uint32 IER;
    volatile Uint32 IERH;
    volatile Uint32 IECR;
    volatile Uint32 IECRH;
    volatile Uint32 IESR;
    volatile Uint32 IESRH;
    volatile Uint32 IPR;
    volatile Uint32 IPRH;
    volatile Uint32 ICR;
    volatile Uint32 ICRH;
    volatile Uint32 IEVAL;
    volatile Uint8 RSVD1[4];
    volatile Uint32 QER;
    volatile Uint32 QEER;
    volatile Uint32 QEECR;
    volatile Uint32 QEESR;
    volatile Uint32 QSER;
    volatile Uint32 QSECR;
    volatile Uint8 RSVD2[360];
} CSL_EdmaccShadowRegs;

/**************************************************************************\
* Register Overlay Structure for PARAMENTRY 
\**************************************************************************/
typedef struct  {
    volatile Uint32 OPT;
    volatile Uint32 SRC;
    volatile Uint32 A_B_CNT;
    volatile Uint32 DST;
    volatile Uint32 SRC_DST_BIDX;
    volatile Uint32 LINK_BCNTRLD;
    volatile Uint32 SRC_DST_CIDX;
    volatile Uint32 CCNT;
} CSL_EdmaccParamentryRegs;

/**************************************************************************\
* Register Overlay Structure
\**************************************************************************/
typedef struct  {
    volatile Uint32 REV;
    volatile Uint32 CCCFG;
    volatile Uint8 RSVD0[504];
    volatile Uint32 QCHMAP[8];
    volatile Uint8 RSVD1[32];
    volatile Uint32 DMAQNUM[8];
    volatile Uint32 QDMAQNUM;
    volatile Uint8 RSVD2[28];
    volatile Uint32 QUETCMAP;
    volatile Uint32 QUEPRI;
    volatile Uint8 RSVD3[120];
    volatile Uint32 EMR;
    volatile Uint32 EMRH;
    volatile Uint32 EMCR;
    volatile Uint32 EMCRH;
    volatile Uint32 QEMR;
    volatile Uint32 QEMCR;
    volatile Uint32 CCERR;
    volatile Uint32 CCERRCLR;
    volatile Uint32 EEVAL;
    volatile Uint8 RSVD4[28];
    CSL_EdmaccDraRegs DRA[4];
    volatile Uint8 RSVD5[32];
    volatile Uint32 QRAE[4];
    volatile Uint8 RSVD6[112];
    CSL_EdmaccQueevtentryRegs QUEEVTENTRY[2][16];
    volatile Uint8 RSVD7[384];
    volatile Uint32 QSTAT[2];
    volatile Uint8 RSVD8[24];
    volatile Uint32 QWMTHRA;
    volatile Uint32 QWMTHRB;
    volatile Uint8 RSVD9[24];
    volatile Uint32 CCSTAT;
    volatile Uint8 RSVD10[188];
    volatile Uint32 AETCTL;
    volatile Uint32 AETSTAT;
    volatile Uint32 AETCMD;
    volatile Uint8 RSVD11[2292];
    volatile Uint32 ER;
    volatile Uint32 ERH;
    volatile Uint32 ECR;
    volatile Uint32 ECRH;
    volatile Uint32 ESR;
    volatile Uint32 ESRH;
    volatile Uint32 CER;
    volatile Uint32 CERH;
    volatile Uint32 EER;
    volatile Uint32 EERH;
    volatile Uint32 EECR;
    volatile Uint32 EECRH;
    volatile Uint32 EESR;
    volatile Uint32 EESRH;
    volatile Uint32 SER;
    volatile Uint32 SERH;
    volatile Uint32 SECR;
    volatile Uint32 SECRH;
    volatile Uint8 RSVD12[8];
    volatile Uint32 IER;
    volatile Uint32 IERH;
    volatile Uint32 IECR;
    volatile Uint32 IECRH;
    volatile Uint32 IESR;
    volatile Uint32 IESRH;
    volatile Uint32 IPR;
    volatile Uint32 IPRH;
    volatile Uint32 ICR;
    volatile Uint32 ICRH;
    volatile Uint32 IEVAL;
    volatile Uint8 RSVD13[4];
    volatile Uint32 QER;
    volatile Uint32 QEER;
    volatile Uint32 QEECR;
    volatile Uint32 QEESR;
    volatile Uint32 QSER;
    volatile Uint32 QSECR;
    volatile Uint8 RSVD14[3944];
    CSL_EdmaccShadowRegs SHADOW[4];
    volatile Uint8 RSVD15[6144];
    CSL_EdmaccParamentryRegs PARAMENTRY[128];
} CSL_EdmaccRegs;

/**************************************************************************\
* Field Definition Macros
\**************************************************************************/

/* REV */

#define CSL_EDMACC_REV_SCHEME_MASK       (0xC0000000u)
#define CSL_EDMACC_REV_SCHEME_SHIFT      (0x0000001Eu)
#define CSL_EDMACC_REV_SCHEME_RESETVAL   (0x00000000u)

#define CSL_EDMACC_REV_FUNCTION_MASK     (0x0FFF0000u)
#define CSL_EDMACC_REV_FUNCTION_SHIFT    (0x00000010u)
#define CSL_EDMACC_REV_FUNCTION_RESETVAL (0x00000001u)

#define CSL_EDMACC_REV_RTL_MASK          (0x0000F800u)
#define CSL_EDMACC_REV_RTL_SHIFT         (0x0000000Bu)
#define CSL_EDMACC_REV_RTL_RESETVAL      (0x00000000u)

#define CSL_EDMACC_REV_MAJOR_MASK        (0x00000700u)
#define CSL_EDMACC_REV_MAJOR_SHIFT       (0x00000008u)
#define CSL_EDMACC_REV_MAJOR_RESETVAL    (0x00000003u)

#define CSL_EDMACC_REV_CUSTOM_MASK       (0x000000C0u)
#define CSL_EDMACC_REV_CUSTOM_SHIFT      (0x00000006u)
#define CSL_EDMACC_REV_CUSTOM_RESETVAL   (0x00000000u)

#define CSL_EDMACC_REV_MINOR_MASK        (0x0000003Fu)
#define CSL_EDMACC_REV_MINOR_SHIFT       (0x00000000u)
#define CSL_EDMACC_REV_MINOR_RESETVAL    (0x00000000u)

#define CSL_EDMACC_REV_RESETVAL          (0x00010300u)

/* CCCFG */

#define CSL_EDMACC_CCCFG_MP_EXIST_MASK   (0x02000000u)
#define CSL_EDMACC_CCCFG_MP_EXIST_SHIFT  (0x00000019u)
#define CSL_EDMACC_CCCFG_MP_EXIST_RESETVAL (0x00000000u)

/*----MP_EXIST Tokens----*/
#define CSL_EDMACC_CCCFG_MP_EXIST_NONE   (0x00000000u)
#define CSL_EDMACC_CCCFG_MP_EXIST_INCLUDED (0x00000001u)

#define CSL_EDMACC_CCCFG_CHMAP_EXIST_MASK (0x01000000u)
#define CSL_EDMACC_CCCFG_CHMAP_EXIST_SHIFT (0x00000018u)
#define CSL_EDMACC_CCCFG_CHMAP_EXIST_RESETVAL (0x00000000u)

/*----CHMAP_EXIST Tokens----*/
#define CSL_EDMACC_CCCFG_CHMAP_EXIST_NONE (0x00000000u)
#define CSL_EDMACC_CCCFG_CHMAP_EXIST_INCLUDED (0x00000001u)

#define CSL_EDMACC_CCCFG_NUM_REGN_MASK   (0x00300000u)
#define CSL_EDMACC_CCCFG_NUM_REGN_SHIFT  (0x00000014u)
#define CSL_EDMACC_CCCFG_NUM_REGN_RESETVAL (0x00000000u)

/*----NUM_REGN Tokens----*/
#define CSL_EDMACC_CCCFG_NUM_REGN_4      (0x00000002u)

#define CSL_EDMACC_CCCFG_NUM_TC_MASK     (0x00070000u)
#define CSL_EDMACC_CCCFG_NUM_TC_SHIFT    (0x00000010u)
#define CSL_EDMACC_CCCFG_NUM_TC_RESETVAL (0x00000001u)

/*----NUM_TC Tokens----*/
#define CSL_EDMACC_CCCFG_NUM_TC_1        (0x00000000u)
#define CSL_EDMACC_CCCFG_NUM_TC_2        (0x00000001u)

#define CSL_EDMACC_CCCFG_NUM_PAENTRY_MASK (0x00007000u)
#define CSL_EDMACC_CCCFG_NUM_PAENTRY_SHIFT (0x0000000Cu)
#define CSL_EDMACC_CCCFG_NUM_PAENTRY_RESETVAL (0x00000003u)

/*----NUM_PAENTRY Tokens----*/
#define CSL_EDMACC_CCCFG_NUM_PAENTRY_128 (0x00000003u)

#define CSL_EDMACC_CCCFG_NUM_INTCH_MASK  (0x00000700u)
#define CSL_EDMACC_CCCFG_NUM_INTCH_SHIFT (0x00000008u)
#define CSL_EDMACC_CCCFG_NUM_INTCH_RESETVAL (0x00000004u)

/*----NUM_INTCH Tokens----*/
#define CSL_EDMACC_CCCFG_NUM_INTCH_8     (0x00000001u)
#define CSL_EDMACC_CCCFG_NUM_INTCH_16    (0x00000002u)
#define CSL_EDMACC_CCCFG_NUM_INTCH_32    (0x00000003u)
#define CSL_EDMACC_CCCFG_NUM_INTCH_64    (0x00000004u)

#define CSL_EDMACC_CCCFG_NUM_QDMACH_MASK (0x00000070u)
#define CSL_EDMACC_CCCFG_NUM_QDMACH_SHIFT (0x00000004u)
#define CSL_EDMACC_CCCFG_NUM_QDMACH_RESETVAL (0x00000004u)

/*----NUM_QDMACH Tokens----*/
#define CSL_EDMACC_CCCFG_NUM_QDMACH_8    (0x00000004u)

#define CSL_EDMACC_CCCFG_NUM_DMACH_MASK  (0x00000007u)
#define CSL_EDMACC_CCCFG_NUM_DMACH_SHIFT (0x00000000u)
#define CSL_EDMACC_CCCFG_NUM_DMACH_RESETVAL (0x00000005u)

/*----NUM_DMACH Tokens----*/
#define CSL_EDMACC_CCCFG_NUM_DMACH_64    (0x00000005u)

#define CSL_EDMACC_CCCFG_RESETVAL        (0x00013445u)

/* QCHMAP */

#define CSL_EDMACC_QCHMAP_PAENTRY_MASK   (0x00003FE0u)
#define CSL_EDMACC_QCHMAP_PAENTRY_SHIFT  (0x00000005u)
#define CSL_EDMACC_QCHMAP_PAENTRY_RESETVAL (0x00000000u)

#define CSL_EDMACC_QCHMAP_TRWORD_MASK    (0x0000001Cu)
#define CSL_EDMACC_QCHMAP_TRWORD_SHIFT   (0x00000002u)
#define CSL_EDMACC_QCHMAP_TRWORD_RESETVAL (0x00000000u)

#define CSL_EDMACC_QCHMAP_RESETVAL       (0x00000000u)

/* DMAQNUM */

#define CSL_EDMACC_DMAQNUM_E7_MASK       (0x70000000u)
#define CSL_EDMACC_DMAQNUM_E7_SHIFT      (0x0000001Cu)
#define CSL_EDMACC_DMAQNUM_E7_RESETVAL   (0x00000000u)

#define CSL_EDMACC_DMAQNUM_E6_MASK       (0x07000000u)
#define CSL_EDMACC_DMAQNUM_E6_SHIFT      (0x00000018u)
#define CSL_EDMACC_DMAQNUM_E6_RESETVAL   (0x00000000u)

#define CSL_EDMACC_DMAQNUM_E5_MASK       (0x00700000u)
#define CSL_EDMACC_DMAQNUM_E5_SHIFT      (0x00000014u)
#define CSL_EDMACC_DMAQNUM_E5_RESETVAL   (0x00000000u)

#define CSL_EDMACC_DMAQNUM_E4_MASK       (0x00070000u)
#define CSL_EDMACC_DMAQNUM_E4_SHIFT      (0x00000010u)
#define CSL_EDMACC_DMAQNUM_E4_RESETVAL   (0x00000000u)

#define CSL_EDMACC_DMAQNUM_E3_MASK       (0x00007000u)
#define CSL_EDMACC_DMAQNUM_E3_SHIFT      (0x0000000Cu)
#define CSL_EDMACC_DMAQNUM_E3_RESETVAL   (0x00000000u)

#define CSL_EDMACC_DMAQNUM_E2_MASK       (0x00000700u)
#define CSL_EDMACC_DMAQNUM_E2_SHIFT      (0x00000008u)
#define CSL_EDMACC_DMAQNUM_E2_RESETVAL   (0x00000000u)

#define CSL_EDMACC_DMAQNUM_E1_MASK       (0x00000070u)
#define CSL_EDMACC_DMAQNUM_E1_SHIFT      (0x00000004u)
#define CSL_EDMACC_DMAQNUM_E1_RESETVAL   (0x00000000u)

#define CSL_EDMACC_DMAQNUM_E0_MASK       (0x00000007u)
#define CSL_EDMACC_DMAQNUM_E0_SHIFT      (0x00000000u)
#define CSL_EDMACC_DMAQNUM_E0_RESETVAL   (0x00000000u)

#define CSL_EDMACC_DMAQNUM_RESETVAL      (0x00000000u)

/* QDMAQNUM */

#define CSL_EDMACC_QDMAQNUM_E7_MASK      (0x70000000u)
#define CSL_EDMACC_QDMAQNUM_E7_SHIFT     (0x0000001Cu)
#define CSL_EDMACC_QDMAQNUM_E7_RESETVAL  (0x00000000u)

#define CSL_EDMACC_QDMAQNUM_E6_MASK      (0x07000000u)
#define CSL_EDMACC_QDMAQNUM_E6_SHIFT     (0x00000018u)
#define CSL_EDMACC_QDMAQNUM_E6_RESETVAL  (0x00000000u)

#define CSL_EDMACC_QDMAQNUM_E5_MASK      (0x00700000u)
#define CSL_EDMACC_QDMAQNUM_E5_SHIFT     (0x00000014u)
#define CSL_EDMACC_QDMAQNUM_E5_RESETVAL  (0x00000000u)

#define CSL_EDMACC_QDMAQNUM_E4_MASK      (0x00070000u)
#define CSL_EDMACC_QDMAQNUM_E4_SHIFT     (0x00000010u)
#define CSL_EDMACC_QDMAQNUM_E4_RESETVAL  (0x00000000u)

#define CSL_EDMACC_QDMAQNUM_E3_MASK      (0x00007000u)
#define CSL_EDMACC_QDMAQNUM_E3_SHIFT     (0x0000000Cu)
#define CSL_EDMACC_QDMAQNUM_E3_RESETVAL  (0x00000000u)