davincievm_aic33_opencodec.c

TI的DM6446的硬件平台搭建的相关例子

/*
 *  Copyright 2005 by Spectrum Digital Incorporated.
 *  All rights reserved. Property of Spectrum Digital Incorporated.
 *
 *  Not for distribution.
 */

/*
 *  AIC33 implementation
 *
 */

#include "davincievm_aic33.h"

#ifdef ARM_SIDE

    CSL_McbspHandle mcbsp_handle;
    CSL_McbspObj    mcbsp_obj;

#elif DSP_SIDE

#endif

/* ------------------------------------------------------------------------ *
 *                                                                          *
 *  DAVINCIEVM_AIC33_openCodec( )                                           *
 *                                                                          *
 *     Open the codec and return a codec handle                             *
 *                                                                          *
 * ------------------------------------------------------------------------ */
AIC33_CodecHandle DAVINCIEVM_AIC33_openCodec( Uint32 id )
{
    AIC33_CodecHandle aic33_handle = 0;

    #ifdef ARM_SIDE

        /*
         *  Initialize MCBSP
         */
        CSL_Status status;
        CSL_McbspConfig mcbsp_config = {
            0,          // DRR
            0,          // DXR
            0x03000000, // SPCR
            0x00010140, // RCR
            0x00010140, // XCR
            0,          // SRGR
            0,          // MCR
            0,          // RCERAB
            0,          // XCERAB
            0x00000003, // PCR
            0,          // RCERCD
            0,          // XCERCD
            0,          // RCEREF
            0,          // XCEREF
            0,          // RCERGH
            0,          // XCERGH
            0,          // REVTCR
            0,          // XEVTCR
            0,          // RFLR
            0,          // XFLR
            0,          // RSYNCCNT
            0           // XSYNCCNT
        };

        CSL_mcbspInit( 0 );
        mcbsp_handle = CSL_mcbspOpen( &mcbsp_obj, 0, 0, &status );
        status |= CSL_mcbspHwSetupRaw( mcbsp_handle, &mcbsp_config );

        // Release XRST & RRST from reset
        /*
        CSL_FINS( mcbsp_handle->regs->SPCR, MCBSP_SPCR_XRST, 1 );
        CSL_FINS( mcbsp_handle->regs->SPCR, MCBSP_SPCR_RRST, 1 );
        */
        MCBSP_SPCR |= MCBSP_SPCR_XRST;
        MCBSP_SPCR |= MCBSP_SPCR_RRST;

    #elif DSP_SIDE

        /*
         *  Initialize MCBSP
         */
        MCBSP_PCR  = 0x00000003;
        MCBSP_RCR  = 0x00010140;
        MCBSP_XCR  = 0x00010140;
        MCBSP_SRGR = 0x00000000;
        MCBSP_SPCR = 0x03010001;

    #endif

   // DAVINCIEVM_AIC33_rset( aic33_handle, AIC33_PAGESELECT, 0 );// Select page 0
  //  DAVINCIEVM_AIC33_rset( aic33_handle, AIC33_RESET, 0x80 );  // Reset AIC33
  //  DAVINCIEVM_AIC33_config( aic33_handle, config );           // Config AIC33 regs

    return aic33_handle;
}