📄 lcdc_init_plane_b.c
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/*
* File: LCDC_init_plane_b.c
* Purpose: Background Window Configuration
*
* Notes: This file configures
*
*/
/*************************** Includes **************************/
#include "common.h"
#include "LCDC_init_plane.h"
/* Global variable to indicate which revision of the board is
being used. The LCD hardware init is slightly different starting
with Rev D of the EVB */
int board_rev;
//**************************************************
/* Configure horizontal LCD timing
H = H_WAIT_1 + H_WIDTH + H_WAIT_2 + XMAX
H_WAIT1 = delay in Pixel CLK periods between OE & HSYNC
H_WIDTH = width of Horizontal Sync Pulse in Pixel CLK periods
H_WAIT2 = delay between HSYNC & first data of next line */
/* Configure vertical LCD timing
V_WAIT1 = delay between OE and VSYNC (in TFT)
V_WIDTH = Vertical Sync pulse width in HSYNC periods
V_WAIT2 = delay between VSYNC and OE of the first line of next frame*/
uint8 Panel_Timing[][6] =
/*[H_WAIT_1, H_WIDTH, H_WAIT_2, V_WAIT_1, V_WIDTH, V_WAIT_2]*/
{{/*12.0SVGA*/ 22, 14, 75, 24, 4, 20 },
{/* 3.5QVGA*/ 16, 4, 72, 16, 2, 8 },
{/* 5.7QVGA*/ 16, 4, 50, 40, 4, 8 },
{/* 6.4VGA*/ 36, 4, 96, 40, 4, 35 },
{/*10.4VGA */ 48, 14, 102, 32, 1, 35 }};
/***************************************************
* Function name : LCDC_Init(LCDC_PANEL_TYP p_type, BPP_TYPE BPP, uint8 CLK_DIV)
* returns : return none
* arg1 : pointer to image
* arg2 : none
* Description : detailed description
* Notes : restrictions, odd modes
****************************************************/
void LCDC_Init(LCDC_PANEL_TYPE p_type, Panel_Size panel, BPP_TYPE BPP, uint8 ACD_DIV, uint8 PixClkDiv)
{
/* Configure the panel settings that are used for all panels */
MCF_LCDC_LPCR = (0
| MCF_LCDC_LPCR_PANEL_TYPE(p_type) // TFT enable/Color enable
// |MCF_LCDC_LPCR_PBSIZ(3) // Panel Bus Width, 0=1 bit,1=2,2=4,3=8 (does not matter for TFT)
|MCF_LCDC_LPCR_BPIX(BPP) // BPP, 0=1bpp,1=2,2=4,3=8,4=12,5=16
// |MCF_LCDC_LPCR_PIXPOL // Pixel Polarity, 0 = Active High, 1 = Active Low
|MCF_LCDC_LPCR_ACDSEL // ACD Clock Source select
|MCF_LCDC_LPCR_ACD(ACD_DIV) // ACD Stuff
|MCF_LCDC_LPCR_SCLKSEL // LSCLK Select, 0 = Disable OE & LSCLK when no data output in TFT mode for power savings, 1 = Always on
// |MCF_LCDC_LPCR_SHARP // Sharp Panel Signals Enable
|MCF_LCDC_LPCR_PCD(PixClkDiv) // Pixel CLK Divider, actual divider is PCD value + 1
);
if (!board_rev)
MCF_LCDC_LPCR |= MCF_LCDC_LPCR_OEPOL;
/* Configure the LCD control signals for the panel */
switch(panel)
{ case SHARP_12SVGA:
MCF_LCDC_LPCR |= (
MCF_LCDC_LPCR_CLKPOL // LCD Shift Clock, 0 = Active Falling, 1 = Active Rising (reverse for TFT)
|MCF_LCDC_LPCR_ENDSEL ); // Output Enable Polarity, 0= Active High, 1 = Active Low
break;
case SHARP_104VGA:
MCF_LCDC_LPCR |= (
MCF_LCDC_LPCR_CLKPOL // LCD Shift Clock, 0 = Active Falling, 1 = Active Rising (reverse for TFT)
#ifdef _DIGITALPHOTOALBUM_H
|MCF_LCDC_LPCR_ENDSEL ); // Output Enable Polarity, 0= Active High, 1 = Active Low
#else
); /* For some reason the example project doesn't work with the ENDSEL bit set. */
#endif
break;
case SHARP_64VGA:
MCF_LCDC_LPCR |= (
MCF_LCDC_LPCR_CLKPOL // LCD Shift Clock, 0 = Active Falling, 1 = Active Rising (reverse for TFT)
|MCF_LCDC_LPCR_ENDSEL ); // Output Enable Polarity, 0= Active High, 1 = Active Low
break;
case SHARP_57QVGA:
MCF_LCDC_LPCR |= (
MCF_LCDC_LPCR_LPPOL // Line Pulse Polarity, 0 = Active High, 1 = Active Low
|MCF_LCDC_LPCR_ENDSEL ); // Output Enable Polarity, 0= Active High, 1 = Active Low
break;
case SHARP_35QVGA:
MCF_LCDC_LPCR |= (
MCF_LCDC_LPCR_LPPOL // Line Pulse Polarity, 0 = Active High, 1 = Active Low
|MCF_LCDC_LPCR_ENDSEL ); // Output Enable Polarity, 0= Active High, 1 = Active Low
break;
default:
printf("ERR!! Unsupported panel\n");
break;
}
// Configure horizontal LCD timing
//H = H_WIDTH + H_WAIT_2 + XMAX + H_WAIT_1
MCF_LCDC_LHCR = (0
|MCF_LCDC_LHCR_H_WAIT_1(Panel_Timing[panel][0]) // H_WAIT1 + 1 = delay in Pixel CLK periods between OE & HSYNC
|MCF_LCDC_LHCR_H_WIDTH(Panel_Timing[panel][1]) // H_WIDTH + 1 = width of Horizontal Sync Pulse in Pixel CLK periods
|MCF_LCDC_LHCR_H_WAIT_2(Panel_Timing[panel][2]) // H_WAIT2 + 3 = delay between HSYNC & first data of next line
);
// Configure vertical LCD timing
//V = V_WIDTH + V_WAIT_2 + YMAX + V_WAIT_1
MCF_LCDC_LVCR = (0
|MCF_LCDC_LVCR_V_WAIT_1(Panel_Timing[panel][3]) // V_WAIT1 = delay between OE and VSYNC (in TFT)
|MCF_LCDC_LVCR_V_WIDTH(Panel_Timing[panel][4])// V_WIDTH = Vertical Sync pulse width in HSYNC periods
|MCF_LCDC_LVCR_V_WAIT_2(Panel_Timing[panel][5]) // V_WAIT2 = delay between VSYNC and OE of the first line of next frame
);
}
/**************************************************
* Function name : LCDC_Display_Image(uint8 img[] )
* returns : return none
* arg1 : pointer to image
* arg2 : none
* Description : detailed description
* Notes : restrictions, odd modes
***************************************************/
void LCDC_Display_Image(uint8 img[])
{
uint32 i;
vuint32 *LUT_BG;
uint32 words_per_row;
lcdc_file lcd_file =*(lcdc_file*)img;
printf("\nwidth= %x", lcd_file.header.width);
printf("\nheight= %x", lcd_file.header.height);
printf("\nbpp= %x", lcd_file.header.bpp);
printf("\ncolor_depth= %x", lcd_file.header.color_depth);
printf("\ncolor_table_entries= %x", lcd_file.header.color_table_entries);
printf("\ncolor_table_offset= %x", lcd_file.header.color_table_offset);
printf("\nimage_size= %x", lcd_file.header.image_size);
printf("\nimage_offset= %x", lcd_file.header.image_offset);
words_per_row = lcd_file.header.width >> 2;
switch(lcd_file.header.bpp)
{ case 1: words_per_row >>= 3; break;
case 2: words_per_row >>= 2; break;
case 4: words_per_row >>= 1; break;
case 8: break;
case 12: words_per_row <<= 1; break;
case 16: words_per_row <<= 1; break;
case 18: words_per_row <<= 2; break;
}
//Point SSA to image in memory
MCF_LCDC_LSSAR = (vuint32)img + lcd_file.header.image_offset ;
MCF_LCDC_LSR = (lcd_file.header.width) << 16 | lcd_file.header.height;
MCF_LCDC_LVPWR = words_per_row;
MCF_LCDC_LDCR = ( 0
| MCF_LCDC_LDCR_HM(4)
|MCF_LCDC_LDCR_TM(8) );
if(lcd_file.header.color_table_entries)
{ //printf("\nFilling Background Plane Lookup Table....");
for(i=0; i < (lcd_file.header.color_table_entries); i++)
{
LUT_BG = (uint32*)0xFC0AC800 + i;
*LUT_BG = *(uint32*)(img + lcd_file.header.color_table_offset+ i*4);
}
//printf("\nBackground Plane Lookup Table Filled....");
}
printf("\nLCDC_LSR= 0x%08x", MCF_LCDC_LSR);
printf("\nLCDC_LVPWR= 0x%08x", MCF_LCDC_LVPWR);
printf("\nLCDC_LPCR= 0x%08x", MCF_LCDC_LPCR);
printf("\nLCDC_LSSAR= 0x%08x", MCF_LCDC_LSSAR);
// MCF_LCDC_LGWSAR = 0x40000000; //dummy write
// MCF_LCDC_LGWSR = 0x12 << 20|0xf0; //dummy write
}// End LCDC_Display_BW()
/**************************************************
* Function name : void LCDC_Enable(void)
* returns : return none
* arg1 : none
* arg2 : none
* Description : enable LCDC in miscellaneous control register
* Notes : restrictions, odd modes
**************************************************/
void LCDC_Enable(void)
{ (MCF_CCM_MISCCR |= MCF_CCM_MISCCR_LCD_CHEN);
}//End LCDC_Enable
/**************************************************
* Function name : void LCDC_Disable(void)
* returns : return none
* arg1 : none
* arg2 : none
* Description : Disables LCDC in miscellaneous control register
* Notes : restrictions, odd modes
**************************************************/
void LCDC_Disable(void)
{ (MCF_CCM_MISCCR &= ~MCF_CCM_MISCCR_LCD_CHEN);
}//End LCDC_Enable
/**************************************************
* Function name : Configure_VEEEN_ON(void)
* returns : return none
* arg1 : none
* arg2 : none
* Description : enable LCDC backlight w/ VEEE through D28
* Notes : restrictions, odd modes
**************************************************/
void Configure_VEEEN_ON(void)
{ vuint32 *ptr;
#ifdef M5329EVB
MCF_FBCS1_CSAR = 0x10000000;
MCF_FBCS1_CSMR = 0x001F0001;
MCF_FBCS1_CSCR = 0x002A3780;
MCF_GPIO_PAR_CS = 0x0000003E;
// LATCH enable pin (TIN3)
MCF_GPIO_PAR_TIMER = 0x00;
MCF_GPIO_PDDR_TIMER = 0x08;
MCF_GPIO_PCLRR_TIMER = 0x0;
//Then do a write to 0x1008000 with data 0x0001.
ptr = (vuint32*)(0x10080000);
*ptr = 0xFFFFFFFF;
#else
MCF_FBCS1_CSMR = 0x1FFF0001;
ptr = (vuint32*)(0xC0080000);
*ptr = 0xFFFFFFFF;
#endif
} //End Configure_VEEEN_ON
/**************************************************
* Function name : void Configure_LCD_Ports(void)
* returns : return none
* arg1 : none
* arg2 : none
* Description : enable LCDC pins on GPIO
* Notes : restrictions, odd modes
**************************************************/
void Configure_LCD_Ports(void)
{
int i;
/* Detect the hardware revision of the board */
/* NOTE: This should be done before any FEC initialization. */
/* First configure FEC_TXD0 as an output and drive it high*/
MCF_GPIO_PDDR_FECH |= MCF_GPIO_PDDR_FECH_PDDR_FECH5;
MCF_GPIO_PODR_FECH |= MCF_GPIO_PODR_FECH_PODR_FECH5;
/* Now configure FEC_TXD0 as an input */
MCF_GPIO_PDDR_FECH &= ~MCF_GPIO_PDDR_FECH_PDDR_FECH5;
/* some delay before testing the pin state */
for( i=0; i<0x100; i++);
/* If the pin is high it is the old rev, if low it is the new rev */
if (MCF_GPIO_PPDSDR_FECH & MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH5)
board_rev = 0;
else
board_rev = 1;
(MCF_GPIO_PAR_LCDDATA = 0xff); // enable lcd data pins
if (board_rev)
MCF_GPIO_PAR_LCDCTL = 0x1ef;
else
MCF_GPIO_PAR_LCDCTL = 0x1ff; // enable lcd control pins
}//End Configure_LCD_Ports
/**************************************************
* Function name : void Configure_Bursting(void)
* returns : return none
* arg1 : none
* arg2 : none
* Description : enable LCDC to burst data
* Notes : restrictions, odd modes
**************************************************/
void Configure_Bursting(void)
{
(MCF_SCM_BCR = 0x000003ff);
// (MCF_SCM_BCR = 0x00000304);
}//End Configure_Bursting
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