attiny461.xml

单片机的USB下载线的驱动和驱动的安装及使用方法

<AVRPART>	
	<LOCKBIT>
		<ICON/>
		<ID/>
		<TEXT>[LB1 = 1 :  LB2 = 1] No memory lock features enabled. [LB1 = 0 :  LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB1 = 0 :  LB2 = 0] Same as previous, but verify is also disabled</TEXT>
		<NMB_TEXT>3</NMB_TEXT>
		<NMB_LOCK_BITS>2</NMB_LOCK_BITS>
		<TEXT1>
			<MASK>0x03</MASK>
			<VALUE>0x03</VALUE>
			<TEXT>Mode 1: No memory lock features enabled</TEXT>
		</TEXT1>
		<TEXT2>
			<MASK>0x03</MASK>
			<VALUE>0x02</VALUE>
			<TEXT>Mode 2: Further programming disabled</TEXT>
		</TEXT2>
		<TEXT3>
			<MASK>0x03</MASK>
			<VALUE>0x00</VALUE>
			<TEXT>Mode 3: Further programming and verification disabled</TEXT>
		</TEXT3>
		<LOCKBIT0>
			<NAME>LB1</NAME>
			<TEXT>Lockbit</TEXT>
		</LOCKBIT0>
		<LOCKBIT1>
			<NAME>LB2</NAME>
			<TEXT>Lockbit</TEXT>
		</LOCKBIT1>
	</LOCKBIT>
	<FUSE>
		<LIST>[LOW:HIGH:EXTENDED]</LIST>
		<ICON/>
		<ID/>
		<TEXT/>
		<LOW>
			<NMB_TEXT>50</NMB_TEXT>
			<NMB_FUSE_BITS>8</NMB_FUSE_BITS>
			<TEXT1>
				<MASK>0x80</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Divide clock by 8 internally; [CKDIV8=0]</TEXT>
			</TEXT1>
			<TEXT2>
				<MASK>0x40</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Clock output on PORTB5; [CKOUT=0]</TEXT>
			</TEXT2>
			<TEXT3>
				<MASK>0x3F</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms;   [CKSEL=0000 SUT=00]</TEXT>
			</TEXT3>
			<TEXT4>
				<MASK>0x3F</MASK>
				<VALUE>0x10</VALUE>
				<TEXT>Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0000 SUT=01]</TEXT>
			</TEXT4>
			<TEXT5>
				<MASK>0x3F</MASK>
				<VALUE>0x20</VALUE>
				<TEXT>Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms;  [CKSEL=0000 SUT=10]</TEXT>
			</TEXT5>
			<TEXT6>
				<MASK>0x3F</MASK>
				<VALUE>0x01</VALUE>
				<TEXT>PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms; [CKSEL=0001 SUT=00]</TEXT>
			</TEXT6>
			<TEXT7>
				<MASK>0x3F</MASK>
				<VALUE>0x11</VALUE>
				<TEXT>PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms; [CKSEL=0001 SUT=01]</TEXT>
			</TEXT7>
			<TEXT8>
				<MASK>0x3F</MASK>
				<VALUE>0x21</VALUE>
				<TEXT>PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms; [CKSEL=0001 SUT=10]</TEXT>
			</TEXT8>
			<TEXT9>
				<MASK>0x3F</MASK>
				<VALUE>0x31</VALUE>
				<TEXT>PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms; [CKSEL=0001 SUT=11]</TEXT>
			</TEXT9>
			<TEXT10>
				<MASK>0x3F</MASK>
				<VALUE>0x02</VALUE>
				<TEXT>Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0010 SUT=00]</TEXT>
			</TEXT10>
			<TEXT11>
				<MASK>0x3F</MASK>
				<VALUE>0x12</VALUE>
				<TEXT>Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0010 SUT=01]</TEXT>
			</TEXT11>
			<TEXT12>
				<MASK>0x3F</MASK>
				<VALUE>0x22</VALUE>
				<TEXT>Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0010 SUT=10]; default value</TEXT>
			</TEXT12>
			<TEXT13>
				<MASK>0x3F</MASK>
				<VALUE>0x03</VALUE>
				<TEXT>WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0011 SUT=00]</TEXT>
			</TEXT13>
			<TEXT14>
				<MASK>0x3F</MASK>
				<VALUE>0x13</VALUE>
				<TEXT>WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0011 SUT=01]</TEXT>
			</TEXT14>
			<TEXT15>
				<MASK>0x3F</MASK>
				<VALUE>0x23</VALUE>
				<TEXT>WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0011 SUT=10]</TEXT>
			</TEXT15>
			<TEXT16>
				<MASK>0x3F</MASK>
				<VALUE>0x04</VALUE>
				<TEXT>Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms; [CKSEL=0100 SUT=00]</TEXT>
			</TEXT16>
			<TEXT17>
				<MASK>0x3F</MASK>
				<VALUE>0x14</VALUE>
				<TEXT>Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms; [CKSEL=0100 SUT=01]</TEXT>
			</TEXT17>
			<TEXT18>
				<MASK>0x3F</MASK>
				<VALUE>0x24</VALUE>
				<TEXT>Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms; [CKSEL=0100 SUT=10]</TEXT>
			</TEXT18>
			<TEXT19>
				<MASK>0x3F</MASK>
				<VALUE>0x08</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1000 SUT=00]   </TEXT>
			</TEXT19>
			<TEXT20>
				<MASK>0x3F</MASK>
				<VALUE>0x18</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms;  [CKSEL=1000 SUT=01]   </TEXT>
			</TEXT20>
			<TEXT21>
				<MASK>0x3F</MASK>
				<VALUE>0x28</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms;   [CKSEL=1000 SUT=10]   </TEXT>
			</TEXT21>
			<TEXT22>
				<MASK>0x3F</MASK>
				<VALUE>0x38</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1000 SUT=11]   </TEXT>
			</TEXT22>
			<TEXT23>
				<MASK>0x3F</MASK>
				<VALUE>0x09</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms;  [CKSEL=1001 SUT=00]   </TEXT>
			</TEXT23>
			<TEXT24>
				<MASK>0x3F</MASK>
				<VALUE>0x19</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms;   [CKSEL=1001 SUT=01]   </TEXT>
			</TEXT24>
			<TEXT25>
				<MASK>0x3F</MASK>
				<VALUE>0x29</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1001 SUT=10]   </TEXT>
			</TEXT25>
			<TEXT26>
				<MASK>0x3F</MASK>
				<VALUE>0x39</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms;  [CKSEL=1001 SUT=11]   </TEXT>
			</TEXT26>
			<TEXT27>
				<MASK>0x3F</MASK>
				<VALUE>0x0A</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1010 SUT=00]   </TEXT>
			</TEXT27>
			<TEXT28>
				<MASK>0x3F</MASK>
				<VALUE>0x1A</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms;  [CKSEL=1010 SUT=01]   </TEXT>
			</TEXT28>
			<TEXT29>
				<MASK>0x3F</MASK>
				<VALUE>0x2A</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms;   [CKSEL=1010 SUT=10]   </TEXT>
			</TEXT29>
			<TEXT30>
				<MASK>0x3F</MASK>
				<VALUE>0x3A</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1010 SUT=11]   </TEXT>
			</TEXT30>
			<TEXT31>
				<MASK>0x3F</MASK>
				<VALUE>0x0B</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms;  [CKSEL=1011 SUT=00]   </TEXT>
			</TEXT31>
			<TEXT32>
				<MASK>0x3F</MASK>
				<VALUE>0x1B</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms;   [CKSEL=1011 SUT=01]   </TEXT>
			</TEXT32>
			<TEXT33>
				<MASK>0x3F</MASK>
				<VALUE>0x2B</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1011 SUT=10]   </TEXT>
			</TEXT33>
			<TEXT34>
				<MASK>0x3F</MASK>
				<VALUE>0x3B</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms;  [CKSEL=1011 SUT=11]   </TEXT>
			</TEXT34>
			<TEXT35>
				<MASK>0x3F</MASK>
				<VALUE>0x0C</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1100 SUT=00]   </TEXT>
			</TEXT35>
			<TEXT36>
				<MASK>0x3F</MASK>
				<VALUE>0x1C</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms;  [CKSEL=1100 SUT=01]   </TEXT>
			</TEXT36>
			<TEXT37>
				<MASK>0x3F</MASK>
				<VALUE>0x2C</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms;   [CKSEL=1100 SUT=10]   </TEXT>
			</TEXT37>
			<TEXT38>
				<MASK>0x3F</MASK>
				<VALUE>0x3C</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1100 SUT=11]   </TEXT>
			</TEXT38>
			<TEXT39>
				<MASK>0x3F</MASK>
				<VALUE>0x0D</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms;  [CKSEL=1101 SUT=00]   </TEXT>
			</TEXT39>
			<TEXT40>
				<MASK>0x3F</MASK>
				<VALUE>0x1D</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms;   [CKSEL=1101 SUT=01]   </TEXT>
			</TEXT40>
			<TEXT41>
				<MASK>0x3F</MASK>
				<VALUE>0x2D</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1101 SUT=10]   </TEXT>
			</TEXT41>
			<TEXT42>
				<MASK>0x3F</MASK>
				<VALUE>0x3D</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms;  [CKSEL=1101 SUT=11]   </TEXT>
			</TEXT42>
			<TEXT43>
				<MASK>0x3F</MASK>
				<VALUE>0x0E</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1110 SUT=00]   </TEXT>
			</TEXT43>
			<TEXT44>
				<MASK>0x3F</MASK>
				<VALUE>0x1E</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms;  [CKSEL=1110 SUT=01]   </TEXT>
			</TEXT44>
			<TEXT45>
				<MASK>0x3F</MASK>
				<VALUE>0x2E</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms;   [CKSEL=1110 SUT=10]   </TEXT>
			</TEXT45>
			<TEXT46>
				<MASK>0x3F</MASK>
				<VALUE>0x3E</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1110 SUT=11]   </TEXT>
			</TEXT46>
			<TEXT47>
				<MASK>0x3F</MASK>
				<VALUE>0x0F</VALUE>
				<TEXT>Ext. Ceramic Res.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms;  [CKSEL=1111 SUT=00]   </TEXT>
			</TEXT47>
			<TEXT48>
				<MASK>0x3F</MASK>
				<VALUE>0x1F</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms;   [CKSEL=1111 SUT=01]   </TEXT>
			</TEXT48>
			<TEXT49>
				<MASK>0x3F</MASK>
				<VALUE>0x2F</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1111 SUT=10]   </TEXT>
			</TEXT49>
			<TEXT50>
				<MASK>0x3F</MASK>
				<VALUE>0x3F</VALUE>
				<TEXT>Ext. Crystal Osc.; Frequency 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms;  [CKSEL=1111 SUT=11]   </TEXT>
			</TEXT50>
			<FUSE0>
				<NAME>CKSEL0</NAME>
				<TEXT>Select Clock source</TEXT>
				<DEFAULT>0</DEFAULT>
			</FUSE0>
			<FUSE1>
				<NAME>CKSEL1</NAME>
				<TEXT>Select Clock source</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE1>
			<FUSE2>
				<NAME>CKSEL2</NAME>
				<TEXT>Select Clock source</TEXT>
				<DEFAULT>0</DEFAULT>
			</FUSE2>
			<FUSE3>
				<NAME>CKSEL3</NAME>
				<TEXT>Select Clock source</TEXT>
				<DEFAULT>0</DEFAULT>
			</FUSE3>
			<FUSE4>
				<NAME>SUT0</NAME>
				<TEXT>Select start-up time</TEXT>
				<DEFAULT>0</DEFAULT>
			</FUSE4>
			<FUSE5>
				<NAME>SUT1</NAME>
				<TEXT>Select start-up time</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE5>
			<FUSE6>
				<NAME>CKOUT</NAME>
				<TEXT>Clock Output Enable</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE6>
			<FUSE7>
				<NAME>CKDIV8</NAME>
				<TEXT>Divide clock by 8</TEXT>
				<DEFAULT>0</DEFAULT>
			</FUSE7>
		</LOW>
		<HIGH>
			<NMB_TEXT>13</NMB_TEXT>
			<NMB_FUSE_BITS>8</NMB_FUSE_BITS>
			<TEXT1>
				<MASK>0x80</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Reset Disabled (Enable PB7 as i/o pin); [RSTDISBL=0]</TEXT>
			</TEXT1>
			<TEXT2>
				<MASK>0x40</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Debug Wire enable; [DWEN=0]</TEXT>
			</TEXT2>
			<TEXT3>
				<MASK>0x20</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Serial program downloading (SPI) enabled; [SPIEN=0]</TEXT>
			</TEXT3>
			<TEXT4>
				<MASK>0x10</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Watch-dog Timer always on; [WDTON=0]</TEXT>
			</TEXT4>
			<TEXT5>
				<MASK>0x08</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Preserve EEPROM memory through the Chip Erase cycle; [EESAVE=0]</TEXT>
			</TEXT5>
			<TEXT6>
				<MASK>0x07</MASK>
				<VALUE>0x04</VALUE>
				<TEXT>Brown-out detection level at VCC=4.3 V; [BODLEVEL=100] </TEXT>
			</TEXT6>
			<TEXT7>
				<MASK>0x07</MASK>
				<VALUE>0x05</VALUE>
				<TEXT>Brown-out detection level at VCC=2.7 V; [BODLEVEL=101] </TEXT>
			</TEXT7>
			<TEXT8>
				<MASK>0x07</MASK>
				<VALUE>0x06</VALUE>
				<TEXT>Brown-out detection level at VCC=1.8 V; [BODLEVEL=110] </TEXT>
			</TEXT8>
			<TEXT9>
				<MASK>0x07</MASK>
				<VALUE>0x03</VALUE>
				<TEXT>Brown-out detection level at VCC=2.3 V; [BODLEVEL=011] </TEXT>
			</TEXT9>
			<TEXT10>
				<MASK>0x07</MASK>
				<VALUE>0x02</VALUE>
				<TEXT>Brown-out detection level at VCC=2.2 V; [BODLEVEL=010] </TEXT>
			</TEXT10>
			<TEXT11>
				<MASK>0x07</MASK>
				<VALUE>0x01</VALUE>
				<TEXT>Brown-out detection level at VCC=1.9 V; [BODLEVEL=001] </TEXT>
			</TEXT11>
			<TEXT12>
				<MASK>0x07</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Brown-out detection level at VCC=2.0 V; [BODLEVEL=000] </TEXT>
			</TEXT12>
			<TEXT13>
				<MASK>0x07</MASK>
				<VALUE>0x07</VALUE>
				<TEXT>Brown-out detection disabled; [BODLEVEL=111]                              </TEXT>
			</TEXT13>
			<FUSE0>
				<NAME>BODLEVEL0</NAME>
				<TEXT>Brown-out Detector trigger level</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE0>
			<FUSE1>
				<NAME>BODLEVEL1</NAME>
				<TEXT>Brown-out Detector trigger level</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE1>
			<FUSE2>
				<NAME>BODLEVEL2</NAME>
				<TEXT>Brown-out Detector trigger level</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE2>
			<FUSE3>
				<NAME>EESAVE</NAME>
				<TEXT>EEPROM memory is preserved through the Chip Erase</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE3>
			<FUSE4>
				<NAME>WDTON</NAME>
				<TEXT>Watchdog Timer always on</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE4>
			<FUSE5>
				<NAME>SPIEN</NAME>
				<TEXT>Enable Serial Program and Data Downloading</TEXT>
				<DEFAULT>0</DEFAULT>
			</FUSE5>
			<FUSE6>
				<NAME>DWEN</NAME>
				<TEXT>DebugWIRE Enable</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE6>
			<FUSE7>
				<NAME>RSTDISBL</NAME>
				<TEXT>External Reset disable</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE7>
		</HIGH>
		<EXTENDED>
			<FUSE0>
				<NAME>SELFPRGEN</NAME>
				<TEXT>Self-Programming Enable</TEXT>
				<DEFAULT>1</DEFAULT>
			</FUSE0>
			<NMB_TEXT>1</NMB_TEXT>
			<NMB_FUSE_BITS>1</NMB_FUSE_BITS>
			<TEXT1>
				<MASK>0x01</MASK>
				<VALUE>0x00</VALUE>
				<TEXT>Self Programming enable; [SELFPRGEN=0]</TEXT>
			</TEXT1>
		</EXTENDED>
	</FUSE>
</AVRPART>