📄 hal_uart.lst
字号:
\ 000091 EF MOV A,R7
\ 000092 3400 ADDC A,#0x0
\ 000094 F583 MOV DPH,A
\ 000096 E4 CLR A
\ 000097 F0 MOVX @DPTR,A
\ 000098 8E82 MOV DPL,R6
\ 00009A 8F83 MOV DPH,R7
\ 00009C A3 INC DPTR
\ 00009D A3 INC DPTR
\ 00009E A3 INC DPTR
\ 00009F A3 INC DPTR
\ 0000A0 A3 INC DPTR
\ 0000A1 A3 INC DPTR
\ 0000A2 A3 INC DPTR
\ 0000A3 A3 INC DPTR
\ 0000A4 A3 INC DPTR
\ 0000A5 A3 INC DPTR
\ 0000A6 F0 MOVX @DPTR,A
589 cfg->rxHigh = config->rx.maxBufSize - config->flowControlThreshold;
\ 0000A7 85..82 MOV DPL,?V0 + 0
\ 0000AA 85..83 MOV DPH,?V0 + 1
\ 0000AD A3 INC DPTR
\ 0000AE A3 INC DPTR
\ 0000AF A3 INC DPTR
\ 0000B0 E0 MOVX A,@DPTR
\ 0000B1 F8 MOV R0,A
\ 0000B2 85..82 MOV DPL,?V0 + 2
\ 0000B5 85..83 MOV DPH,?V0 + 3
\ 0000B8 E0 MOVX A,@DPTR
\ 0000B9 C3 CLR C
\ 0000BA 98 SUBB A,R0
\ 0000BB 8E82 MOV DPL,R6
\ 0000BD 8F83 MOV DPH,R7
\ 0000BF A3 INC DPTR
\ 0000C0 A3 INC DPTR
\ 0000C1 A3 INC DPTR
\ 0000C2 A3 INC DPTR
\ 0000C3 A3 INC DPTR
\ 0000C4 A3 INC DPTR
\ 0000C5 A3 INC DPTR
\ 0000C6 F0 MOVX @DPTR,A
590 cfg->rxCB = config->callBackFunc;
\ 0000C7 E5.. MOV A,?V0 + 0
\ 0000C9 241B ADD A,#0x1b
\ 0000CB F582 MOV DPL,A
\ 0000CD E5.. MOV A,?V0 + 1
\ 0000CF 3400 ADDC A,#0x0
\ 0000D1 F583 MOV DPH,A
\ 0000D3 E0 MOVX A,@DPTR
\ 0000D4 F9 MOV R1,A
\ 0000D5 A3 INC DPTR
\ 0000D6 E0 MOVX A,@DPTR
\ 0000D7 FA MOV R2,A
\ 0000D8 A3 INC DPTR
\ 0000D9 E0 MOVX A,@DPTR
\ 0000DA FB MOV R3,A
\ 0000DB EE MOV A,R6
\ 0000DC 2410 ADD A,#0x10
\ 0000DE F582 MOV DPL,A
\ 0000E0 EF MOV A,R7
\ 0000E1 3400 ADDC A,#0x0
\ 0000E3 F583 MOV DPH,A
\ 0000E5 E9 MOV A,R1
\ 0000E6 F0 MOVX @DPTR,A
\ 0000E7 A3 INC DPTR
\ 0000E8 EA MOV A,R2
\ 0000E9 F0 MOVX @DPTR,A
\ 0000EA A3 INC DPTR
\ 0000EB EB MOV A,R3
\ 0000EC F0 MOVX @DPTR,A
591
592 #if HAL_UART_0_ENABLE
593 if ( port == HAL_UART_PORT_0 )
594 {
595 // Only supporting 38400 or 115200 for code size - other is possible.
596 U0BAUD = (config->baudRate == HAL_UART_BR_38400) ? 59 : 216;
597 U0GCR = (config->baudRate == HAL_UART_BR_38400) ? 10 : 11;
598
599 U0CSR |= CSR_RE;
600
601 #if HAL_UART_DMA == 1
602 cfg->flag = UART_CFG_DMA;
603 HAL_UART_ASSERT( (config->rx.maxBufSize <= 128) );
604 HAL_UART_ASSERT( (config->rx.maxBufSize > SAFE_RX_MIN) );
605 cfg->rxBuf = osal_mem_alloc( cfg->rxMax*2 );
606 osal_memset( cfg->rxBuf, ~DMA_PAD, cfg->rxMax*2 );
607 DMA_RX( cfg );
608 #else
609 cfg->flag = 0;
610 HAL_UART_ASSERT( (config->rx.maxBufSize < 256) );
611 cfg->rxBuf = osal_mem_alloc( cfg->rxMax+1 );
612 URX0IE = 1;
613 IEN2 |= UTX0IE;
614 #endif
615
616 // 8 bits/char; no parity; 1 stop bit; stop bit hi.
617 if ( config->flowControl )
618 {
619 cfg->flag |= UART_CFG_FLW;
620 U0UCR = UCR_FLOW | UCR_STOP;
621 // Must rely on H/W for RTS (i.e. Tx stops when receiver negates CTS.)
622 P0SEL |= HAL_UART_0_P0_RTS;
623 // Cannot use H/W for CTS as DMA does not clear the Rx bytes properly.
624 P0DIR |= HAL_UART_0_P0_CTS;
625 RX0_FLOW_ON;
626 }
627 else
628 {
629 U0UCR = UCR_STOP;
630 }
631 }
632 #endif
633
634 #if HAL_UART_1_ENABLE
635 if ( port == HAL_UART_PORT_1 )
636 {
637 // Only supporting 38400 or 115200 for code size - other is possible.
638 U1BAUD = (config->baudRate == HAL_UART_BR_38400) ? 59 : 216;
639 U1GCR = (config->baudRate == HAL_UART_BR_38400) ? 10 : 11;
640
641 U1CSR |= CSR_RE;
642
643 #if HAL_UART_DMA == 2
644 cfg->flag = (UART_CFG_U1F | UART_CFG_DMA);
645 HAL_UART_ASSERT( (config->rx.maxBufSize <= 128) );
646 HAL_UART_ASSERT( (config->rx.maxBufSize > SAFE_RX_MIN) );
647 cfg->rxBuf = osal_mem_alloc( cfg->rxMax*2 );
648 osal_memset( cfg->rxBuf, ~DMA_PAD, cfg->rxMax*2 );
649 DMA_RX( cfg );
650 #else
651 cfg->flag = UART_CFG_U1F;
652 HAL_UART_ASSERT( (config->rx.maxBufSize < 256) );
653 cfg->rxBuf = osal_mem_alloc( cfg->rxMax+1 );
654 URX1IE = 1;
655 IEN2 |= UTX1IE;
656 #endif
657
658 // 8 bits/char; no parity; 1 stop bit; stop bit hi.
659 if ( config->flowControl )
660 {
661 cfg->flag |= UART_CFG_FLW;
662 U1UCR = UCR_FLOW | UCR_STOP;
663 // Must rely on H/W for RTS (i.e. Tx stops when receiver negates CTS.)
664 P1SEL |= HAL_UART_1_P1_RTS;
665 // Cannot use H/W for CTS as DMA does not clear the Rx bytes properly.
666 P1DIR |= HAL_UART_1_P1_CTS;
667 RX1_FLOW_ON;
668 }
669 else
670 {
671 U1UCR = UCR_STOP;
672 }
673 }
674 #endif
675
676 return HAL_UART_SUCCESS;
\ 0000ED 7900 MOV R1,#0x0
\ 0000EF 7F04 MOV R7,#0x4
\ 0000F1 02.... LJMP ?BANKED_LEAVE_XDATA
677 }
678
679 /******************************************************************************
680 * @fn HalUARTClose
681 *
682 * @brief Close the UART
683 *
684 * @param port - UART port
685 *
686 * @return none
687 *****************************************************************************/
\ In segment BANKED_CODE, align 1, keep-with-next
688 void HalUARTClose( uint8 port )
\ HalUARTClose:
689 {
\ 000000 ; Saved register size: 0
\ 000000 ; Auto size: 0
690 #if HAL_UART_CLOSE
691 uartCfg_t *cfg;
692
693 #if HAL_UART_0_ENABLE
694 if ( port == HAL_UART_PORT_0 )
695 {
696 U0CSR &= ~CSR_RE;
697 #if HAL_UART_DMA == 1
698 HAL_DMA_ABORT_CH( HAL_DMA_CH_RX );
699 HAL_DMA_ABORT_CH( HAL_DMA_CH_TX );
700 #else
701 URX0IE = 0;
702 #endif
703 cfg = cfg0;
704 cfg0 = NULL;
705 }
706 #endif
707 #if HAL_UART_1_ENABLE
708 if ( port == HAL_UART_PORT_1 )
709 {
710 U1CSR &= ~CSR_RE;
711 #if HAL_UART_DMA == 2
712 HAL_DMA_ABORT_CH( HAL_DMA_CH_RX );
713 HAL_DMA_ABORT_CH( HAL_DMA_CH_TX );
714 #else
715 URX1IE = 0;
716 #endif
717 cfg = cfg1;
718 cfg1 = NULL;
719 }
720 #endif
721
722 if ( cfg )
723 {
724 if ( cfg->rxBuf )
725 {
726 osal_mem_free( cfg->rxBuf );
727 }
728 if ( cfg->txBuf )
729 {
730 osal_mem_free( cfg->txBuf );
731 }
732 osal_mem_free( cfg );
733 }
734 #endif
735 }
\ 000000 02.... LJMP ?BRET
736
737 /******************************************************************************
738 * @fn HalUARTPoll
739 *
740 * @brief Poll the UART.
741 *
742 * @param none
743 *
744 * @return none
745 *****************************************************************************/
\ In segment BANKED_CODE, align 1, keep-with-next
746 void HalUARTPoll( void )
\ HalUARTPoll:
747 {
\ 000000 ; Saved register size: 0
\ 000000 ; Auto size: 0
748 #if ( HAL_UART_0_ENABLE | HAL_UART_1_ENABLE )
749 static uint8 tickShdw;
750 uartCfg_t *cfg;
751 uint8 tick;
752
753 #if HAL_UART_0_ENABLE
754 if ( cfg0 )
755 {
756 cfg = cfg0;
757 }
758 #endif
759 #if HAL_UART_1_ENABLE
760 if ( cfg1 )
761 {
762 cfg = cfg1;
763 }
764 #endif
765
766 // Use the LSB of the sleep timer (ST0 must be read first anyway).
767 tick = ST0 - tickShdw;
768 tickShdw = ST0;
769
770 do
771 {
772 if ( cfg->txTick > tick )
773 {
774 cfg->txTick -= tick;
775 }
776 else
777 {
778 cfg->txTick = 0;
779 }
780
781 if ( cfg->rxTick > tick )
782 {
783 cfg->rxTick -= tick;
784 }
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