📄 hal_key.s51
字号:
CFI R4 SameValue
CFI R5 SameValue
CFI R6 SameValue
CFI R7 SameValue
CFI V0 SameValue
CFI V1 SameValue
CFI V2 SameValue
CFI V3 SameValue
CFI V4 SameValue
CFI V5 SameValue
CFI V6 SameValue
CFI V7 SameValue
CFI PSPH Undefined
CFI PSPL Undefined
CFI XSPH Undefined
CFI XSPL Undefined
CFI ?RET Concat
CFI ?BRET_EXT SameValue
CFI ?RET_HIGH Frame(CFA_SP, 2)
CFI ?RET_LOW Frame(CFA_SP, 1)
CFI EndCommon cfiCommon1
halKeyPort0Isr SYMBOL "halKeyPort0Isr"
`halKeyPort0Isr??INTVEC 107` SYMBOL "??INTVEC 107", halKeyPort0Isr
halKeyPort1Isr SYMBOL "halKeyPort1Isr"
`halKeyPort1Isr??INTVEC 123` SYMBOL "??INTVEC 123", halKeyPort1Isr
halKeyPort2Isr SYMBOL "halKeyPort2Isr"
`halKeyPort2Isr??INTVEC 51` SYMBOL "??INTVEC 51", halKeyPort2Isr
EXTERN osal_stop_timerEx
FUNCTION osal_stop_timerEx,0202H
ARGFRAME XSTACK, 9, STACK
EXTERN osal_start_timerEx
FUNCTION osal_start_timerEx,0202H
ARGFRAME ISTACK, 2, STACK
ARGFRAME XSTACK, 9, STACK
EXTERN HalAdcRead
FUNCTION HalAdcRead,0202H
ARGFRAME XSTACK, 9, STACK
EXTERN Hal_TaskID
// C:\Texas Instruments\ZStack-1.4.2-1.1.0\Components\hal\target\CC2430DB\hal_key.c
// 1 /**************************************************************************************************
// 2 Filename: hal_key.c
// 3 Revised: $Date: 2007-03-29 16:44:28 -0700 (Thu, 29 Mar 2007) $
// 4 Revision: $Revision: 13896 $
// 5
// 6 Description:
// 7
// 8 This file contains the interface to the HAL KEY Service.
// 9
// 10 Copyright (c) 2006 by Texas Instruments, Inc.
// 11 All Rights Reserved. Permission to use, reproduce, copy, prepare
// 12 derivative works, modify, distribute, perform, display or sell this
// 13 software and/or its documentation for any purpose is prohibited
// 14 without the express written consent of Texas Instruments, Inc.
// 15 **************************************************************************************************/
// 16 /*********************************************************************
// 17 NOTE: If polling is used, the hal_driver task schedules the KeyRead()
// 18 to occur every 100ms. This should be long enough to naturally
// 19 debounce the keys. The KeyRead() function remembers the key
// 20 state of the previous poll and will only return a non-zero
// 21 value if the key state changes.
// 22
// 23 NOTE: If interrupts are used, the KeyRead() function is scheduled
// 24 25ms after the interrupt occurs by the ISR. This delay is used
// 25 for key debouncing. The ISR disables any further Key interrupt
// 26 until KeyRead() is executed. KeyRead() will re-enable Key
// 27 interrupts after executing. Unlike polling, when interrupts
// 28 are enabled, the previous key state is not remembered. This
// 29 means that KeyRead() will return the current state of the keys
// 30 (not a change in state of the keys).
// 31
// 32 NOTE: If interrupts are used, the KeyRead() fucntion is scheduled by
// 33 the ISR. Therefore, the joystick movements will only be detected
// 34 during a pushbutton interrupt caused by S1 or the center joystick
// 35 pushbutton.
// 36
// 37 NOTE: When a switch like S1 is pushed, the S1 signal goes from a normally
// 38 high state to a low state. This transition is typically clean. The
// 39 duration of the low state is around 200ms. When the signal returns
// 40 to the high state, there is a high likelihood of signal bounce, which
// 41 causes a unwanted interrupts. Normally, we would set the interrupt
// 42 edge to falling edge to generate an interrupt when S1 is pushed, but
// 43 because of the signal bounce, it is better to set the edge to rising
// 44 edge to generate an interrupt when S1 is released. The debounce logic
// 45 can then filter out the signal bounce. The result is that we typically
// 46 get only 1 interrupt per button push. This mechanism is not totally
// 47 foolproof because occasionally, signal bound occurs during the falling
// 48 edge as well. A similar mechanism is used to handle the joystick
// 49 pushbutton on the DB. For the EB, we do not have independent control
// 50 of the interrupt edge for the S1 and center joystick pushbutton. As
// 51 a result, only one or the other pushbuttons work reasonably well with
// 52 interrupts. The default is the make the S1 switch on the EB work more
// 53 reliably.
// 54
// 55 *********************************************************************/
// 56
// 57 /**************************************************************************************************
// 58 * INCLUDES
// 59 **************************************************************************************************/
// 60 #include "hal_mcu.h"
ASEGN SFR_AN:DATA:NOROOT,089H
// unsigned char volatile __sfr P0IFG
P0IFG:
DS 1
ASEGN SFR_AN:DATA:NOROOT,08bH
// unsigned char volatile __sfr P2IFG
P2IFG:
DS 1
ASEGN SFR_AN:DATA:NOROOT,08cH
// unsigned char volatile __sfr PICTL
PICTL:
DS 1
ASEGN SFR_AN:DATA:NOROOT,09aH
// unsigned char volatile __sfr IEN2
IEN2:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0f3H
// unsigned char volatile __sfr P0SEL
P0SEL:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0f5H
// unsigned char volatile __sfr P2SEL
P2SEL:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0f7H
// unsigned char volatile __sfr P2INP
P2INP:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0fdH
// unsigned char volatile __sfr P0DIR
P0DIR:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0ffH
// unsigned char volatile __sfr P2DIR
P2DIR:
DS 1
// 61 #include "hal_defs.h"
// 62 #include "hal_types.h"
// 63 #include "hal_drivers.h"
// 64 #include "hal_adc.h"
// 65 #include "hal_key.h"
// 66 #include "osal.h"
// 67
// 68 /**************************************************************************************************
// 69 * MACROS
// 70 **************************************************************************************************/
// 71
// 72 /**************************************************************************************************
// 73 * CONSTANTS
// 74 **************************************************************************************************/
// 75 #define HAL_KEY_BIT0 0x01
// 76 #define HAL_KEY_BIT1 0x02
// 77 #define HAL_KEY_BIT2 0x04
// 78 #define HAL_KEY_BIT3 0x08
// 79 #define HAL_KEY_BIT4 0x10
// 80 #define HAL_KEY_BIT5 0x20
// 81 #define HAL_KEY_BIT6 0x40
// 82 #define HAL_KEY_BIT7 0x80
// 83
// 84 #define HAL_KEY_RISING_EDGE 0
// 85 #define HAL_KEY_FALLING_EDGE 1
// 86
// 87 #define HAL_KEY_PDUP2 0x80
// 88 #define HAL_KEY_PDUP1 0x40
// 89 #define HAL_KEY_PDUP0 0x20
// 90
// 91 #define HAL_KEY_DEBOUNCE_VALUE 25
// 92 #define HAL_KEY_POLLING_VALUE 100
// 93
// 94
// 95 #if defined (HAL_BOARD_CC2430DB)
// 96 #define HAL_KEY_SW_6_ENABLE
// 97 #define HAL_KEY_SW_6_PORT P0 /* Port location of SW1 */
// 98 #define HAL_KEY_SW_6_BIT HAL_KEY_BIT1 /* Bit location of SW1 */
// 99 #define HAL_KEY_SW_6_SEL P0SEL /* Port Select Register for SW1 */
// 100 #define HAL_KEY_SW_6_DIR P0DIR /* Port Direction Register for SW1 */
// 101 #define HAL_KEY_SW_6_IEN IEN1 /* Interrupt Enable Register for SW1 */
// 102 #define HAL_KEY_SW_6_IENBIT HAL_KEY_BIT5 /* Interrupt Enable bit for SW1 */
// 103 #define HAL_KEY_SW_6_EDGE HAL_KEY_RISING_EDGE /* Type of interrupt for SW1 */
// 104 #define HAL_KEY_SW_6_EDGEBIT HAL_KEY_BIT0 /* EdgeType enable bit SW1 */
// 105 #define HAL_KEY_SW_6_ICTL PICTL /* Port Interrupt Control for SW1 */
// 106 #define HAL_KEY_SW_6_ICTLBIT HAL_KEY_BIT3 /* Interrupt enable bit for SW1 */
// 107 #define HAL_KEY_SW_6_PXIFG P0IFG /* Port Interrupt Flag for SW1 */
// 108
// 109 #define HAL_KEY_JOYSTICK_ENABLE
// 110 #define HAL_KEY_JOY_CHN HAL_ADC_CHANNEL_6
// 111
// 112 #define HAL_KEY_SW_5_ENABLE /* 2430DB - SW5 is enabled based on key interrupt enable or not - see config */
// 113 #define HAL_KEY_SW_5_PORT P2 /* Port location of SW5 */
// 114 #define HAL_KEY_SW_5_BIT HAL_KEY_BIT0 /* Bit location of SW5 */
// 115 #define HAL_KEY_SW_5_SEL P2SEL /* Port Select Register for SW5 */
// 116 #define HAL_KEY_SW_5_DIR P2DIR /* Port Direction Register for SW5 */
// 117 #define HAL_KEY_SW_5_INP P2INP /* Port Input Mode Register for SW5 */
// 118 #define HAL_KEY_SW_5_IEN IEN2 /* Interrupt Enable Register for SW5 */
// 119 #define HAL_KEY_SW_5_IENBIT HAL_KEY_BIT1 /* Interrupt Enable bit for SW5 */
// 120 #define HAL_KEY_SW_5_EDGE HAL_KEY_FALLING_EDGE /* Type of interrupt for SW5 */
// 121 #define HAL_KEY_SW_5_EDGEBIT HAL_KEY_BIT2 /* EdgeType enable bit SW5 */
// 122 #define HAL_KEY_SW_5_ICTL PICTL /* Port Interrupt Control for SW5 */
// 123 #define HAL_KEY_SW_5_ICTLBIT HAL_KEY_BIT5 /* Interrupt enable bit for SW5 */
// 124 #define HAL_KEY_SW_5_PXIFG P2IFG /* Port Interrupt Flag for SW5 */
// 125
// 126 #define HAL_KEY_P0INT_LOW_USED HAL_KEY_SW_6_BIT /* P0 can only be enabled/disabled as group of high or low nibble */
// 127 #define HAL_KEY_POINT_HIGH_USED 0 /* P0 can only be enabled/disabled as group of high or low nibble */
// 128 #endif
// 129
// 130 #if defined (HAL_BOARD_CC2430EB) || defined (HAL_BOARD_CC2430BB)
// 131 #define HAL_KEY_SW_6_ENABLE
// 132 #define HAL_KEY_SW_6_PORT P0 /* Port location of SW1 */
// 133 #define HAL_KEY_SW_6_BIT HAL_KEY_BIT1 /* Bit location of SW1 */
// 134 #define HAL_KEY_SW_6_SEL P0SEL /* Port Select Register for SW1 */
// 135 #define HAL_KEY_SW_6_DIR P0DIR /* Port Direction Register for SW1 */
// 136 #define HAL_KEY_SW_6_IEN IEN1 /* Interrupt Enable Register for SW1 */
// 137 #define HAL_KEY_SW_6_IENBIT HAL_KEY_BIT5 /* Interrupt Enable bit for SW1 */
// 138 #define HAL_KEY_SW_6_EDGE HAL_KEY_RISING_EDGE /* Type of interrupt for SW1 */
// 139 #define HAL_KEY_SW_6_EDGEBIT HAL_KEY_BIT0 /* EdgeType enable bit SW1 */
// 140 #define HAL_KEY_SW_6_ICTL PICTL /* Port Interrupt Control for SW1 */
// 141 #define HAL_KEY_SW_6_ICTLBIT HAL_KEY_BIT3 /* Interrupt enable bit for SW1 */
// 142 #define HAL_KEY_SW_6_PXIFG P0IFG /* Port Interrupt Flag for SW1 */
// 143
// 144 #define HAL_KEY_P0INT_LOW_USED HAL_KEY_SW_6_BIT /* P0 can only be enabled/disabled as group of high or low nibble */
// 145 #endif
// 146
// 147 #if defined (HAL_BOARD_CC2430BB)
// 148 #define HAL_KEY_POINT_HIGH_USED 0
// 149 #endif
// 150
// 151 #if defined (HAL_BOARD_CC2430EB)
// 152 #define HAL_KEY_JOYSTICK_ENABLE
// 153 #define HAL_KEY_JOY_CHN HAL_ADC_CHANNEL_6
// 154
// 155 #define HAL_KEY_SW_5_ENABLE
// 156 #define HAL_KEY_SW_5_PORT P0 /* Port location of SW5 */
// 157 #define HAL_KEY_SW_5_BIT HAL_KEY_BIT5 /* Bit location of SW5 */
// 158 #define HAL_KEY_SW_5_SEL P0SEL /* Port Select Register for SW5 */
// 159 #define HAL_KEY_SW_5_DIR P0DIR /* Port Direction Register for SW5 */
// 160 #define HAL_KEY_SW_5_INP P0INP /* Port Input Mode Register for SW5 */
// 161 #define HAL_KEY_SW_5_IEN IEN1 /* Interrupt Enable Register for SW5 */
// 162 #define HAL_KEY_SW_5_IENBIT HAL_KEY_BIT5 /* Interrupt Enable bit for SW5 */
// 163 #define HAL_KEY_SW_5_EDGE HAL_KEY_RISING_EDGE /* Type of interrupt for SW5 */
// 164 #define HAL_KEY_SW_5_EDGEBIT HAL_KEY_BIT2 /* EdgeType enable bit SW5 */
// 165 #define HAL_KEY_SW_5_ICTL PICTL /* Port Interrupt Control for SW5 */
// 166 #define HAL_KEY_SW_5_ICTLBIT HAL_KEY_BIT4 /* Interrupt enable bit for SW5 */
// 167 #define HAL_KEY_SW_5_PXIFG P0IFG /* Port Interrupt Flag for SW5 */
// 168
// 169 #define HAL_KEY_POINT_HIGH_USED HAL_KEY_SW_5_BIT /* P0 can only be enabled/disabled as group of high or low nibble */
// 170 #endif
// 171
// 172 /**************************************************************************************************
// 173 * TYPEDEFS
// 174 **************************************************************************************************/
// 175
// 176
// 177 /**************************************************************************************************
// 178 * GLOBAL VARIABLES
// 179 **************************************************************************************************/
RSEG XDATA_Z:XDATA:NOROOT(0)
REQUIRE __INIT_XDATA_Z
// 180 static uint8 halKeySavedKeys; /* used to store previous key state in polling mode */
??halKeySavedKeys:
DS 1
RSEG XDATA_Z:XDATA:NOROOT(0)
REQUIRE __INIT_XDATA_Z
// 181 static halKeyCBack_t pHalKeyProcessFunction;
??pHalKeyProcessFunction:
DS 3
RSEG XDATA_Z:XDATA:NOROOT(0)
REQUIRE __INIT_XDATA_Z
// 182 bool Hal_KeyIntEnable; /* interrupt enable/disable flag */
Hal_KeyIntEnable:
DS 1
RSEG XDATA_Z:XDATA:NOROOT(0)
REQUIRE __INIT_XDATA_Z
// 183 uint8 halSaveIntKey; /* used by ISR to save state of interrupt-driven keys */
halSaveIntKey:
DS 1
// 184
RSEG XDATA_Z:XDATA:NOROOT(0)
REQUIRE __INIT_XDATA_Z
// 185 static uint8 HalKeyConfigured;
??HalKeyConfigured:
DS 1
// 186
// 187 /**************************************************************************************************
// 188 * FUNCTIONS - Local
// 189 **************************************************************************************************/
// 190 void halProcessKeyInterrupt (void);
// 191
// 192
// 193 /**************************************************************************************************
// 194 * FUNCTIONS - API
// 195 **************************************************************************************************/
// 196 /**************************************************************************************************
// 197 * @fn HalKeyInit
// 198 *
// 199 * @brief Initilize Key Service
// 200 *
// 201 * @param none
// 202 *
// 203 * @return None
// 204 **************************************************************************************************/
RSEG BANKED_CODE:CODE:NOROOT(0)
// 205 void HalKeyInit( void )
HalKeyInit:
CFI Block cfiBlock0 Using cfiCommon0
CFI Function HalKeyInit
// 206 {
PUSH DPL
CFI DPL0 Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
PUSH DPH
CFI DPH0 Frame(CFA_SP, 5)
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