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📄 mac_rx.lst

📁 cc2430应用实例
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   \                                 In segment BANKED_CODE, align 1, keep-with-next
    322          void macRxThresholdIsr(void)
   \                     macRxThresholdIsr:
    323          {
   \   000000   C082         PUSH    DPL
   \   000002   C083         PUSH    DPH
   \   000004                ; Saved register size: 2
   \   000004                ; Auto size: 0
    324            /* if currently reseting, do not execute receive ISR logic */
    325            if (rxResetFlag)
   \   000004   90....       MOV     DPTR,#??rxResetFlag
   \   000007   E0           MOVX    A,@DPTR
   \   000008   702F         JNZ     ??macRxThresholdIsr_0
    326            {
    327              return;
    328            }
    329            
    330            /*
    331             *  Call the function that handles the current receive state.
    332             *  A flag is set for the duration of the call to indicate
    333             *  the ISR is executing.  This is necessary for the reset
    334             *  logic so it does not perform a reset in the middle of
    335             *  executing the ISR.
    336             */
    337            rxIsrActiveFlag = 1;
   \   00000A   7401         MOV     A,#0x1
   \   00000C   90....       MOV     DPTR,#??rxIsrActiveFlag
   \   00000F   F0           MOVX    @DPTR,A
    338            (*pFuncRxState)();
   \   000010                ; Setup parameters for indirect call
   \   000010   90....       MOV     DPTR,#??pFuncRxState
   \   000013   E0           MOVX    A,@DPTR
   \   000014   F9           MOV     R1,A
   \   000015   A3           INC     DPTR
   \   000016   E0           MOVX    A,@DPTR
   \   000017   FA           MOV     R2,A
   \   000018   A3           INC     DPTR
   \   000019   E0           MOVX    A,@DPTR
   \   00001A   8982         MOV     DPL,R1
   \   00001C   8A83         MOV     DPH,R2
   \   00001E   12....       LCALL   ?BCALL               ; Banked call to: DPTR()
    339            rxIsrActiveFlag = 0;
   \   000021   E4           CLR     A
   \   000022   90....       MOV     DPTR,#??rxIsrActiveFlag
   \   000025   F0           MOVX    @DPTR,A
    340            
    341            /* if a reset occurred during the ISR, peform cleanup here */
    342            if (rxResetFlag)
   \   000026   90....       MOV     DPTR,#??rxResetFlag
   \   000029   E0           MOVX    A,@DPTR
   \   00002A   600D         JZ      ??macRxThresholdIsr_0
    343            {
    344              rxHaltCleanupFinalStep();
   \   00002C                ; Setup parameters for call to function rxHaltCleanupFinalStep
   \   00002C   90....       MOV     DPTR,#(??rxHaltCleanupFinalStep & 0xffff)
   \   00002F   74..         MOV     A,#((??rxHaltCleanupFinalStep >> 16) & 0xff)
   \   000031   12....       LCALL   ?BCALL               ; Banked call to: DPTR()
    345              rxResetFlag = 0;
   \   000034   E4           CLR     A
   \   000035   90....       MOV     DPTR,#??rxResetFlag
   \   000038   F0           MOVX    @DPTR,A
   \                     ??macRxThresholdIsr_0:
   \   000039   80..         SJMP    ??Subroutine20_0
    346            }
    347          }
    348          
    349          
    350          /*=================================================================================================
    351           * @fn          rxStartIsr
    352           *
    353           * @brief       First ISR state for receiving a packet - compute packet length, allocate
    354           *              buffer, initialize buffer.  Acknowledgements are handled immediately without
    355           *              allocating a buffer.
    356           *
    357           * @param       none
    358           *
    359           * @return      none
    360           *=================================================================================================
    361           */

   \                                 In segment BANKED_CODE, align 1, keep-with-next
    362          static void rxStartIsr(void)
   \                     ??rxStartIsr:
    363          {
   \   000000   74F4         MOV     A,#-0xc
   \   000002   12....       LCALL   ?BANKED_ENTER_XDATA
   \   000005                ; Saved register size: 12
   \   000005                ; Auto size: 2
   \   000005   74FE         MOV     A,#-0x2
   \   000007   12....       LCALL   ?ALLOC_XSTACK8
    364            uint8  addrLen;
    365            uint8  ackWithPending;
    366            uint8  dstAddrMode;
    367            uint8  srcAddrMode;
    368          
    369            MAC_ASSERT(!macRxActive); /* receive on top of receive */
   \   00000A   90....       MOV     DPTR,#macRxActive
   \   00000D   E0           MOVX    A,@DPTR
   \   00000E   6008         JZ      ??rxStartIsr_1
   \   000010                ; Setup parameters for call to function halAssertHandler
   \   000010   90....       MOV     DPTR,#(halAssertHandler & 0xffff)
   \   000013   74..         MOV     A,#((halAssertHandler >> 16) & 0xff)
   \   000015   12....       LCALL   ?BCALL               ; Banked call to: DPTR()
    370          
    371            /* indicate rx is active */
    372            macRxActive = MAC_RX_ACTIVE_STARTED;
   \                     ??rxStartIsr_1:
   \   000018   7481         MOV     A,#-0x7f
   \   00001A   90....       MOV     DPTR,#macRxActive
   \   00001D   F0           MOVX    @DPTR,A
    373          
    374            /*
    375             *  For bullet proof functionality, need to see if the receiver was just turned off.
    376             *  The logic to request turning off the receiver, disables interrupts and then checks
    377             *  the value of macRxActive.  If it is TRUE, the receiver will not be turned off.
    378             *
    379             *  There is a small hole though.  It's possible to attempt turning off the receiver
    380             *  in the window from when the receive interrupt fires and the point where macRxActive
    381             *  is set to TRUE.  To plug this hole, the on/off status must be tested *after*
    382             *  macRxActive has been set.  If the receiver is off at this point, there is nothing
    383             *  in the RX fifo and the receive is simply aborted.
    384             *
    385             *  Also, there are some considerations in case a hard disable just happened.  Usually,
    386             *  the receiver will just be off at this point after a hard disable.  The check described
    387             *  above will account for this case too.  However, if a hard disable were immediately
    388             *  followed by an enable, the receiver would be on.  To catch this case, the receive
    389             *  FIFO is also tested to see if it is empty.  Recovery is identical to the other cases.
    390             */
    391            if (!macRxOnFlag || MAC_RADIO_RX_FIFO_IS_EMPTY())
   \   00001E   90....       MOV     DPTR,#macRxOnFlag
   \   000021   E0           MOVX    A,@DPTR
   \   000022   600D         JZ      ??rxStartIsr_2
   \   000024   90DF62       MOV     DPTR,#-0x209e
   \   000027   E0           MOVX    A,@DPTR
   \   000028   A2E3         MOV     C,0xE0 /* A   */.3
   \   00002A   4015         JC      ??rxStartIsr_3
   \   00002C   E0           MOVX    A,@DPTR
   \   00002D   A2E2         MOV     C,0xE0 /* A   */.2
   \   00002F   4010         JC      ??rxStartIsr_3
    392            {
    393              /* reset active flag */
    394              macRxActive = MAC_RX_ACTIVE_NO_ACTIVITY;
   \                     ??rxStartIsr_2:
   \   000031   E4           CLR     A
   \   000032   90....       MOV     DPTR,#macRxActive
   \   000035   F0           MOVX    @DPTR,A
    395          
    396              /*
    397               *  To be absolutely bulletproof, must make sure no transmit queue'ed up during
    398               *  the tiny, tiny window when macRxActive was not zero.
    399               */
    400              rxPostRxUpdates();
   \   000036                ; Setup parameters for call to function rxPostRxUpdates
   \   000036   90....       MOV     DPTR,#(??rxPostRxUpdates & 0xffff)
   \   000039   74..         MOV     A,#((??rxPostRxUpdates >> 16) & 0xff)
   \                     ??rxStartIsr_4:
   \   00003B   12....       LCALL   ?BCALL               ; Banked call to: DPTR()
    401          
    402              /* return immediately from here */
    403              return;
   \   00003E   02....       LJMP    ??rxStartIsr_5 & 0xFFFF
    404            }
    405                
    406            /*
    407             *  If interrupts are held off for too long it's possible the previous "transmit done"
    408             *  callback is pending.  If this is the case, it needs to be completed before
    409             *  continuing with the receive logic.
    410             */
    411            MAC_RADIO_FORCE_TX_DONE_IF_PENDING();
   \                     ??rxStartIsr_3:
   \   000041                ; Setup parameters for call to function macCspForceTxDoneIfPending
   \   000041   90....       MOV     DPTR,#(macCspForceTxDoneIfPending & 0xffff)
   \   000044   74..         MOV     A,#((macCspForceTxDoneIfPending >> 16) & 0xff)
   \   000046   12....       LCALL   ?BCALL               ; Banked call to: DPTR()
    412            
    413            /*
    414             *  It's possible receive logic is still waiting for confirmation of an ACK that went out
    415             *  for the previous receive.  This is OK but the callback needs to be canceled at this point.
    416             *  That callback execute receive cleanup logic that will run at the completion
    417             *  of *this* receive.  Also, it is important the flag for the outgoing ACK to be cleared.
    418             */
    419            MAC_RADIO_CANCEL_ACK_TX_DONE_CALLBACK();
   \   000049                ; Setup parameters for call to function macMcuAndRFIM
   \   000049   79EF         MOV     R1,#-0x11
   \   00004B   90....       MOV     DPTR,#(macMcuAndRFIM & 0xffff)
   \   00004E   74..         MOV     A,#((macMcuAndRFIM >> 16) & 0xff)
   \   000050   12....       LCALL   ?BCALL               ; Banked call to: DPTR()
    420            macRxOutgoingAckFlag = 0;
   \   000053   E4           CLR     A
   \   000054   90....       MOV     DPTR,#macRxOutgoingAckFlag
   \   000057   F0           MOVX    @DPTR,A
    421          
    422            /*
    423             *  Make a module-local copy of macRxFilter.  This prevents the selected
    424             *  filter from changing in the middle of a receive.
    425             */
    426            rxFilter = macRxFilter;
   \   000058   90....       MOV     DPTR,#macRxFilter
   \   00005B   E0           MOVX    A,@DPTR
   \   00005C   90....       MOV     DPTR,#??rxFilter
   \   00005F   F0           MOVX    @DPTR,A
    427          
    428            /*-------------------------------------------------------------------------------
    429             *  Read initial frame information from FIFO.
    430             *
    431             *   This code is not triggered until the following are in the RX FIFO:
    432             *     frame length          - one byte containing length of MAC frame (excludes this field)
    433             *     frame control field   - two bytes defining frame type, addressing fields, control flags
    434             *     sequence number       - one byte unique sequence identifier
    435             *     additional two bytes  - these bytes are available in case the received frame is an ACK,
    436             *                             if so, the frame can be verified and responded to immediately,
    437             *                             if not an ACK, these bytes will be processed normally
    438             */
    439          
    440            /* read frame length, frame control field, and sequence number from FIFO */
    441            MAC_RADIO_READ_RX_FIFO(rxBuf, MAC_PHY_PHR_LEN + MAC_FCF_FIELD_LEN + MAC_SEQ_NUM_FIELD_LEN);
   \   000060                ; Setup parameters for call to function macMemReadRxFifo
   \   000060   7904         MOV     R1,#0x4
   \   000062   7A..         MOV     R2,#(??rxBuf & 0xff)
   \   000064   7B..         MOV     R3,#((??rxBuf >> 8) & 0xff)
   \   000066   90....       MOV     DPTR,#(macMemReadRxFifo & 0xffff)
   \   000069   74..         MOV     A,#((macMemReadRxFifo >> 16) & 0xff)
   \   00006B   12....       LCALL   ?BCALL               ; Banked call to: DPTR()
    442          
    443            /* bytes to read from FIFO equals frame length minus length of MHR fields just read from FIFO */
    444            rxUnreadLen = (rxBuf[0] & PHY_PACKET_SIZE_MASK) - MAC_FCF_FIELD_LEN - MAC_SEQ_NUM_FIELD_LEN;
   \   00006E   90....       MOV     DPTR,#??rxBuf
   \   000071   E0           MOVX    A,@DPTR
   \   000072   547F         ANL     A,#0x7f
   \   000074   24FD         ADD     A,#-0x3
   \   000076   90....       MOV     DPTR,#??rxUnreadLen
   \   000079   F0           MOVX    @DPTR,A
    445          
    446            /*

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