hal_uart.s51

cc2430应用实例

HalUARTRead:
        CFI Block cfiBlock5 Using cfiCommon0
        CFI Function HalUARTRead
//  901 {
        MOV	A,#-0xa
        LCALL	?BANKED_ENTER_XDATA
        CFI DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
        CFI DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
        CFI ?BRET_EXT load(1, XDATA, add(CFA_XSP16, literal(-3)))
        CFI ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-4)))
        CFI ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-5)))
        CFI R7 load(1, XDATA, add(CFA_XSP16, literal(-6)))
        CFI V1 load(1, XDATA, add(CFA_XSP16, literal(-7)))
        CFI V0 load(1, XDATA, add(CFA_XSP16, literal(-8)))
        CFI VB load(1, XDATA, add(CFA_XSP16, literal(-9)))
        CFI R6 load(1, XDATA, add(CFA_XSP16, literal(-10)))
        CFI CFA_SP SP+0
        CFI CFA_XSP16 add(XSP16, 10)
        ; Saved register size: 10
        ; Auto size: 0
//  902   uartCfg_t *cfg = NULL;
//  903   uint8 cnt = 0;
        MOV	R7,#0x0
        SJMP	??HalUARTRead_0
//  904 
//  905 #if HAL_UART_0_ENABLE
//  906   if ( port == HAL_UART_PORT_0 )
//  907   {
//  908     cfg = cfg0;
//  909   }
//  910 #endif
//  911 #if HAL_UART_1_ENABLE
//  912   if ( port == HAL_UART_PORT_1 )
//  913   {
//  914     cfg = cfg1;
//  915   }
//  916 #endif
//  917 
//  918   HAL_UART_ASSERT( cfg );
//  919 
//  920   while ( (cfg->rxTail != cfg->rxHead) && (cnt < len) )
//  921   {
//  922     *buf++ = cfg->rxBuf[cfg->rxTail];
//  923     if ( cfg->rxTail == cfg->rxMax )
//  924     {
//  925       cfg->rxTail = 0;
//  926     }
//  927     else
//  928     {
//  929       cfg->rxTail++;
??HalUARTRead_1:
        MOV	DPTR,#0x3
        MOVX	A,@DPTR
        INC	A
??HalUARTRead_2:
        MOVX	@DPTR,A
//  930     }
//  931     cnt++;
        INC	R7
??HalUARTRead_0:
        MOV	DPTR,#0x3
        MOVX	A,@DPTR
        MOV	R6,A
        MOV	DPTR,#0x2
        MOVX	A,@DPTR
        XRL	A,R6
        JZ	??HalUARTRead_3
        MOV	?V0 + 0,R7
        CLR	C
        MOV	A,?V0 + 0
        SUBB	A,R4
        CLR	A
        SUBB	A,R5
        JNC	??HalUARTRead_3
        MOV	DPTR,#0x3
        MOVX	A,@DPTR
        MOV	R0,A
        MOV	DPTR,#0x0
        LCALL	?Subroutine1 & 0xFFFF
??CrossCallReturnLabel_2:
        MOVX	A,@DPTR
        MOV	DPL,R2
        MOV	DPH,R3
        MOVX	@DPTR,A
        INC	DPTR
        MOV	R2,DPL
        MOV	R3,DPH
        MOV	DPTR,#0x3
        MOVX	A,@DPTR
        MOV	R6,A
        MOV	DPTR,#0x4
        MOVX	A,@DPTR
        XRL	A,R6
        JNZ	??HalUARTRead_1
        CLR	A
        MOV	DPTR,#0x3
        SJMP	??HalUARTRead_2
//  932   }
//  933 
//  934 #if HAL_UART_DMA
//  935   #if HAL_UART_ISR
//  936   if ( cfg->flag & UART_CFG_DMA )
//  937   #endif
//  938   {
//  939     /* If there is no flow control on a DMA-driven UART, the Rx Head & Tail
//  940      * pointers must be reset to zero after every read in order to preserve the
//  941      * full length of the Rx buffer. This implies that every Read must read all
//  942      * of the Rx bytes available, or the pointers will not be reset and the
//  943      * next incoming packet may not fit in the Rx buffer space remaining - thus
//  944      * the end portion of the incoming packet that does not fit would be lost.
//  945      */
//  946     if ( !(cfg->flag & UART_CFG_FLW) )
//  947     {
//  948       // This is a trick to trigger the DMA abort and restart logic in pollDMA.
//  949       cfg->flag |= UART_CFG_RXF;
//  950     }
//  951   }
//  952 #endif
//  953 
//  954 #if HAL_UART_ISR
//  955   #if HAL_UART_DMA
//  956   if ( !(cfg->flag & UART_CFG_DMA) )
//  957   #endif
//  958   {
//  959     cfg->rxCnt = UART_RX_AVAIL( cfg );
//  960 
//  961     if ( cfg->flag & UART_CFG_RXF )
//  962     {
//  963       if ( cfg->rxCnt < (cfg->rxMax - SAFE_RX_MIN) )
//  964       {
//  965         RX_STRT_FLOW( cfg );
//  966       }
//  967     }
//  968   }
//  969 #endif
//  970 
//  971   return cnt;
??HalUARTRead_3:
        MOV	A,R7
        MOV	R2,A
        MOV	R3,#0x0
        MOV	R7,#0x2
        LJMP	?BANKED_LEAVE_XDATA
        CFI EndBlock cfiBlock5
//  972 }
//  973 
//  974 /******************************************************************************
//  975  * @fn      HalUARTWrite
//  976  *
//  977  * @brief   Write a buffer to the UART.
//  978  *
//  979  * @param   port    - UART port
//  980  *          pBuffer - pointer to the buffer that will be written, not freed
//  981  *          length  - length of
//  982  *
//  983  * @return  length of the buffer that was sent
//  984  *****************************************************************************/

        RSEG BANKED_CODE:CODE:NOROOT(0)
//  985 uint16 HalUARTWrite( uint8 port, uint8 *buf, uint16 len )
HalUARTWrite:
        CFI Block cfiBlock6 Using cfiCommon0
        CFI Function HalUARTWrite
//  986 {
        MOV	A,#-0x9
        LCALL	?BANKED_ENTER_XDATA
        CFI DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
        CFI DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
        CFI ?BRET_EXT load(1, XDATA, add(CFA_XSP16, literal(-3)))
        CFI ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-4)))
        CFI ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-5)))
        CFI R7 load(1, XDATA, add(CFA_XSP16, literal(-6)))
        CFI V0 load(1, XDATA, add(CFA_XSP16, literal(-7)))
        CFI VB load(1, XDATA, add(CFA_XSP16, literal(-8)))
        CFI R6 load(1, XDATA, add(CFA_XSP16, literal(-9)))
        CFI CFA_SP SP+0
        CFI CFA_XSP16 add(XSP16, 9)
        ; Saved register size: 9
        ; Auto size: 0
//  987   uartCfg_t *cfg = NULL;
//  988   uint8 cnt;
//  989 
//  990 #if HAL_UART_0_ENABLE
//  991   if ( port == HAL_UART_PORT_0 )
//  992   {
//  993     cfg = cfg0;
//  994   }
//  995 #endif
//  996 #if HAL_UART_1_ENABLE
//  997   if ( port == HAL_UART_PORT_1 )
//  998   {
//  999     cfg = cfg1;
// 1000   }
// 1001 #endif
// 1002 
// 1003   HAL_UART_ASSERT( cfg );
// 1004 
// 1005   if ( cfg->txHead == cfg->txTail )
// 1006   {
// 1007 #if HAL_UART_DMA
// 1008     // When pointers are equal, reset to zero to get max len w/out wrapping.
// 1009     cfg->txHead = cfg->txTail = 0;
// 1010 #endif
// 1011 #if HAL_UART_ISR
// 1012 #if HAL_UART_DMA
// 1013     if ( !(cfg->flag & UART_CFG_DMA) )
// 1014 #endif
// 1015     {
// 1016       cfg->flag &= ~UART_CFG_TXF;
// 1017     }
// 1018 #endif
// 1019   }
// 1020 
// 1021   // Accept "all-or-none" on write request.
// 1022   if ( TX_AVAIL( cfg ) < len )
        MOV	DPTR,#0xb
        MOVX	A,@DPTR
        MOV	R6,A
        MOV	DPTR,#0xa
        MOVX	A,@DPTR
        XRL	A,R6
        JNZ	??HalUARTWrite_0
        MOV	DPTR,#0xc
        MOVX	A,@DPTR
        MOV	R0,A
        MOV	A,#-0x1
        ADD	A,R0
        DEC	R0
        MOV	A,#-0x1
        ADDC	A,#0x0
        SJMP	??HalUARTWrite_1
??HalUARTWrite_0:
        MOVX	A,@DPTR
        MOV	DPTR,#0xb
        CLR	C
        SUBB	A,R6
        JNC	??HalUARTWrite_2
        LCALL	?Subroutine0 & 0xFFFF
??CrossCallReturnLabel_0:
        MOV	A,#-0x1
        ADD	A,R0
        DEC	R0
        MOV	A,#-0x1
        SJMP	??HalUARTWrite_3
??HalUARTWrite_2:
        MOV	DPTR,#0xc
        LCALL	?Subroutine0 & 0xFFFF
??CrossCallReturnLabel_1:
        MOV	DPTR,#0xb
        MOVX	A,@DPTR
        ADD	A,R0
        MOV	R0,A
        CLR	A
??HalUARTWrite_3:
        ADDC	A,R1
??HalUARTWrite_1:
        MOV	R1,A
        CLR	C
        MOV	A,R0
        SUBB	A,R4
        MOV	A,R1
        SUBB	A,R5
        JNC	??HalUARTWrite_4
// 1023   {
// 1024     return 0;
        MOV	R2,#0x0
        MOV	R3,#0x0
        SJMP	??HalUARTWrite_5
// 1025   }
// 1026 
// 1027   for ( cnt = len; cnt; cnt-- )
??HalUARTWrite_4:
        MOV	A,R4
        MOV	R7,A
        SJMP	??HalUARTWrite_6
// 1028   {
// 1029     cfg->txBuf[ cfg->txHead ] = *buf++;
// 1030 
// 1031     if ( cfg->txHead == cfg->txMax )
// 1032     {
// 1033       cfg->txHead = 0;
// 1034     }
// 1035     else
// 1036     {
// 1037       cfg->txHead++;
??HalUARTWrite_7:
        MOV	DPTR,#0xa
        MOVX	A,@DPTR
        INC	A
??HalUARTWrite_8:
        MOVX	@DPTR,A
// 1038     }
        DEC	R7
??HalUARTWrite_6:
        MOV	A,R7
        JZ	??HalUARTWrite_9
        MOV	DPL,R2
        MOV	DPH,R3
        MOVX	A,@DPTR
        PUSH	A
        CFI CFA_SP SP+-1
        MOV	DPTR,#0xa
        MOVX	A,@DPTR
        MOV	R0,A
        MOV	DPTR,#0x8
        LCALL	?Subroutine1 & 0xFFFF
??CrossCallReturnLabel_3:
        POP	A
        CFI CFA_SP SP+0
        MOVX	@DPTR,A
        MOV	DPL,R2
        MOV	DPH,R3
        INC	DPTR
        MOV	R2,DPL
        MOV	R3,DPH
        MOV	DPTR,#0xa
        MOVX	A,@DPTR
        MOV	R6,A
        MOV	DPTR,#0xc
        MOVX	A,@DPTR
        XRL	A,R6
        JNZ	??HalUARTWrite_7
        CLR	A
        MOV	DPTR,#0xa
        SJMP	??HalUARTWrite_8
// 1039   }
// 1040 
// 1041 #if HAL_UART_ISR
// 1042 #if HAL_UART_DMA
// 1043   if ( !(cfg->flag & UART_CFG_DMA) )
// 1044 #endif
// 1045   {
// 1046     if ( !(cfg->flag & UART_CFG_TXF) && len )
// 1047     {
// 1048       cfg->flag |= UART_CFG_TXF;
// 1049       if ( !(cfg->flag & UART_CFG_U1F) )
// 1050       {
// 1051         U0DBUF = cfg->txBuf[cfg->txTail];
// 1052       }
// 1053       else
// 1054       {
// 1055         U1DBUF = cfg->txBuf[cfg->txTail];
// 1056       }
// 1057     }
// 1058   }
// 1059 #endif
// 1060 
// 1061   return len;
??HalUARTWrite_9:
        MOV	A,R4
        MOV	R2,A
        MOV	A,R5
        MOV	R3,A
??HalUARTWrite_5:
        MOV	R7,#0x1
        LJMP	?BANKED_LEAVE_XDATA
        CFI EndBlock cfiBlock6
// 1062 }

        RSEG BANKED_CODE:CODE:NOROOT(0)
?Subroutine1:
        CFI Block cfiCond7 Using cfiCommon0
        CFI NoFunction
        CFI Conditional ??CrossCallReturnLabel_3
        CFI R6 load(1, XDATA, add(CFA_XSP16, literal(-9)))
        CFI VB load(1, XDATA, add(CFA_XSP16, literal(-8)))
        CFI V0 load(1, XDATA, add(CFA_XSP16, literal(-7)))
        CFI R7 load(1, XDATA, add(CFA_XSP16, literal(-6)))
        CFI ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-5)))
        CFI ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-4)))
        CFI ?BRET_EXT load(1, XDATA, add(CFA_XSP16, literal(-3)))
        CFI DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
        CFI DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
        CFI CFA_SP SP+-1
        CFI CFA_X