📄 mac_mcu.lst
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411 *
412 * @param count - overflow count compare value
413 *
414 * @return none
415 **************************************************************************************************
416 */
\ In segment BANKED_CODE, align 1, keep-with-next
417 void macMcuOverflowSetCompare(uint32 count)
\ macMcuOverflowSetCompare:
418 {
\ 000000 74F4 MOV A,#-0xc
\ 000002 12.... LCALL ?BANKED_ENTER_XDATA
\ 000005 ; Saved register size: 12
\ 000005 ; Auto size: 4
\ 000005 74FC MOV A,#-0x4
\ 000007 12.... LCALL ?ALLOC_XSTACK8
\ 00000A 12.... LCALL ?Subroutine0 & 0xFFFF
419 halIntState_t s;
420 uint8 imBits;
421
422 MAC_ASSERT(!((count >> 16) & ~PEROF2_BITS)); /* illegal count value */
\ ??CrossCallReturnLabel_3:
\ 00000D 12.... LCALL ?L_MOV_X
\ 000010 7410 MOV A,#0x10
\ 000012 78.. MOV R0,#?V0 + 0
\ 000014 12.... LCALL ?UL_SHR
\ 000017 12.... LCALL ?Subroutine1 & 0xFFFF
\ ??CrossCallReturnLabel_1:
\ 00001A 7001 JNZ ??macMcuOverflowSetCompare_0
\ 00001C E9 MOV A,R1
\ ??macMcuOverflowSetCompare_0:
\ 00001D 6008 JZ ??macMcuOverflowSetCompare_1
\ 00001F ; Setup parameters for call to function halAssertHandler
\ 00001F 90.... MOV DPTR,#(halAssertHandler & 0xffff)
\ 000022 74.. MOV A,#((halAssertHandler >> 16) & 0xff)
\ 000024 12.... LCALL ?BCALL ; Banked call to: DPTR()
423
424 HAL_ENTER_CRITICAL_SECTION(s);
\ ??macMcuOverflowSetCompare_1:
\ 000027 A2AF MOV C,0xa8.7
\ 000029 E4 CLR A
\ 00002A 92E0 MOV 0xE0 /* A */.0,C
\ 00002C FA MOV R2,A
\ 00002D C2AF CLR 0xa8.7
425
426 /* remember value of interrupt mask bits, allows OFCMPIM bit to be restored later */
427 imBits = T2PEROF2 & ~PEROF2_BITS;
\ 00002F 74F0 MOV A,#-0x10
\ 000031 559E ANL A,0x9e
\ 000033 FB MOV R3,A
428
429 /*
430 * Disable overflow compare interrupts. (It is OK to write zero to compare part of
431 * this register. Interrupts are disabled and the new value will be written and the
432 * interrupt flag cleared before interrupts are re-enabled.)
433 */
434 T2PEROF2 = imBits & ~OFCMPIM;
\ 000034 74DF MOV A,#-0x21
\ 000036 5B ANL A,R3
\ 000037 FC MOV R4,A
\ 000038 8C9E MOV 0x9e,R4
435 T2PEROF2 = imBits & ~OFCMPIM; /* writing twice is chip bug workaround */
\ 00003A 8C9E MOV 0x9e,R4
436
437 /* for efficiency, the 32-bit value is decoded using endian abstracted indexing */
438 T2PEROF0 = ((uint8 *)&count)[UINT32_NDX0];
\ 00003C 85..82 MOV DPL,?XSP + 0
\ 00003F 85..83 MOV DPH,?XSP + 1
\ 000042 E0 MOVX A,@DPTR
\ 000043 F59C MOV 0x9c,A
439 T2PEROF1 = ((uint8 *)&count)[UINT32_NDX1];
\ 000045 7401 MOV A,#0x1
\ 000047 12.... LCALL ?XSTACK_DISP0_8
\ 00004A E0 MOVX A,@DPTR
\ 00004B F59D MOV 0x9d,A
440
441 /* see declaration of this shadow variable for more information */
442 shadowPerof2 = ((uint8 *)&count)[UINT32_NDX2];
\ 00004D 7402 MOV A,#0x2
\ 00004F 12.... LCALL ?XSTACK_DISP0_8
\ 000052 E0 MOVX A,@DPTR
\ 000053 90.... MOV DPTR,#??shadowPerof2
\ 000056 F0 MOVX @DPTR,A
443
444 /* write the compare value part of T2PEROF2 without re-enabling overflow compare interrupts */
445 T2PEROF2 = (imBits & ~OFCMPIM) | shadowPerof2;
\ 000057 4C ORL A,R4
\ 000058 FC MOV R4,A
\ 000059 8C9E MOV 0x9e,R4
446 T2PEROF2 = (imBits & ~OFCMPIM) | shadowPerof2; /* writing twice is chip bug workaround */
\ 00005B 8C9E MOV 0x9e,R4
447
448 /*
449 * Now that new compare value is stored, clear the interrupt flag. This is important just
450 * in case a false match was generated as the multi-byte compare value was written.
451 */
452 T2CNF = T2CNF_BASE_VALUE | (~OFCMPIF & T2CNF_IF_BITS);
\ 00005D 75C3C3 MOV 0xc3,#-0x3d
453
454 /* re-enable overflow compare interrupts if they were previously enabled */
455 T2PEROF2 = imBits | shadowPerof2;
\ 000060 E0 MOVX A,@DPTR
\ 000061 4B ORL A,R3
\ 000062 FB MOV R3,A
\ 000063 8B9E MOV 0x9e,R3
456 T2PEROF2 = imBits | shadowPerof2; /* writing twice is chip bug workaround */
\ 000065 8B9E MOV 0x9e,R3
457
458 HAL_EXIT_CRITICAL_SECTION(s);
\ 000067 EA MOV A,R2
\ 000068 A2E0 MOV C,0xE0 /* A */.0
\ 00006A 92AF MOV 0xa8.7,C
459 }
\ 00006C 02.... LJMP ??Subroutine5_0 & 0xFFFF
460
461
462 /**************************************************************************************************
463 * @fn macMcuTimer2Isr
464 *
465 * @brief Interrupt service routine for timer2, the MAC timer.
466 *
467 * @param none
468 *
469 * @return none
470 **************************************************************************************************
471 */
\ In segment NEAR_CODE, align 1, keep-with-next
472 HAL_ISR_FUNCTION( macMcuTimer2Isr, T2_VECTOR )
\ macMcuTimer2Isr:
473 {
\ 000000 C0E0 PUSH A
\ 000002 74F2 MOV A,#-0xe
\ 000004 12.... LCALL ?INTERRUPT_ENTER_XSP
\ 000007 ; Saved register size: 15
\ 000007 ; Auto size: 0
474 uint8 t2perof2;
475
476 /* temporary variable used to suppress volatile access order warning */
477 t2perof2 = T2PEROF2;
\ 000007 E59E MOV A,0x9e
\ 000009 FA MOV R2,A
478
479 /*------------------------------------------------------------------------------------------------
480 * Overflow compare interrupt - triggers when then overflow counter is
481 * equal to the overflow compare register.
482 */
483 if ((T2CNF & OFCMPIF) & t2perof2)
\ 00000A E5C3 MOV A,0xc3
\ 00000C 5A ANL A,R2
\ 00000D 5420 ANL A,#0x20
\ 00000F 600A JZ ??macMcuTimer2Isr_0
484 {
485 /* call function for dealing with the timer compare interrupt */
486 macBackoffTimerCompareIsr();
\ 000011 ; Setup parameters for call to function macBackoffTimerCompareIsr
\ 000011 90.... MOV DPTR,#(macBackoffTimerCompareIsr & 0xffff)
\ 000014 74.. MOV A,#((macBackoffTimerCompareIsr >> 16) & 0xff)
\ 000016 12.... LCALL ?BCALL ; Banked call to: DPTR()
\ 000019 801E SJMP ??macMcuTimer2Isr_1
487
488 /*
489 * NOTE : The interrupt flag for overflow compare is not cleared here. This is done
490 * in the code that sets a new overflow compare value.
491 */
492 }
493
494 /*------------------------------------------------------------------------------------------------
495 * Overflow interrupt - triggers when the hardware timer rolls over.
496 */
497 else if ((T2CNF & PERIF) & t2perof2)
\ ??macMcuTimer2Isr_0:
\ 00001B E5C3 MOV A,0xc3
\ 00001D 5A ANL A,R2
\ 00001E 5440 ANL A,#0x40
\ 000020 6017 JZ ??macMcuTimer2Isr_1
498 {
499 /* call energy detect interrupt function, this interrupt not used for any other functionality */
500 mcuRecordMaxRssiIsr();
\ 000022 90DF07 MOV DPTR,#-0x20f9
\ 000025 E0 MOVX A,@DPTR
\ 000026 FA MOV R2,A
\ 000027 90.... MOV DPTR,#??maxRssi
\ 00002A E0 MOVX A,@DPTR
\ 00002B C3 CLR C
\ 00002C 9A SUBB A,R2
\ 00002D A2D2 MOV C,0xD0 /* PSW */.2
\ 00002F 65D0 XRL A,PSW
\ 000031 33 RLC A
\ 000032 5002 JNC ??macMcuTimer2Isr_2
\ 000034 EA MOV A,R2
\ 000035 F0 MOVX @DPTR,A
501
502 /* clear the interrupt flag by writing a zero to only that flag, write one to other flags */
503 T2CNF = T2CNF_BASE_VALUE | (~PERIF & T2CNF_IF_BITS);
\ ??macMcuTimer2Isr_2:
\ 000036 75C3A3 MOV 0xc3,#-0x5d
504 }
505 }
\ ??macMcuTimer2Isr_1:
\ 000039 REQUIRE ?Subroutine7
\ 000039 ; // Fall through to label ?Subroutine7
\ In segment NEAR_CODE, align 1, keep-with-next
\ ?Subroutine7:
\ 000000 7F01 MOV R7,#0x1
\ 000002 02.... LJMP ?INTERRUPT_LEAVE_XSP
506
507
508 /**************************************************************************************************
509 * @fn macMcuOrT2PEROF2
510 *
511 * @brief This function is used to OR the interrupt mask bits in register T2PERFOF2.
512 * Because of the hardware design a shadow register is required to preserve the
513 * other bits in this register. See the declaration of variable shadowPerof2 above
514 * for a full description.
515 *
516 * @param orValue - value to OR register with
517 *
518 * @return none
519 **************************************************************************************************
520 */
\ In segment BANKED_CODE, align 1, keep-with-next
521 void macMcuOrT2PEROF2(uint8 orValue)
\ macMcuOrT2PEROF2:
522 {
\ 000000 74F7 MOV A,#-0x9
\ 000002 12.... LCALL ?BANKED_ENTER_XDATA
\ 000005 ; Saved register size: 9
\ 000005 ; Auto size: 0
\ 000005 E9 MOV A,R1
\ 000006 FE MOV R6,A
523 halIntState_t s;
524
525 MAC_ASSERT(!(orValue & PEROF2_BITS)); /* only interrupt mask bits should be affected */
\ 000007 740F MOV A,#0xf
\ 000009 5E ANL A,R6
\ 00000A 6008 JZ ??macMcuOrT2PEROF2_0
\ 00000C ; Setup parameters for call to function halAssertHandler
\ 00000C 90.... MOV DPTR,#(halAssertHandler & 0xffff)
\ 00000F 74.. MOV A,#((halAssertHandler >> 16) & 0xff)
\ 000011 12.... LCALL ?BCALL ; Banked call to: DPTR()
526
527 /*
528 * Perform OR operation on⌨️ 快捷键说明
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