uart.fit.eqn

一个完整的用cpld实现串口功能的代码。经过验证

--operation mode is normal

state_rec[3]_lut_out = A1L752 & state_rec[3] # !A1L752 & !A1L162 & (state_rec[3] $ A1L2);
state_rec[3] = DFFEAS(state_rec[3]_lut_out, GLOBAL(clkbaud8x), GLOBAL(rst), , , , , , );


--A1L622 is rxd_buf[7]~152 at LC_X13_Y9_N8
--operation mode is normal

A1L622 = A1L522 & (state_rec[3] $ (state_rec[0] # !A1L171));


--A1L342 is send_state[2]~115 at LC_X12_Y5_N3
--operation mode is normal

A1L342 = state_tras[3] & state_tras[1];


--A1L382 is txd_buf~1740 at LC_X12_Y5_N6
--operation mode is normal

A1L382 = A1L342 & (send_state[2] & (!send_state[1]) # !send_state[2] & (send_state[1] # !send_state[0]));


--txd_buf[1] is txd_buf[1] at LC_X13_Y3_N5
--operation mode is normal

txd_buf[1]_lut_out = A1L772 & (txd_buf[2]) # !A1L772 & A1L582;
txd_buf[1] = DFFEAS(txd_buf[1]_lut_out, GLOBAL(clkbaud8x), GLOBAL(rst), , A1L472, VCC, , , !key_entry2);


--A1L482 is txd_buf~1741 at LC_X13_Y5_N4
--operation mode is normal

A1L482 = txd_buf[1] & (!state_tras[1] # !state_tras[3]) # !key_entry2;


--A1L272 is txd_buf[0]~1742 at LC_X12_Y5_N9
--operation mode is normal

A1L272 = state_tras[2] # !state_tras[3] # !state_tras[0];


--A1L372 is txd_buf[0]~1744 at LC_X13_Y5_N1
--operation mode is normal

A1L372 = state_tras[0] & state_tras[3] & (state_tras[2] $ state_tras[1]) # !state_tras[0] & (state_tras[3] $ (!state_tras[2] & !state_tras[1]));


--key_entry1 is key_entry1 at LC_X14_Y3_N2
--operation mode is normal

key_entry1_lut_out = key_entry1 # !key_input & !A1L471;
key_entry1 = DFFEAS(key_entry1_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , key_entry2, );


--A1L472 is txd_buf[0]~1745 at LC_X13_Y5_N2
--operation mode is normal

A1L472 = key_entry2 & (A1L671 & !A1L372) # !key_entry2 & key_entry1;


--A1L531 is div8_tras_reg[2]~59 at LC_X12_Y4_N9
--operation mode is normal

A1L531 = div8_tras_reg[1] & div8_tras_reg[0] & trasstart;


--A1L331 is div8_tras_reg[1]~60 at LC_X11_Y4_N6
--operation mode is normal

A1L331 = div8_tras_reg[0] & trasstart;


--A1L361 is Mux~3241 at LC_X13_Y4_N0
--operation mode is normal

A1L361 = !state_tras[1] & !state_tras[3] & !state_tras[2] & !state_tras[0];


--A1L461 is Mux~3242 at LC_X13_Y4_N4
--operation mode is normal

A1L461 = trasstart # !send_state[2] # !send_state[1] # !send_state[0];


--A1L572 is txd_buf[0]~1746 at LC_X12_Y4_N8
--operation mode is normal

A1L572 = state_tras[1] & (!state_tras[2] # !state_tras[0]) # !state_tras[1] & (state_tras[2]);


--A1L561 is Mux~3243 at LC_X12_Y4_N3
--operation mode is normal

A1L561 = A1L671 & A1L572 # !A1L671 & (trasstart & !A1L061);


--A1L661 is Mux~3245 at LC_X12_Y4_N2
--operation mode is normal

A1L661 = state_tras[3] & !state_tras[1] & (!state_tras[2]) # !state_tras[3] & (state_tras[1] # state_tras[0] # state_tras[2]);


--A1L862 is trasstart~39 at LC_X12_Y4_N5
--operation mode is normal

A1L862 = key_entry2 & !A1L661;


--A1L442 is send_state[2]~116 at LC_X12_Y5_N7
--operation mode is normal

A1L442 = state_tras[2] & state_tras[0] & key_entry2 & A1L342;


--A1L542 is send_state[2]~117 at LC_X12_Y5_N8
--operation mode is normal

A1L542 = send_state[1] & send_state[0] & A1L671 & A1L442;


--A1L142 is send_state[1]~118 at LC_X13_Y5_N3
--operation mode is normal

A1L142 = send_state[0] & (A1L671 & A1L442);


--A1L761 is Mux~3249 at LC_X13_Y2_N4
--operation mode is normal

A1L761 = state_tras[2] & state_tras[1] & state_tras[0];


--div_reg[14] is div_reg[14] at LC_X8_Y4_N3
--operation mode is normal

div_reg[14]_lut_out = GND;
div_reg[14] = DFFEAS(div_reg[14]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L4, , , VCC);


--div_reg[13] is div_reg[13] at LC_X9_Y5_N0
--operation mode is normal

div_reg[13]_lut_out = A1L7;
div_reg[13] = DFFEAS(div_reg[13]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--div_reg[12] is div_reg[12] at LC_X9_Y5_N6
--operation mode is normal

div_reg[12]_lut_out = GND;
div_reg[12] = DFFEAS(div_reg[12]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L01, , , VCC);


--A1L771 is reduce_nor~228 at LC_X8_Y4_N5
--operation mode is normal

div_reg[15]_qfbk = div_reg[15];
A1L771 = div_reg[14] # div_reg[12] # div_reg[15]_qfbk # div_reg[13];

--div_reg[15] is div_reg[15] at LC_X8_Y4_N5
--operation mode is normal

div_reg[15] = DFFEAS(A1L771, GLOBAL(clk), GLOBAL(rst), , , A1L3, , , VCC);


--div_reg[10] is div_reg[10] at LC_X9_Y4_N0
--operation mode is normal

div_reg[10]_lut_out = GND;
div_reg[10] = DFFEAS(div_reg[10]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L51, , , VCC);


--div_reg[9] is div_reg[9] at LC_X10_Y4_N8
--operation mode is normal

div_reg[9]_lut_out = A1L81;
div_reg[9] = DFFEAS(div_reg[9]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--div_reg[8] is div_reg[8] at LC_X10_Y4_N9
--operation mode is normal

div_reg[8]_lut_out = !A1L181 & A1L12;
div_reg[8] = DFFEAS(div_reg[8]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L871 is reduce_nor~229 at LC_X9_Y4_N1
--operation mode is normal

div_reg[11]_qfbk = div_reg[11];
A1L871 = div_reg[10] # div_reg[11]_qfbk # div_reg[9] # !div_reg[8];

--div_reg[11] is div_reg[11] at LC_X9_Y4_N1
--operation mode is normal

div_reg[11] = DFFEAS(A1L871, GLOBAL(clk), GLOBAL(rst), , , A1L21, , , VCC);


--div_reg[6] is div_reg[6] at LC_X9_Y5_N1
--operation mode is normal

div_reg[6]_lut_out = GND;
div_reg[6] = DFFEAS(div_reg[6]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L62, , , VCC);


--div_reg[5] is div_reg[5] at LC_X8_Y4_N2
--operation mode is normal

div_reg[5]_lut_out = A1L92;
div_reg[5] = DFFEAS(div_reg[5]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--div_reg[4] is div_reg[4] at LC_X8_Y4_N6
--operation mode is normal

div_reg[4]_lut_out = GND;
div_reg[4] = DFFEAS(div_reg[4]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L23, , , VCC);


--A1L971 is reduce_nor~230 at LC_X8_Y4_N0
--operation mode is normal

div_reg[7]_qfbk = div_reg[7];
A1L971 = div_reg[6] # div_reg[5] # div_reg[7]_qfbk # div_reg[4];

--div_reg[7] is div_reg[7] at LC_X8_Y4_N0
--operation mode is normal

div_reg[7] = DFFEAS(A1L971, GLOBAL(clk), GLOBAL(rst), , , A1L42, , , VCC);


--div_reg[2] is div_reg[2] at LC_X9_Y5_N2
--operation mode is normal

div_reg[2]_lut_out = !A1L181 & A1L83;
div_reg[2] = DFFEAS(div_reg[2]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--div_reg[1] is div_reg[1] at LC_X8_Y4_N7
--operation mode is normal

div_reg[1]_lut_out = GND;
div_reg[1] = DFFEAS(div_reg[1]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L04, , , VCC);


--div_reg[0] is div_reg[0] at LC_X8_Y4_N4
--operation mode is normal

div_reg[0]_lut_out = GND;
div_reg[0] = DFFEAS(div_reg[0]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L34, , , VCC);


--A1L081 is reduce_nor~231 at LC_X8_Y4_N8
--operation mode is normal

div_reg[3]_qfbk = div_reg[3];
A1L081 = div_reg[3]_qfbk # div_reg[2] # !div_reg[1] # !div_reg[0];

--div_reg[3] is div_reg[3] at LC_X8_Y4_N8
--operation mode is normal

div_reg[3] = DFFEAS(A1L081, GLOBAL(clk), GLOBAL(rst), , , A1L53, , , VCC);


--A1L181 is reduce_nor~232 at LC_X8_Y4_N1
--operation mode is normal

A1L181 = !A1L081 & !A1L971 & !A1L771 & !A1L871;


--A1L651 is key_entry2~71 at LC_X13_Y4_N1
--operation mode is normal

A1L651 = !send_state[2] # !send_state[0] # !A1L361 # !send_state[1];


--rxd_reg1 is rxd_reg1 at LC_X14_Y6_N9
--operation mode is normal

rxd_reg1_lut_out = GND;
rxd_reg1 = DFFEAS(rxd_reg1_lut_out, GLOBAL(clkbaud8x), GLOBAL(rst), , , rxd, , , VCC);


--A1L921 is div8_rec_reg[2]~51 at LC_X10_Y6_N9
--operation mode is normal

A1L921 = div8_rec_reg[1] & div8_rec_reg[0] & recstart;


--A1L721 is div8_rec_reg[1]~52 at LC_X10_Y6_N8
--operation mode is normal

A1L721 = recstart & div8_rec_reg[0];


--A1L652 is state_rec[0]~802 at LC_X10_Y6_N7
--operation mode is normal

A1L652 = state_rec[1] & (state_rec[3]) # !state_rec[1] & (state_rec[2] & (state_rec[3]) # !state_rec[2] & !state_rec[0] & !state_rec[3]);


--A1L571 is reduce_nor~5 at LC_X11_Y6_N6
--operation mode is normal

A1L571 = !state_rec[2] & !state_rec[1] & !state_rec[3] & !state_rec[0];

--recstart is recstart at LC_X11_Y6_N6
--operation mode is normal

recstart = DFFEAS(A1L571, GLOBAL(clkbaud8x), GLOBAL(rst), , A1L371, , , , );


--recstart_tmp is recstart_tmp at LC_X14_Y6_N2
--operation mode is normal

recstart_tmp_lut_out = !recstart_tmp & rxd_reg2 & !rxd_reg1;
recstart_tmp = DFFEAS(recstart_tmp_lut_out, GLOBAL(clkbaud8x), GLOBAL(rst), , A1L571, , , , );


--A1L752 is state_rec[0]~803 at LC_X11_Y6_N0
--operation mode is normal

A1L752 = A1L571 & !recstart_tmp # !A1L571 & (A1L652 # !A1L522);


--A1L1 is add~898 at LC_X10_Y6_N2
--operation mode is normal

A1L1 = state_rec[1] & (state_rec[0]);


--A1L162 is state_rec~804 at LC_X10_Y6_N6
--operation mode is normal

A1L162 = state_rec[3] & (state_rec[0] # state_rec[2] # state_rec[1]);


--A1L2 is add~899 at LC_X11_Y6_N4
--operation mode is normal

A1L2 = state_rec[1] & state_rec[2] & state_rec[0];


--A1L582 is txd_buf~1747 at LC_X13_Y2_N3
--operation mode is normal

A1L582 = !send_state[2] & (send_state[1] & state_tras[1]);


--txd_buf[2] is txd_buf[2] at LC_X13_Y5_N7
--operation mode is normal

txd_buf[2]_lut_out = A1L782 # !state_tras[3] & txd_buf[3] # !key_entry2;
txd_buf[2] = DFFEAS(txd_buf[2]_lut_out, GLOBAL(clkbaud8x), GLOBAL(rst), , A1L472, , , , );


--A1L772 is txd_buf[1]~1748 at LC_X13_Y3_N2
--operation mode is normal

A1L772 = !state_tras[1] & (state_tras[2] # !state_tras[0]) # !state_tras[3];


--cnt_delay[18] is cnt_delay[18] at LC_X15_Y3_N5
--operation mode is normal

cnt_delay[18]_lut_out = A1L471 & A1L64;
cnt_delay[18] = DFFEAS(cnt_delay[18]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[13] is cnt_delay[13] at LC_X15_Y3_N3
--operation mode is normal

cnt_delay[13]_lut_out = A1L471 & A1L94;
cnt_delay[13] = DFFEAS(cnt_delay[13]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[12] is cnt_delay[12] at LC_X15_Y3_N8
--operation mode is normal

cnt_delay[12]_lut_out = A1L471 & A1L25;
cnt_delay[12] = DFFEAS(cnt_delay[12]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[10] is cnt_delay[10] at LC_X15_Y3_N0
--operation mode is normal

cnt_delay[10]_lut_out = A1L471 & A1L55;
cnt_delay[10] = DFFEAS(cnt_delay[10]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--A1L281 is reduce_nor~233 at LC_X15_Y3_N4
--operation mode is normal

A1L281 = !cnt_delay[13] # !cnt_delay[18] # !cnt_delay[10] # !cnt_delay[12];


--cnt_delay[16] is cnt_delay[16] at LC_X16_Y2_N2
--operation mode is normal

cnt_delay[16]_lut_out = GND;
cnt_delay[16] = DFFEAS(cnt_delay[16]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L16, , , VCC);


--cnt_delay[15] is cnt_delay[15] at LC_X16_Y2_N3
--operation mode is normal

cnt_delay[15]_lut_out = A1L46;
cnt_delay[15] = DFFEAS(cnt_delay[15]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[14] is cnt_delay[14] at LC_X16_Y2_N9
--operation mode is normal

cnt_delay[14]_lut_out = A1L76;
cnt_delay[14] = DFFEAS(cnt_delay[14]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--A1L742 is start_delaycnt~220 at LC_X16_Y2_N8
--operation mode is normal

cnt_delay[17]_qfbk = cnt_delay[17];
A1L742 = !cnt_delay[15] & !cnt_delay[16] & !cnt_delay[17]_qfbk & !cnt_delay[14];

--cnt_delay[17] is cnt_delay[17] at LC_X16_Y2_N8
--operation mode is normal

cnt_delay[17] = DFFEAS(A1L742, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L85, , , VCC);


--cnt_delay[9] is cnt_delay[9] at LC_X14_Y3_N6
--operation mode is normal

cnt_delay[9]_lut_out = A1L27;
cnt_delay[9] = DFFEAS(cnt_delay[9]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[7] is cnt_delay[7] at LC_X16_Y2_N7
--operation mode is normal

cnt_delay[7]_lut_out = GND;
cnt_delay[7] = DFFEAS(cnt_delay[7]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L47, , , VCC);


--cnt_delay[6] is cnt_delay[6] at LC_X16_Y2_N6
--operation mode is normal

cnt_delay[6]_lut_out = A1L77;
cnt_delay[6] = DFFEAS(cnt_delay[6]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--A1L842 is start_delaycnt~221 at LC_X15_Y3_N1
--operation mode is normal

cnt_delay[11]_qfbk = cnt_delay[11];