uart.map.eqn

一个完整的用cpld实现串口功能的代码。经过验证

-- Copyright (C) 1991-2005 Altera Corporation
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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--txd_reg is txd_reg
--operation mode is normal

txd_reg_lut_out = A1L331 & (!A1L431) # !A1L331 & (A1L431 & !txd_buf[0] # !A1L431 & (A1L131));
txd_reg = DFFEAS(txd_reg_lut_out, clkbaud8x, rst, , A1L072, , , , );


--rxd_buf[7] is rxd_buf[7]
--operation mode is normal

rxd_buf[7]_lut_out = rxd_reg2;
rxd_buf[7] = DFFEAS(rxd_buf[7]_lut_out, clkbaud8x, rst, , A1L891, , , , );


--rxd_buf[2] is rxd_buf[2]
--operation mode is normal

rxd_buf[2]_lut_out = rxd_buf[3];
rxd_buf[2] = DFFEAS(rxd_buf[2]_lut_out, clkbaud8x, rst, , A1L891, , , , );


--rxd_buf[1] is rxd_buf[1]
--operation mode is normal

rxd_buf[1]_lut_out = rxd_buf[2];
rxd_buf[1] = DFFEAS(rxd_buf[1]_lut_out, clkbaud8x, rst, , A1L891, , , , );


--rxd_buf[4] is rxd_buf[4]
--operation mode is normal

rxd_buf[4]_lut_out = rxd_buf[5];
rxd_buf[4] = DFFEAS(rxd_buf[4]_lut_out, clkbaud8x, rst, , A1L891, , , , );


--rxd_buf[5] is rxd_buf[5]
--operation mode is normal

rxd_buf[5]_lut_out = rxd_buf[6];
rxd_buf[5] = DFFEAS(rxd_buf[5]_lut_out, clkbaud8x, rst, , A1L891, , , , );


--rxd_buf[0] is rxd_buf[0]
--operation mode is normal

rxd_buf[0]_lut_out = rxd_buf[1];
rxd_buf[0] = DFFEAS(rxd_buf[0]_lut_out, clkbaud8x, rst, , A1L891, , , , );


--rxd_buf[6] is rxd_buf[6]
--operation mode is normal

rxd_buf[6]_lut_out = rxd_buf[7];
rxd_buf[6] = DFFEAS(rxd_buf[6]_lut_out, clkbaud8x, rst, , A1L891, , , , );


--A1L551 is reduce_or~2711
--operation mode is normal

A1L551 = rxd_buf[5] & (!rxd_buf[0] & !rxd_buf[6]);


--A1L651 is reduce_or~2712
--operation mode is normal

A1L651 = rxd_buf[2] # rxd_buf[1] # !A1L551 # !rxd_buf[4];


--A1L751 is reduce_or~2713
--operation mode is normal

A1L751 = rxd_buf[6] & rxd_buf[0] & !rxd_buf[5] & !rxd_buf[4] # !rxd_buf[6] & (rxd_buf[5] & rxd_buf[4]);


--A1L851 is reduce_or~2714
--operation mode is normal

A1L851 = rxd_buf[5] & rxd_buf[4] & !rxd_buf[6] # !rxd_buf[5] & !rxd_buf[4] & rxd_buf[6];


--A1L951 is reduce_or~2715
--operation mode is normal

A1L951 = rxd_buf[0] & rxd_buf[6] & !rxd_buf[5] & !rxd_buf[4];


--A1L061 is reduce_or~2716
--operation mode is normal

A1L061 = rxd_buf[2] & (rxd_buf[1]) # !rxd_buf[2] & (rxd_buf[1] & !A1L851 # !rxd_buf[1] & (!A1L951));


--A1L161 is reduce_or~2717
--operation mode is normal

A1L161 = rxd_buf[6] & (!rxd_buf[5] & !rxd_buf[4]) # !rxd_buf[6] & !rxd_buf[0] & rxd_buf[5] & rxd_buf[4];


--A1L261 is reduce_or~2718
--operation mode is normal

A1L261 = rxd_buf[2] & (A1L061 & (!A1L161) # !A1L061 & !A1L751) # !rxd_buf[2] & (A1L061);


--rxd_buf[3] is rxd_buf[3]
--operation mode is normal

rxd_buf[3]_lut_out = rxd_buf[4];
rxd_buf[3] = DFFEAS(rxd_buf[3]_lut_out, clkbaud8x, rst, , A1L891, , , , );


--A1L361 is reduce_or~2719
--operation mode is normal

A1L361 = rxd_buf[7] # rxd_buf[3] & A1L651 # !rxd_buf[3] & (A1L261);


--A1L461 is reduce_or~2720
--operation mode is normal

A1L461 = rxd_buf[0] & (rxd_buf[1] # !rxd_buf[2]) # !rxd_buf[0] & (rxd_buf[2] & !rxd_buf[5] # !rxd_buf[2] & (rxd_buf[1]));


--A1L561 is reduce_or~2721
--operation mode is normal

A1L561 = rxd_buf[6] & !rxd_buf[4] & !rxd_buf[5] & A1L461 # !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & !A1L461;


--A1L661 is reduce_or~2722
--operation mode is normal

A1L661 = rxd_buf[7] # rxd_buf[3] & A1L651 # !rxd_buf[3] & (!A1L561);


--A1L761 is reduce_or~2723
--operation mode is normal

A1L761 = rxd_buf[6] & !rxd_buf[5] & (!rxd_buf[4]) # !rxd_buf[6] & rxd_buf[5] & !rxd_buf[0] & rxd_buf[4];


--A1L861 is reduce_or~2724
--operation mode is normal

A1L861 = rxd_buf[4] $ (rxd_buf[2] & !rxd_buf[1]);


--A1L961 is reduce_or~2725
--operation mode is normal

A1L961 = rxd_buf[1] & (A1L861 & A1L551 # !A1L861 & (A1L761)) # !rxd_buf[1] & (A1L761 & A1L861);


--A1L071 is reduce_or~2726
--operation mode is normal

A1L071 = rxd_buf[7] # rxd_buf[3] & A1L651 # !rxd_buf[3] & (!A1L961);


--A1L171 is reduce_or~2727
--operation mode is normal

A1L171 = rxd_buf[6] & (rxd_buf[5] # rxd_buf[4]) # !rxd_buf[6] & rxd_buf[5] & rxd_buf[4];


--A1L271 is reduce_or~2728
--operation mode is normal

A1L271 = rxd_buf[2] & (rxd_buf[6] # rxd_buf[0] $ !rxd_buf[1]) # !rxd_buf[2] & !rxd_buf[1] & (rxd_buf[0] # rxd_buf[6]);


--A1L371 is reduce_or~2729
--operation mode is normal

A1L371 = rxd_buf[2] & rxd_buf[6] & (!rxd_buf[1] # !rxd_buf[0]) # !rxd_buf[2] & (rxd_buf[1]);


--A1L471 is reduce_or~2730
--operation mode is normal

A1L471 = A1L271 & (!A1L171 & A1L371) # !A1L271 & (A1L371 & A1L751 # !A1L371 & (A1L171));


--A1L571 is reduce_or~2731
--operation mode is normal

A1L571 = rxd_buf[7] # rxd_buf[3] & A1L651 # !rxd_buf[3] & (!A1L471);


--A1L671 is reduce_or~2732
--operation mode is normal

A1L671 = rxd_buf[0] & !rxd_buf[5] & (!rxd_buf[2] # !rxd_buf[1]) # !rxd_buf[0] & rxd_buf[1] & !rxd_buf[2];


--A1L771 is reduce_or~2733
--operation mode is normal

A1L771 = rxd_buf[6] & !rxd_buf[4] & !rxd_buf[5] & A1L671 # !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & !A1L671;


--A1L871 is reduce_or~2734
--operation mode is normal

A1L871 = rxd_buf[7] # rxd_buf[3] & A1L651 # !rxd_buf[3] & (!A1L771);


--A1L971 is reduce_or~2735
--operation mode is normal

A1L971 = rxd_buf[0] & !rxd_buf[1] & (rxd_buf[2] # !rxd_buf[5]) # !rxd_buf[0] & rxd_buf[1] & (rxd_buf[5] $ !rxd_buf[2]);


--A1L081 is reduce_or~2736
--operation mode is normal

A1L081 = rxd_buf[6] & !rxd_buf[4] & !rxd_buf[5] & A1L971 # !rxd_buf[6] & rxd_buf[4] & rxd_buf[5] & !A1L971;


--A1L181 is reduce_or~2737
--operation mode is normal

A1L181 = rxd_buf[7] # rxd_buf[3] & A1L651 # !rxd_buf[3] & (!A1L081);


--A1L281 is reduce_or~2738
--operation mode is normal

A1L281 = rxd_buf[1] & (!rxd_buf[2] & rxd_buf[6]) # !rxd_buf[1] & (rxd_buf[6] # rxd_buf[0] $ rxd_buf[2]);


--A1L381 is reduce_or~2739
--operation mode is normal

A1L381 = rxd_buf[1] & (rxd_buf[2] # !rxd_buf[0] & rxd_buf[6]) # !rxd_buf[1] & rxd_buf[6] & (rxd_buf[0] $ rxd_buf[2]);


--A1L481 is reduce_or~2740
--operation mode is normal

A1L481 = A1L281 & (!A1L171 & A1L381) # !A1L281 & (A1L381 & A1L851 # !A1L381 & (A1L171));


--A1L581 is reduce_or~2741
--operation mode is normal

A1L581 = rxd_buf[7] # rxd_buf[3] & A1L651 # !rxd_buf[3] & (!A1L481);


--txd_buf[0] is txd_buf[0]
--operation mode is normal

txd_buf[0]_lut_out = A1L552 # A1L652 # !state_tras[1] & !A1L442;
txd_buf[0] = DFFEAS(txd_buf[0]_lut_out, clkbaud8x, rst, , A1L642, , , , );


--div8_tras_reg[2] is div8_tras_reg[2]
--operation mode is normal

div8_tras_reg[2]_lut_out = !div8_tras_reg[2];
div8_tras_reg[2] = DFFEAS(div8_tras_reg[2]_lut_out, clkbaud8x, rst, , A1L701, , , , );


--div8_tras_reg[1] is div8_tras_reg[1]
--operation mode is normal

div8_tras_reg[1]_lut_out = !div8_tras_reg[1];
div8_tras_reg[1] = DFFEAS(div8_tras_reg[1]_lut_out, clkbaud8x, rst, , A1L501, , , , );


--div8_tras_reg[0] is div8_tras_reg[0]
--operation mode is normal

div8_tras_reg[0]_lut_out = !div8_tras_reg[0];
div8_tras_reg[0] = DFFEAS(div8_tras_reg[0]_lut_out, clkbaud8x, rst, , trasstart, , , , );


--A1L841 is reduce_nor~227
--operation mode is normal

A1L841 = div8_tras_reg[2] & div8_tras_reg[1] & div8_tras_reg[0];


--trasstart is trasstart
--operation mode is normal

trasstart_lut_out = state_tras[3] & (A1L731 # A1L531 & A1L631) # !state_tras[3] & A1L531 & A1L631;
trasstart = DFFEAS(trasstart_lut_out, clkbaud8x, rst, , A1L042, , , , );


--send_state[0] is send_state[0]
--operation mode is normal

send_state[0]_lut_out = send_state[0] $ (div8_tras_reg[2] & div8_tras_reg[1] & div8_tras_reg[0]);
send_state[0] = DFFEAS(send_state[0]_lut_out, clkbaud8x, rst, , A1L612, , , , );


--send_state[2] is send_state[2]
--operation mode is normal

send_state[2]_lut_out = !send_state[2];
send_state[2] = DFFEAS(send_state[2]_lut_out, clkbaud8x, rst, , A1L712, , , , );


--send_state[1] is send_state[1]
--operation mode is normal

send_state[1]_lut_out = !send_state[1];
send_state[1] = DFFEAS(send_state[1]_lut_out, clkbaud8x, rst, , A1L312, , , , );


--A1L031 is Mux~3235
--operation mode is normal

A1L031 = trasstart & (!send_state[1] # !send_state[2] # !send_state[0]);


--A1L131 is Mux~3236
--operation mode is normal

A1L131 = txd_reg # A1L841 & A1L031;


--state_tras[0] is state_tras[0]
--operation mode is normal

state_tras[0]_lut_out = state_tras[0] & !A1L841 # !state_tras[0] & A1L841 & !A1L041;
state_tras[0] = DFFEAS(state_tras[0]_lut_out, clkbaud8x, rst, , key_entry2, , , , );


--state_tras[2] is state_tras[2]
--operation mode is normal

state_tras[2]_lut_out = state_tras[2] $ (A1L841 & state_tras[0] & state_tras[1]);
state_tras[2] = DFFEAS(state_tras[2]_lut_out, clkbaud8x, rst, , key_entry2, , , , );


--state_tras[1] is state_tras[1]
--operation mode is normal

state_tras[1]_lut_out = state_tras[1] $ (A1L841 & state_tras[0]);
state_tras[1] = DFFEAS(state_tras[1]_lut_out, clkbaud8x, rst, , key_entry2, , , , );


--A1L231 is Mux~3237
--operation mode is normal

A1L231 = !state_tras[2] & !state_tras[1];


--state_tras[3] is state_tras[3]
--operation mode is normal

state_tras[3]_lut_out = state_tras[3] $ (A1L841 & A1L931);
state_tras[3] = DFFEAS(state_tras[3]_lut_out, clkbaud8x, rst, , key_entry2, , , , );


--A1L331 is Mux~3238
--operation mode is normal

A1L331 = state_tras[3] & (state_tras[0] & A1L841 # !A1L231);


--A1L431 is Mux~3239
--operation mode is normal

A1L431 = A1L841 & (A1L231 & (state_tras[0] # state_tras[3]) # !A1L231 & (!state_tras[3]));


--clkbaud8x is clkbaud8x
--operation mode is normal

clkbaud8x_lut_out = !clkbaud8x;
clkbaud8x = DFFEAS(clkbaud8x_lut_out, clk, rst, , A1L351, , , , );


--key_entry2 is key_entry2
--operation mode is normal

key_entry2_lut_out = A1L821;
key_entry2 = DFFEAS(key_entry2_lut_out, clkbaud8x, rst, , , key_entry1, , , !key_entry2);


--A1L072 is txd_reg~121
--operation mode is normal

A1L072 = key_entry2 & (!state_tras[2] & !state_tras[1] # !state_tras[3]);


--rxd_reg2 is rxd_reg2
--operation mode is normal

rxd_reg2_lut_out = rxd_reg1;
rxd_reg2 = DFFEAS(rxd_reg2_lut_out, clkbaud8x, rst, , , , , , );


--div8_rec_reg[2] is div8_rec_reg[2]
--operation mode is normal

div8_rec_reg[2]_lut_out = !div8_rec_reg[2];
div8_rec_reg[2] = DFFEAS(div8_rec_reg[2]_lut_out, clkbaud8x, rst, , A1L101, , , , );


--div8_rec_reg[1] is div8_rec_reg[1]
--operation mode is normal

div8_rec_reg[1]_lut_out = !div8_rec_reg[1];
div8_rec_reg[1] = DFFEAS(div8_rec_reg[1]_lut_out, clkbaud8x, rst, , A1L99, , , , );


--div8_rec_reg[0] is div8_rec_reg[0]
--operation mode is normal

div8_rec_reg[0]_lut_out = !div8_rec_reg[0];
div8_rec_reg[0] = DFFEAS(div8_rec_reg[0]_lut_out, clkbaud8x, rst, , recstart, , , , );


--A1L791 is rxd_buf[7]~151
--operation mode is normal

A1L791 = div8_rec_reg[2] & div8_rec_reg[1] & div8_rec_reg[0];


--state_rec[2] is state_rec[2]
--operation mode is normal

state_rec[2]_lut_out = A1L922 & state_rec[2] # !A1L922 & !A1L332 & (state_rec[2] $ A1L1);
state_rec[2] = DFFEAS(state_rec[2]_lut_out, clkbaud8x, rst, , , , , , );


--state_rec[1] is state_rec[1]
--operation mode is normal

state_rec[1]_lut_out = A1L922 & state_rec[1] # !A1L922 & !A1L332 & (state_rec[1] $ state_rec[0]);
state_rec[1] = DFFEAS(state_rec[1]_lut_out, clkbaud8x, rst, , , , , , );


--A1L341 is recstart~107
--operation mode is normal

A1L341 = !state_rec[2] & !state_rec[1];


--state_rec[0] is state_rec[0]
--operation mode is normal

state_rec[0]_lut_out = state_rec[0] & A1L922 # !state_rec[0] & !A1L922 & (!A1L332);
state_rec[0] = DFFEAS(state_rec[0]_lut_out, clkbaud8x, rst, , , , , , );


--state_rec[3] is state_rec[3]
--operation mode is normal

state_rec[3]_lut_out = A1L922 & state_rec[3] # !A1L922 & !A1L332 & (state_rec[3] $ A1L2);
state_rec[3] = DFFEAS(state_rec[3]_lut_out, clkbaud8x, rst, , , , , , );


--A1L891 is rxd_buf[7]~152
--operation mode is normal

A1L891 = A1L791 & (state_rec[3] $ (state_rec[0] # !A1L341));


--A1L512 is send_state[2]~115
--operation mode is normal

A1L512 = state_tras[3] & state_tras[1];


--A1L552 is txd_buf~1740
--operation mode is normal

A1L552 = A1L512 & (send_state[2] & (!send_state[1]) # !send_state[2] & (send_state[1] # !send_state[0]));


--txd_buf[1] is txd_buf[1]
--operation mode is normal

txd_buf[1]_lut_out = A1L942 & (txd_buf[2]) # !A1L942 & A1L752;
txd_buf[1] = DFFEAS(txd_buf[1]_lut_out, clkbaud8x, rst, , A1L642, VCC, , , !key_entry2);


--A1L652 is txd_buf~1741
--operation mode is normal

A1L652 = txd_buf[1] & (!state_tras[1] # !state_tras[3]) # !key_entry2;


--A1L442 is txd_buf[0]~1742
--operation mode is normal

A1L442 = state_tras[2] # !state_tras[0] # !state_tras[3];


--A1L542 is txd_buf[0]~1744
--operation mode is normal

A1L542 = state_tras[0] & state_tras[3] & (state_tras[2] $ state_tras[1]) # !state_tras[0] & (state_tras[3] $ (!state_tras[2] & !state_tras[1]));


--key_entry1 is key_entry1
--operation mode is normal

key_entry1_lut_out = key_entry1 # !A1L641 & (!key_input);
key_entry1 = DFFEAS(key_entry1_lut_out, clk, rst, , , , , key_entry2, );


--A1L642 is txd_buf[0]~1745
--operation mode is normal

A1L642 = key_entry2 & !A1L542 & A1L841 # !key_entry2 & (key_entry1);


--A1L701 is div8_tras_reg[2]~59
--operation mode is normal

A1L701 = div8_tras_reg[1] & div8_tras_reg[0] & trasstart;


--A1L501 is div8_tras_reg[1]~60
--operation mode is normal

A1L501 = div8_tras_reg[0] & trasstart;


--A1L531 is Mux~3241
--operation mode is normal

A1L531 = !state_tras[3] & !state_tras[0] & !state_tras[2] & !state_tras[1];


--A1L631 is Mux~3242
--operation mode is normal

A1L631 = trasstart # !send_state[1] # !send_state[2] # !send_state[0];


--A1L742 is txd_buf[0]~1746