📄 startup.lst
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ARM macroassembler Page:1
1 00000000 ;**********************************************************************
2 00000000 ;
3 00000000 ; Filename: startup.s
4 00000000 ;
5 00000000 ; Description: Initialization before the MMU gets turned. This is
6 00000000 ; the first code that gets executed.
7 00000000 ;
8 00000000 ; THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
9 00000000 ; ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
10 00000000 ; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
11 00000000 ; PARTICULAR PURPOSE.
12 00000000 ;
13 00000000 ; Use of this source code is subject to the terms of the Cirrus end-user
14 00000000 ; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
15 00000000 ; If you did not accept the terms of the EULA, you are not authorized to
16 00000000 ; use this source code. For a copy of the EULA, please see the
17 00000000 ; EULA.RTF on your install media.
18 00000000 ;
19 00000000 ; Copyright(c) Cirrus Logic Corporation 2005, All Rights Reserved
20 00000000 ;
21 00000000 ;**********************************************************************
22 00000000
25 00000000 OPT 1 ; reenable listing
26 00000000 OPT 128 ; disable listing of macro expansions
27 00000000
28 00000000
29 00000000 ;
30 00000000 ; ASync bus mode, little endian, MMU disabled
31 00000000 ;
32 00000000 ;CP15R1Init EQU 0xC0000078
33 00000000 CP15R1Init EQU 0xC0001078
34 00000000 CLKSET1DEFAULT EQU 0x000398e7
35 00000000
36 00000000 EBOOT_RUN_FLAG EQU 0x00001234
37 00000000
38 00000000 ;
39 00000000 ; Static memory settings.
40 00000000 ;
41 00000000 SMCBCR_IDCY_MASK EQU 0x0000000F
42 00000000 SMCBCR_IDCY_SHIFT EQU 0
43 00000000 SMCBCR_WST1_MASK EQU 0x000003E0
44 00000000 SMCBCR_WST1_SHIFT EQU 5
45 00000000 SMCBCR_RBLE EQU 0x00000400
46 00000000 SMCBCR_WST2_MASK EQU 0x0000F800
47 00000000 SMCBCR_WST2_SHIFT EQU 11
48 00000000 SMCBCR_WPERR EQU 0x02000000
49 00000000 SMCBCR_WP EQU 0x04000000
50 00000000 SMCBCR_PME EQU 0x08000000
51 00000000 SMCBCR_MASK EQU 0x30000000
52 00000000 SMCBCR_MW_8BIT EQU 0x00000000
53 00000000 SMCBCR_MW_16BIT EQU 0x10000000
54 00000000 SMCBCR_MW_32BIT EQU 0x20000000
55 00000000 SMCBCR_EBIBRKDIS EQU 0x40000000
56 00000000
57 00000000 ROMHDR_dllfirst EQU 0x8
58 00000000 ROMHDR_dlllast EQU 0xC
59 00000000 ROMHDR_physfirst EQU 0x10
60 00000000 ROMHDR_physlast EQU 0x14
61 00000000
62 00000000
63 00000000 IMPORT KernelStart
64 00000000 IMPORT OEMAddressTable
65 00000000 IMPORT SysconSetup
66 00000000 IMPORT SdramCfg
67 00000000 IMPORT pTOC
68 00000000
69 00000000
70 00000000 ;**********************************************************************
71 00000000 ; StartUp routine to initialize the processor.
72 00000000 ;**********************************************************************
73 00000000 STARTUPTEXT
74 00000000 StartString
75 00000000 43 52 55 DCB "CRUS", 0
53 00
76 00000005
77 00000005 LEAF_ENTRY StartUp
78 00000006
79 00000006 ;
80 00000006 ; Kill watch dog timer. Before any thing else.
81 00000006 ;
82 00000006
83 00000006 00 00 *align
83 00000008 e59f0060 ldr r0, =0x80940000
84 0000000c e59f1060 ldr r1, =0xAA55
85 00000010 e5801000 str r1, [r0]
86 00000014
87 00000014 ;
88 00000014 ; ensure SVC32 mode with IRQ and FIQ disabled
89 00000014 ;
90 00000014
91 00000014 e3a000d3 mov r0, #0xd3
92 00000018 e121f000 msr cpsr_c, r0
93 0000001c
94 0000001c ;
95 0000001c ; Check to see if we are executing in flash, if so we may need to
96 0000001c ; setup SDRAM.
97 0000001c ; We always start from flash except codes only in RAM.
98 0000001c ; cmp pc, #0x60000000
99 0000001c ; bls DontConfigureSDRAM
100 0000001c
101 0000001c
102 0000001c ;
103 0000001c ; If we loaded through eboot, SDRAM is already configured.
104 0000001c ; Check the CLKSET1 register to see if it has been modified.
105 0000001c ;
106 0000001c
107 0000001c e59f0054 ldr r0, =0x80930040
108 00000020 e5901000 ldr r1, [r0]
109 00000024 e59f0050 ldr r0, =EBOOT_RUN_FLAG
110 00000028 e1500001 cmp r0, r1
111 0000002c 0a000000 beq DontConfigureSDRAM
112 00000030
113 00000030
114 00000030 ;
115 00000030 ;
116 00000030 ; Configure SDRAM
117 00000030 ;
118 00000030 eb000000 bl SdramCfg
119 00000034
120 00000034 DontConfigureSDRAM
121 00000034
122 00000034 ;
123 00000034 ; Turn off the MMU
124 00000034 ;
125 00000034 e59f0044 ldr r0, =0xC0001078
126 00000038 ee010f10 mcr p15, 0, r0, c1, c0, 0
127 0000003c
128 0000003c ;
129 0000003c ; Configure the flash chips
130 0000003c ;
131 0000003c
132 0000003c IF EP93XX_FLASH_TYPE = "FLASH_TYPE_AMD" :LOR: EP93XX_FLASH_TYPE = "FLASH_TYPE_C3" :LOR: EP93XX
_FLASH_TYPE = "FLASH_TYPE_P3"
136 0000003c ELSE
137 0000003c e59f0040 ldr r0, =0x2000FFEF
138 00000040 ;ldr r0, =((4:SHL:SMCBCR_WST2_SHIFT) :or:
; (15:SHL:SMCBCR_WST1_SHIFT) :or: ;
(1 :and:SMCBCR_IDCY_MASK) :or: ;
SMCBCR_MW_32BIT :or: ; SMCB
CR_WP :or: ; SMCBCR_PME
:or: ; SMCBCR_RBLE)
145 00000040
146 00000040 ENDIF
147 00000040
148 00000040 e59f1040 ldr r1, =0x80080018
149 00000044 e5810000 str r0, [r1]
150 00000048 e1a00000 nop
151 0000004c
152 0000004c
153 0000004c ;
154 0000004c ; If we want an image that copies from flash to ram use the following.
155 0000004c ;
156 0000004c
157 0000004c IF COPY_FLASH_TO_RAM
222 0000004c ENDIF
223 0000004c
224 0000004c ;
225 0000004c ; create a temporary stack below kernel memory from config.bib
226 0000004c ;
227 0000004c
228 0000004c ExecuteFromRam
229 0000004c e3a0d701 mov sp, #0x40000
230 00000050 eb000000 bl SysconSetup
231 00000054
232 00000054 ;
233 00000054 ; clear out magic words for memory and heap
234 00000054 ; (r0) = physical address of OEMAddressTable
235 00000054 ;
236 00000054 ;
237 00000054 ; Calculate the physical address of the table.
238 00000054 ;
239 00000054 ; r0 - Virtual address of OEMAddressTable
240 00000054 ; r1 - Physical Address of Startup
241 00000054 ; r2 - Virtual Address of Startup
242 00000054 ;
243 00000054 ; r0 = r0 - r2 + r1 = Physical address of OEMAddressTable
244 00000054 ;
245 00000054
246 00000054 e59f0030 ldr r0,=OEMAddressTable
247 00000058 e24f105a adr r1,StartUp
248 0000005c e59f202c ldr r2,=StartUp
249 00000060 e0800001 add r0, r0, r1
250 00000064 e0400002 sub r0, r0, r2
251 00000068
252 00000068
253 00000068 eb000000 bl KernelStart
254 0000006c ;
255 0000006c ; KernelStart should never return:
256 0000006c ;
257 0000006c
258 0000006c eafffffe spin b spin
259 00000070
260 00000070
261 00000070
262 00000070 ;****************************************************************************
263 00000070 ; Include the appropriate memory map.
264 00000070 ;****************************************************************************
265 00000070 ; INCLUDE mmumap.inc
266 00000070
267 00000070 ; End of initialization code & data
268 00000070 TEXTAREA
269 00000000
270 00000000 END
Assembly terminated, errors: 0, warnings: 0
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