📄 crunch.lst
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ARM macroassembler Page:1
1 00000000 ;**********************************************************************
2 00000000 ;
3 00000000 ; Filename: crunch.s
4 00000000 ;
5 00000000 ; Description: Includes routines for the context switch save and restore
6 00000000 ; registers for the crunch engine.
7 00000000 ;
8 00000000 ; THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
9 00000000 ; ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
10 00000000 ; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
11 00000000 ; PARTICULAR PURPOSE.
12 00000000 ;
13 00000000 ; Use of this source code is subject to the terms of the Cirrus end-user
14 00000000 ; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
15 00000000 ; If you did not accept the terms of the EULA, you are not authorized to
16 00000000 ; use this source code. For a copy of the EULA, please see the
17 00000000 ; EULA.RTF on your install media.
18 00000000 ;
19 00000000 ; Copyright(c) Cirrus Logic Corporation 2005, All Rights Reserved
20 00000000 ;
21 00000000 ;**********************************************************************
22 00000000
27 00000000 OPT 1 ; reenable listing
28 00000000 OPT 128 ; disable listing of macro expansions
29 00000000
30 00000000 CRUNCH_SAVESIZE EQU 0xB8
31 00000000
32 00000000 TEXTAREA
33 00000000
34 00000000 ;**********************************************************************
35 00000000 ;
36 00000000 ; void OEMInitCoProcRegisterSavedArea( LPBYTE pArea );
37 00000000 ;
38 00000000 ; This function is called by the kernel when a thread is created to
39 00000000 ; initialize the debug registers.
40 00000000 ;
41 00000000 ; r0 - Buffer that will be used to save/restore debug registers.
42 00000000 ; The initialized value will be passed directly to
43 00000000 ; OEMRestoreCoProcRegister when the thread is first scheduled.
44 00000000 ;
45 00000000 ; Currently we don't have any debug coprocessor registers.
46 00000000 ;
47 00000000 ;**********************************************************************
48 00000000
49 00000000 LEAF_ENTRY OEMInitCoProcRegisterSavedArea
50 00000000 e0211001 eor r1, r1, r1
51 00000004 e28020b8 add r2, r0, #CRUNCH_SAVESIZE
52 00000008
53 00000008 InitSaveAreaLoop
54 00000008 e4801004 str r1, [r0], #4
55 0000000c e1500002 cmp r0, r2
56 00000010 3afffffc blo InitSaveAreaLoop
57 00000014
58 00000014 ;
59 00000014 ; Clear the Status register.
60 00000014 ;
61 00000014 cfmv64lr c0, r1
62 00000018 cfmvsc32 c0, c0
63 0000001c
64 0000001c RETURN
65 00000020
66 00000020 ;**********************************************************************
67 00000020 ;
68 00000020 ; void OEMSaveCoProcRegister(LPBYTE pArea);
69 00000020 ;
70 00000020 ; This function is called by the kernel when a thread switch occurs
71 00000020 ; to save the platform specific debug registers. The same area will
72 00000020 ; be passed to OEMRestoreCoProcRegister when the thread is scheduled
73 00000020 ; again.
74 00000020 ;
75 00000020 ; r0 - Pointer to a memory buffer used to store the co-processor
76 00000020 ; registers.
77 00000020 ;
78 00000020 ;**********************************************************************
79 00000020 LEAF_ENTRY OEMSaveCoProcRegister
80 00000020
81 00000020 e10f2000 mrs r2, cpsr ; (r0) = current status
82 00000024 e38210c0 orr r1, r2, #0xC0 ; set interrupt disable bit
83 00000028 e129f001 msr cpsr, r1 ; update status register
84 0000002c
85 0000002c ;
86 0000002c ; Save the DPCS and crunch registers.
87 0000002c ;
88 0000002c cfstr64 c15, [r0, #0x78]
89 00000030 cfmv32sc c15, c0
90 00000034 cfstr64 c15, [r0, #0xb0]
91 00000038 cfstr64 c0, [r0, #0x00]
92 0000003c cfstr64 c1, [r0, #0x08]
93 00000040 cfstr64 c2, [r0, #0x10]
94 00000044 cfstr64 c3, [r0, #0x18]
95 00000048 cfstr64 c4, [r0, #0x20]
96 0000004c cfstr64 c5, [r0, #0x28]
97 00000050 cfstr64 c6, [r0, #0x30]
98 00000054 cfstr64 c7, [r0, #0x38]
99 00000058 cfstr64 c8, [r0, #0x40]
100 0000005c cfstr64 c9, [r0, #0x48]
101 00000060 cfstr64 c10, [r0, #0x50]
102 00000064 cfstr64 c11, [r0, #0x58]
103 00000068 cfstr64 c12, [r0, #0x60]
104 0000006c cfstr64 c13, [r0, #0x68]
105 00000070 cfstr64 c14, [r0, #0x70]
106 00000074
107 00000074 ;
108 00000074 ; Save the accumulator registers.
109 00000074 ;
110 00000074 cfmv32al c0, a0
111 00000078 cfstr32 c0, [r0, #0x80]
112 0000007c cfmv32am c1, a0
113 00000080 cfstr32 c1, [r0, #0x84]
114 00000084 cfmv32ah c2, a0
115 00000088 cfstr32 c2, [r0, #0x88]
116 0000008c cfmv32al c3, a1
117 00000090 cfstr32 c3, [r0, #0x8c]
118 00000094 cfmv32am c4, a1
119 00000098 cfstr32 c4, [r0, #0x90]
120 0000009c cfmv32ah c5, a1
121 000000a0 cfstr32 c5, [r0, #0x94]
122 000000a4 cfmv32al c6, a2
123 000000a8 cfstr32 c6, [r0, #0x98]
124 000000ac cfmv32am c7, a2
125 000000b0 cfstr32 c7, [r0, #0x9c]
126 000000b4 cfmv32ah c8, a2
127 000000b8 cfstr32 c8, [r0, #0xa0]
128 000000bc cfmv32al c9, a3
129 000000c0 cfstr32 c9, [r0, #0xa4]
130 000000c4 cfmv32am c10, a3
131 000000c8 cfstr32 c10, [r0, #0xa8]
132 000000cc cfmv32ah c11, a3
133 000000d0 cfstr32 c11, [r0, #0xac]
134 000000d4
135 000000d4 e129f002 msr cpsr, r2 ; update status register
136 000000d8
137 000000d8 RETURN
138 000000dc
139 000000dc
140 000000dc
141 000000dc ;**********************************************************************
142 000000dc ;
143 000000dc ; void OEMRestoreCoProcRegister( LPBYTE pArea );
144 000000dc ;
145 000000dc ; This function is called by the kernel when a thread switch occurs
146 000000dc ; to restore the platform specific debug registers
147 000000dc ;
148 000000dc ; r0 - Pointer to a memory buffer that contains the information to
149 000000dc ; restore to the co-processor registers which should have be set
150 000000dc ; by the OEMInitCoProcRegisterSavedArea or OEMSaveCoProcRegister.
151 000000dc ;
152 000000dc ;**********************************************************************
153 000000dc LEAF_ENTRY OEMRestoreCoProcRegister
154 000000dc
155 000000dc e10f2000 mrs r2, cpsr ; (r0) = current status
156 000000e0 e38210c0 orr r1, r2, #0xC0 ; set interrupt disable bit
157 000000e4 e129f001 msr cpsr, r1 ; update status register
158 000000e8
159 000000e8 ;
160 000000e8 ; Restore the accumulator registers.
161 000000e8 ;
162 000000e8 cfldr32 c0, [r0, #0x80]
163 000000ec cfmval32 a0, c0
164 000000f0 cfldr32 c1, [r0, #0x84]
165 000000f4 cfmvam32 a0, c1
166 000000f8 cfldr32 c2, [r0, #0x88]
167 000000fc cfmvah32 a0, c2
168 00000100 cfldr32 c3, [r0, #0x8c]
169 00000104 cfmval32 a1, c3
170 00000108 cfldr32 c4, [r0, #0x90]
171 0000010c cfmvam32 a1, c4
172 00000110 cfldr32 c5, [r0, #0x94]
173 00000114 cfmvah32 a1, c5
174 00000118 cfldr32 c6, [r0, #0x98]
175 0000011c cfmval32 a2, c6
176 00000120 cfldr32 c7, [r0, #0x9c]
177 00000124 cfmvam32 a2, c7
178 00000128 cfldr32 c8, [r0, #0xa0]
179 0000012c cfmvah32 a2, c8
180 00000130 cfldr32 c9, [r0, #0xa4]
181 00000134 cfmval32 a3, c9
182 00000138 cfldr32 c10, [r0, #0xa8]
183 0000013c cfmvam32 a3, c10
184 00000140 cfldr32 c11, [r0, #0xac]
185 00000144 cfmvah32 a3, c11
186 00000148
187 00000148 ;
188 00000148 ; Restore the Crunch registers and dpsc.
189 00000148 ;
190 00000148 cfldr64 c0, [r0, #0x00]
191 0000014c cfldr64 c1, [r0, #0x08]
192 00000150 cfldr64 c2, [r0, #0x10]
193 00000154 cfldr64 c3, [r0, #0x18]
194 00000158 cfldr64 c4, [r0, #0x20]
195 0000015c cfldr64 c5, [r0, #0x28]
196 00000160 cfldr64 c6, [r0, #0x30]
197 00000164 cfldr64 c7, [r0, #0x38]
198 00000168 cfldr64 c8, [r0, #0x40]
199 0000016c cfldr64 c9, [r0, #0x48]
200 00000170 cfldr64 c10, [r0, #0x50]
201 00000174 cfldr64 c11, [r0, #0x58]
202 00000178 cfldr64 c12, [r0, #0x60]
203 0000017c cfldr64 c13, [r0, #0x68]
204 00000180 cfldr64 c14, [r0, #0x70]
205 00000184 cfldr64 c15, [r0, #0xb0]
206 00000188 cfmvsc32 c15, c0
207 0000018c cfldr64 c15, [r0, #0x78]
208 00000190
209 00000190 e129f002 msr cpsr, r2 ; update status register
210 00000194
211 00000194
212 00000194 RETURN
213 00000198 END
Assembly terminated, errors: 0, warnings: 0
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