📄 startup.lst
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ARM macroassembler Page:1
1 00000000 ;**********************************************************************
2 00000000 ;
3 00000000 ; Filename: startup.s
4 00000000 ;
5 00000000 ; Description: Initialization before the MMU gets turned. This is
6 00000000 ; the first code that gets executed.
7 00000000 ;
8 00000000 ; THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
9 00000000 ; ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
10 00000000 ; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
11 00000000 ; PARTICULAR PURPOSE.
12 00000000 ;
13 00000000 ; Use of this source code is subject to the terms of the Cirrus end-user
14 00000000 ; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
15 00000000 ; If you did not accept the terms of the EULA, you are not authorized to
16 00000000 ; use this source code. For a copy of the EULA, please see the
17 00000000 ; EULA.RTF on your install media.
18 00000000 ;
19 00000000 ; Copyright(c) Cirrus Logic Corporation 2005, All Rights Reserved
20 00000000 ;
21 00000000 ;**********************************************************************
22 00000000
23 00000000 EBOOT_RUN_FLAG EQU 0x00001234
24 00000000
25 00000000
28 00000000 OPT 1 ; reenable listing
29 00000000 OPT 128 ; disable listing of macro expansions
30 00000000
31 00000000
32 00000000 IMPORT SysconSetup
33 00000000 IMPORT EbootMain
34 00000000 IMPORT MMUSetup
35 00000000 IMPORT SdramCfg
36 00000000
37 00000000 ;**********************************************************************
38 00000000 ; StartUp routine to initialize the processor.
39 00000000 ;**********************************************************************
40 00000000 STARTUPTEXT
41 00000000 43 52 55 DCB "CRUS"
53
42 00000004 LEAF_ENTRY StartUp
43 00000004
44 00000004 ;
45 00000004 ; Kill watch dog timer. Before any thing else.
46 00000004 ;
47 00000004 e59f0128 ldr r0, =0x80940000
48 00000008 e59f1128 ldr r1, =0xAA55
49 0000000c e5801000 str r1, [r0]
50 00000010
51 00000010
52 00000010 ;
53 00000010 ; ensure SVC32 mode with IRQ and FIQ disabled
54 00000010 ;
55 00000010 e3a000d3 mov r0, #0xd3
56 00000014 e121f000 msr cpsr_c, r0
57 00000018
58 00000018 ;set eboot run flag
59 00000018
60 00000018 e59f011c ldr r0, =0x80930040
61 0000001c e59f111c ldr r1, =EBOOT_RUN_FLAG
62 00000020 e5801000 str r1, [r0]
63 00000024
64 00000024 ;
65 00000024 ; Check to see if we are executing in flash, if so we need to
66 00000024 ; copy this into sdram.
67 00000024 ;
68 00000024 ; cmp pc, #0x60000000
69 00000024 ; bls ExecuteFromRam
70 00000024
71 00000024 ;
72 00000024 ; When Programming SDRAM clear clkset1 so the delay loop have proper
73 00000024 ; delays.
74 00000024 ;
75 00000024 e5801000 str r1, [r0]
76 00000028 e59f0114 ldr r0, =0x80930020
77 0000002c e3a01000 ldr r1, =0x0
78 00000030 e5801000 str r1, [r0]
79 00000034
80 00000034
81 00000034 ;
82 00000034 ; Configure SDRAM
83 00000034 ;
84 00000034 eb000000 bl SdramCfg
85 00000038
86 00000038
87 00000038 ;
88 00000038 ; Copy the image to RAM
89 00000038 ;
90 00000038 e3a00206 ldr r0, =0x60000000
91 0000003c e3a01701 ldr r1, =0x40000
92 00000040 e3a0b806 ldr r11, =0x60000
93 00000044 e8b003fc EbootCopyLoop ldmia r0!, {r2-r9}
94 00000048 e8a103fc stmia r1!, {r2-r9}
95 0000004c e151000b cmp r1, r11
96 00000050 1afffffb bne EbootCopyLoop
97 00000054
98 00000054 e59ff0f0 ldr pc, =ExecuteFromRam
99 00000058
100 00000058
101 00000058 ;
102 00000058 ; create a temporary stack below kernel memory from config.bib
103 00000058 ;
104 00000058 ExecuteFromRam
105 00000058
106 00000058
107 00000058
108 00000058 e59fd0f0 ldr sp, =EbootStack
109 0000005c eb000000 bl SysconSetup
110 00000060
111 00000060 ;
112 00000060 ; Initializes the vector table. Incase of spurious vectors.
113 00000060 ;
114 00000060 e59f00ec ldr r0, =VectorTable
115 00000064 e3a01000 ldr r1, =0x0
116 00000068 e8b003fc ldmia r0!, {r2-r9}
117 0000006c e8a103fc stmia r1!, {r2-r9}
118 00000070 e8b003fc ldmia r0!, {r2-r9}
119 00000074 e8a103fc stmia r1!, {r2-r9}
120 00000078
121 00000078 ;
122 00000078 ; Lets setup the MMU Linear = Physical. This allows us to
123 00000078 ; setup cachable and noncachable areas.
124 00000078 ;
125 00000078 eb000000 bl MMUSetup
126 0000007c ;
127 0000007c ; Branch to eboot main C routine.
128 0000007c ;
129 0000007c eb000000 bl EbootMain
130 00000080 ;
131 00000080 ; KernelStart should never return:
132 00000080 ;
133 00000080
134 00000080 eafffffe spin b spin
135 00000084
136 00000084 ;*************************************************************************
137 00000084 ; Default vectors
138 00000084 ;
139 00000084 ; We never should hit these vectors, but just in case lets do something
140 00000084 ;
141 00000084 ;*************************************************************************
142 00000084 ResetVector
143 00000084 e59f00bc ldr r0, =0x808C0000
144 00000088 e3a01052 ldr r1, ='R'
145 0000008c e5801000 STR R1, [R0]
146 00000090 eafffffe b .
147 00000094
148 00000094 e59f00ac UndefVector ldr r0, =0x808C0000
149 00000098 e3a01055 ldr r1, ='U'
150 0000009c e5801000 STR R1, [R0]
151 000000a0 eafffffe b .
152 000000a4
153 000000a4 e59f009c SWIVector ldr r0, =0x808C0000
154 000000a8 e3a01053 ldr r1, ='S'
155 000000ac e5801000 STR R1, [R0]
156 000000b0 eafffffe b .
157 000000b4
158 000000b4 e59f008c PrefetchVector ldr r0, =0x808C0000
159 000000b8 e3a01050 ldr r1, ='P'
160 000000bc e5801000 STR R1, [R0]
161 000000c0 eafffffe b .
162 000000c4
163 000000c4 e59f007c DataAbortVector ldr r0, =0x808C0000
164 000000c8 e3a01044 ldr r1, ='D'
165 000000cc e5801000 STR R1, [R0]
166 000000d0 eafffffe b .
167 000000d4
168 000000d4 e59f006c FIQVector ldr r0, =0x808C0000
169 000000d8 e3a01046 ldr r1, ='F'
170 000000dc e5801000 STR R1, [R0]
171 000000e0 eafffffe b .
172 000000e4
173 000000e4 e59f005c IRQVector ldr r0, =0x808C0000
174 000000e8 e3a01049 ldr r1, ='I'
175 000000ec e5801000 STR R1, [R0]
176 000000f0 eafffffe b .
177 000000f4
178 000000f4 VectorTable
179 000000f4 ;
180 000000f4 ; Load value of relative label into program counter, causing jump to
181 000000f4 ; the value stored at the label.
182 000000f4 ; At startup pc is zero 0, loading the value of this lable should
183 000000f4 ; place pc in the area of 0x80090000. LDR is PC Relative.
184 000000f4 ;
185 000000f4 e59ff018 ldr PC, Reset_Addr
186 000000f8 e59ff018 ldr PC, Undefined_Addr
187 000000fc e59ff018 ldr PC, SWI_Addr
188 00000100 e59ff018 ldr PC, Prefetch_Addr
189 00000104 e59ff018 ldr PC, Abort_Addr
190 00000108 e1a00000 nop ; Reserved vector
191 0000010c e59ff018 ldr PC, IRQ_Addr
192 00000110 e59ff018 ldr PC, FIQ_Addr
193 00000114
194 00000114 ;; these DCDs (below) have to remain here for the LDRs above to be able to jump
195 00000114 ;; with offset
196 00000114
197 00000114 ExceptionVectorTable
198 00000114
199 00000114 00000084 Reset_Addr DCD ResetVector
200 00000118 00000094 Undefined_Addr DCD UndefVector
201 0000011c 000000a4 SWI_Addr DCD SWIVector
202 00000120 000000b4 Prefetch_Addr DCD PrefetchVector
203 00000124 000000c4 Abort_Addr DCD DataAbortVector
204 00000128 00000000 DCD 0
205 0000012c 000000e4 IRQ_Addr DCD IRQVector
206 00000130 000000d4 FIQ_Addr DCD FIQVector
207 00000134 VectorTableEnd
208 00000134
209 00000134 80940000 *literal pool: constant
209 00000138 0000aa55 *literal pool: constant
209 0000013c 80930040 *literal pool: constant
209 00000140 00001234 *literal pool: constant
209 00000144 80930020 *literal pool: constant
209 00000148 808c0000 *literal pool: constant
209 0000014c 00000058 *literal pool: symbol: ExecuteFromRam + 0x0
209 00000150 00008000 *literal pool: symbol: EbootStack + 0x0
209 00000154 000000f4 *literal pool: symbol: VectorTable + 0x0
209 AREA |.KDATA|,DATA,NOINIT
210 00000000
211 00000000 ;*****************************************************************************
212 00000000 ;
213 00000000 ; The MMU level one page table.
214 00000000 ;
215 00000000 ;*****************************************************************************
216 00000000 00 00 00 EbootStackStart % 0x8000
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