📄 etpuc_spi.c
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}
else
{
SetPinLow ();
}
chan--;
bit_count_current = bit_count; /* RECORD BIT_COUNT AS BIT_COUNT_CURRENT FOR CALCULATIONS */
/* SET UP FIRST CLOCK PULSE (EDGE) WITH CORRECT POLARITY */
if (FunctionMode0 != SPI_CLK_POL_POS)
{
OnMatchA (PinLow); /* POLARITY = 1 SO -VE 1ST EDGE */
}
else
{
OnMatchA (PinHigh); /* POLARITY = 0 SO +VE 1ST EDGE */
}
}
/********************************************************************/
/* THREAD NAME : DATA_ODD_LSB */
/********************************************************************/
/* 1. Clear MatchA event Latch */
/* */
/* 2. Decrement the channel register ( to data in channel) */
/* */
/* 3. Sample Data In Pin */
/* */
/* 4. Add it to data register */
/* */
/* 5. Proceed as per thread DATA_ODD_MSB step 5 */
/********************************************************************/
else if (m1 == 1 && m2 == 0 && flag1 == 0)
{
ClearMatchAEvent ();
/* CODE TO READ INPUT PIN - AND ADD DATA TO DATA_REG */
/* RECEIVE DATA CHANNEL IS CHANNEL BELOW CLOCK */
chan--;
No_optimise1: /* this label required to prevent the compiler being over zealous : added for compiler rev 1.0.0.5*/
if (IsCurrentInputPinHigh ())
{
data_reg = data_reg + 0x800000;
}
/* CODE TO TOGGLE THE CLOCK PIN AT THE NEXT EDGE/SET UP THE NEXT MATCH */
goto Chan_Change_and_Next_Match_B; /* to change channel back
up and to set up next match,
and hence 'Count_Zero' to check for end */
}
/********************************************************************/
/* THREAD NAME : DATA_ODD_MSB */
/********************************************************************/
/* 1. Clear MatchA event Latch */
/* */
/* 2. Decrement the channel register (to data in channel) */
/* */
/* 3. Sample Data In Pin */
/* */
/* 4. Add it to data register */
/* */
/* 5. Increment the channel register (back to CLK channel) */
/* */
/* 6. Schedule match on action unit B for half_period from last */
/* match on action unit A */
/* */
/* 7. Decrement bit count */
/********************************************************************/
else if (m1 == 1 && m2 == 0 && flag1 == 1)
{
/*DisableMatchesInThread(); */
ClearMatchAEvent ();
/* CODE TO READ INPUT PIN - AND ADD DATA TO DATA_REG */
/* DATA IN CHANNEL IS CHANNEL BELOW CLOCK */
chan--;
No_optimise2: /* this label required to prevent the compiler being over zealous : added for compiler rev 1.0.0.5*/
if (IsCurrentInputPinHigh ())
{
data_reg ++;
}
Chan_Change_and_Next_Match_B:
chan++;
/* CODE TO TOGGLE THE CLOCK PIN AT THE NEXT EDGE/SET UP THE NEXT MATCH */
ertb = erta + half_period; /* update ertb for next match B */
OnMatchB (PinToggle);
WriteErtBToMatchBAndEnable ();
bit_count_current--;
}
/********************************************************************/
/* THREAD NAME : DATA_EVEN_LSB */
/********************************************************************/
/* 1. Clear MatchB event Latch */
/* */
/* 2. If all data has been sent set Channel Interrupt bit and */
/* dataTransferRequest bit and exit thread */
/* */
/* 3. Increment the channel register (to Data out channel) */
/* */
/* 4. Shift data reg right 1 bit */
/* */
/* 5. Set data out pin on according to carry flag */
/* */
/* 6. Decrement the channel register (back to CLK channel) */
/* */
/* 7. Schedule match on action unit A for half_period from last */
/* match on action unitB; PinAction is Toggle */
/********************************************************************/
else if (m1 == 0 && m2 == 1 && flag1 == 0)
{
/* DATA OUT CHANNEL IS CHANNEL ABOVE CLOCK */
ClearMatchBEvent ();
if (bit_count_current != 0)
{
/* PUT data_out ON DATA OUT PIN */
chan++;
data_reg >>= 1;
Set_Data_Chan_Change_and_Next_Match_A:
if (CC.C != 0)
{
SetPinHigh();
}
else
{
SetPinLow ();
}
chan--;
erta = ertb + half_period; /* 2nd clock edge follows 1st */
OnMatchA (PinToggle);
WriteErtAToMatchAAndEnable ();
}
else
{
CI_DTR:
SetChannelInterruptRequest ();
SetDataTransferInterruptRequest ();
}
}
/********************************************************************/
/* THREAD NAME : DATA_EVEN_MSB */
/********************************************************************/
/* 1. Clear MatchB event Latch */
/* */
/* 2. If all data has been sent set Channel Interrupt bit and */
/* dataTransferRequest bit and exit thread */
/* */
/* 3. Increment the channel register (to Data out channel) */
/* */
/* 4. Shift data reg left 1 bit */
/* */
/* 5. Proceed as per thread DATA_EVEN_LSB step 5 */
/********************************************************************/
else if (m1 == 0 && m2 == 1 && flag1 == 1)
{
/* DATA OUT CHANNEL IS CHANNEL ABOVE CLOCK */
ClearMatchBEvent ();
if (bit_count_current != 0)
{
/* PUT data_out ON DATA OUT PIN */
chan++;
data_reg <<= 1;
goto Set_Data_Chan_Change_and_Next_Match_A;
}
else
{
goto CI_DTR;
}
}
/********************************************************************/
/* THREAD NAME : ERROR_CODE */
/********************************************************************/
/* 1. Call the Global error routine and end. */
/********************************************************************/
else
{
#ifdef GLOBAL_ERROR_FUNC
Global_Error_Func();
#else
ClearAllLatches();
#endif
}
}
/* Information exported to Host CPU program */
#pragma write h, (::ETPUfilename (cpu/etpu_spi_auto.h));
#pragma write h, (/****************************************************************);
#pragma write h, ( * WARNING this file is automatically generated DO NOT EDIT IT! *);
#pragma write h, ( * *);
#pragma write h, ( * FILE NAME: etpu_spi_auto.c COPYRIGHT (c) Freescale 2004 *);
#pragma write h, ( * All Rights Reserved *);
#pragma write h, ( * This file generated by: *);
#pragma write h, ( * $RCSfile: etpuc_spi.c,v $ $Revision: 1.3 $);
#pragma write h, ( * *);
#pragma write h, ( * This file provides an interface between eTPU code and CPU *);
#pragma write h, ( * code. All references to the SPI function should be made with *);
#pragma write h, ( * information in this file. This allows only symbolic *);
#pragma write h, ( * information to be referenced which allows the eTPU code to be*);
#pragma write h, ( * optimized without effecting the CPU code. *);
#pragma write h, ( ****************************************************************/);
#pragma write h, (#ifndef _ETPU_SPI_AUTO_H_ );
#pragma write h, (#define _ETPU_SPI_AUTO_H_ );
#pragma write h, ( );
#pragma write h, (/* Function Configuration Information */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_FUNCTION_NUMBER) SPI_FUNCTION_NUMBER );
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_TABLE_SELECT) ::ETPUentrytype(SPI) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_NUM_PARMS) ::ETPUram(SPI) );
#pragma write h, ( );
#pragma write h, (/* Host Service Request Definitions -timer options*/);
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_INIT_TCR1) SPI_INIT_TCR1 );
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_INIT_TCR2) SPI_INIT_TCR2 );
#pragma write h, ( );
#pragma write h, (/* Host Service Request Definitions -non init (placed here for GCT compliance)*/);
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_RUN) SPI_RUN );
#pragma write h, ( );
#pragma write h, (/* Function Mode Bit Definitions - polarity options*/);
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_CLK_POL_POS) SPI_CLK_POL_POS );
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_CLK_POL_NEG) SPI_CLK_POL_NEG );
#pragma write h, (/* Function Mode Bit Definitions - shift_dir options*/);
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_SHIFT_DIR_MSB) SPI_SHIFT_DIR_MSB );
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_SHIFT_DIR_LSB) SPI_SHIFT_DIR_LSB );
#pragma write h, ( );
#pragma write h, (/* Parameter Definitions */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_BIT_COUNT) ::ETPUlocation (SPI, bit_count) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_DATA_REG) ::ETPUlocation (SPI, data_reg) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_SPI_HALF_PERIOD) ::ETPUlocation (SPI, half_period) );
#pragma write h, ( );
#pragma write h, (#endif /* _ETPU_SPI_AUTO_H_ */);
#pragma write h, ( );
/*********************************************************************
*
* Copyright:
* FREESCALE, INC. All Rights Reserved.
* You are hereby granted a copyright license to use, modify, and
* distribute the SOFTWARE so long as this entire notice is
* retained without alteration in any modified and/or redistributed
* versions, and that such modified versions are clearly identified
* as such. No licenses are granted by implication, estoppel or
* otherwise under any patents or trademarks of Motorola, Inc. This
* software is provided on an "AS IS" basis and without warranty.
*
* To the maximum extent permitted by applicable law, FREESCALE
* DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, INCLUDING
* IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR
* PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH REGARD TO THE
* SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) AND ANY
* ACCOMPANYING WRITTEN MATERIALS.
*
* To the maximum extent permitted by applicable law, IN NO EVENT
* SHALL FREESCALE BE LIABLE FOR ANY DAMAGES WHATSOEVER (INCLUDING
* WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS
* INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY
* LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
*
* Freescale assumes no responsibility for the maintenance and support
* of this software
********************************************************************/⌨️ 快捷键说明
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