📄 etpuc_uart.c
字号:
}
else { /* parity enabled */
if (FunctionMode0 == 1) { /* check for odd parity */
FS_ETPU_UART_PARITY_TEMP += 1; /* if odd parity make even */
}
OnMatchAPinHigh();
if((FS_ETPU_UART_PARITY_TEMP & 0x01) == 0x0) { /* even parity */
OnMatchAPinLow();
}
}
}
else if((FS_ETPU_UART_ACTUAL_BIT_COUNT & 0x80) != 0x0) {
OnMatchAPinHigh(); /* set up for stop bit */
ClrFlag0(); /* set up to look for new data */
}
else {
if((FS_ETPU_UART_SHIFT_REG & 0x000001) != 0x0) {
OnMatchAPinHigh();
FS_ETPU_UART_PARITY_TEMP += 1; /* count bit that are "1" */
}
else {
OnMatchAPinLow();
}
}
FS_ETPU_UART_ACTUAL_BIT_COUNT -= 1; /* decrerement number of bits */
FS_ETPU_UART_SHIFT_REG >>= 1; /* shift the data */
ClearAllLatches(); /* clear sll service request sources */
erta = erta + FS_ETPU_UART_MATCH_RATE; /* set up for next match */
WriteErtAToMatchAAndEnable();
}
/*--------------------------------------------------------------------------+
| THREAD NAME: UART_Detect_new_data_RX (S4) |
| DESCRIPTION: Detect start of new data frame - look for high-to-low trans |
| 1. Clear parity_temp variable |
| 2. actual_bit_count = bits_per_data_word |
| 3. Set channel to detect a falling edge, high-to-low trans. |
| 4. if parity enabled |
| 5. add 1 to actual_bit_count |
| 6. Set up for new match, ertA += match_rate + 1/2 match_rate |
| 7. Disable further transtition detection |
| 8. Clear link service request event latch |
| 9. Clear link, transition, match A, and match B event latch |
| 10. Write ert A to match reg A and enable |
+--------------------------------------------------------------------------*/
/* Falling edge detected */
/* Start-bit detected, start sampling in the middle of data bit (not start bit) */
/* This is 1.5 bit times to account for the start bit */
else if( IsMatchBOrTransitionAEvent()&& (flag1==1) ) {
/* DETECT_NEW_DATA_RX */
FS_ETPU_UART_PARITY_TEMP = 0; /* clear parity variable */
FS_ETPU_UART_ACTUAL_BIT_COUNT = FS_ETPU_UART_BITS_PER_DATA_WORD; /* update number of bits to detect */
if(FunctionMode1 == 1) { /* check for parity enabled*/
FS_ETPU_UART_ACTUAL_BIT_COUNT += 1; /* parity enabled, increase count by one */
}
erta += (FS_ETPU_UART_MATCH_RATE + (FS_ETPU_UART_MATCH_RATE >> 1)); /* look for bit in the middle of new data after start bit */
DetectADisable(); /* do not detect any transitions from this point */
ClearAllLatches(); /* clear sll service request sources */
WriteErtAToMatchAAndEnable();
}
/*--------------------------------------------------------------------------+
| THREAD NAME: UART_Receive_Serial_Data_RX (S5) |
| DESCRIPTION: Receive serial data frame until bit count exhuasted |
| 1. if actual bit count = 0 |
| 2. rx_error = 0; clear error parameter |
| 3. if pin state not high - stop bit not detected record error|
| 4. rx_error += 0x40 |
| 5. if parity enabled |
| 6. if odd parity |
| 7. add one to parity_temp parameter |
| 8. if lsb of parity_temp not 0 then parity error |
| 9. rx_error += 0x80 |
| 10. else |
| 11. shift data in shift_reg right 1 bit |
| 12. |
| 13. update tx_rx_data with shift_reg |
| 14. Set channel interrupt, and data transfer request |
| 15. else |
| 16. shift data in shift_reg right by 1 bit |
| 17. if pin state = 1 |
| 18. received data = 1 |
| 19. parity_temp += 1 |
| 20. else |
| 21. received data = 0 |
| 22. Set up for new match, ertA += match_rate |
| 23. Write ert A to match reg A and enable |
| 24. Clear link, transition, match A, and match B event latch |
| 25. increment actual_bit_count parameter |
+--------------------------------------------------------------------------*/
else if( IsMatchAOrTransitionBEvent() && (flag1==1) ) {
/* RECEIVE_SERIAL_DATA_RX */
if(FS_ETPU_UART_ACTUAL_BIT_COUNT == 0) { /* stop bit check */
FS_ETPU_UART_RX_ERROR = 0;
if(pss == 0) { /* stop bit should be detected high, if not FE */
FS_ETPU_UART_RX_ERROR |= 0x40; /* FE - Framing Error detected */
}
if(FunctionMode1 == 1) { /* check for parity enabled */
FS_ETPU_UART_SHIFT_REG &= 0x7fffff; /* clear received parity bit */
if(FunctionMode0 == 1) { /* parity enabled, check odd or even */
FS_ETPU_UART_PARITY_TEMP += 1; /* odd parity found, need to negate it */
}
if((FS_ETPU_UART_PARITY_TEMP & 0x01) != 0x0) { // check for parity error
FS_ETPU_UART_RX_ERROR |= 0x80; /* parity error detected, add to error flag */
}
}
else {
FS_ETPU_UART_SHIFT_REG >>= 1; /* shift right one bit to account for no parity */
}
FS_ETPU_UART_TX_RX_DATA = FS_ETPU_UART_SHIFT_REG; /* combine error flags with data and store */
DetectAFallingEdge(); /* look for falling edge - start-bit */
SetChannelInterruptRequest(); /* generate RDRF - interrupt */
SetDataTransferInterruptRequest(); /* Send DMA request if enabled */
}
else {
FS_ETPU_UART_SHIFT_REG >>= 1; /* shift data one bit position right */
if(pss == 1) { /* Is pin sampled state, data bit high */
FS_ETPU_UART_SHIFT_REG += 0x800000; /* Received bit is high, place one in msb */
FS_ETPU_UART_PARITY_TEMP += 1; /* count high bit in parity calculation */
}
erta = erta + FS_ETPU_UART_MATCH_RATE; /* set up for next match in middle of window */
WriteErtAToMatchAAndEnable(); /* setup match for 1.5 bit times */
}
FS_ETPU_UART_ACTUAL_BIT_COUNT -= 1; /* decrerement count of bits received */
ClearAllLatches(); /* clear sll service request sources */
}
/*--------------------------------------------------------------------------+
| THREAD NAME: Default State (S6) |
| DESCRIPTION: Enter this state if no other entry condition matches. |
| 1. clear link |
| 2. clear match A event latch, and match B event latc |
| 3. clear transition event latch |
+--------------------------------------------------------------------------*/
else { /* UNDEFINED_ENTRY_CONDITIONS */
#ifdef GLOBAL_ERROR_FUNC
Global_Error_Func();
#else
ClearAllLatches();
#endif
}
}
/* Information exported to Host CPU program */
#pragma write h, (::ETPUfilename (cpu/etpu_uart_auto.h));
#pragma write h, (/****************************************************************);
#pragma write h, ( * WARNING this file is automatically generated DO NOT EDIT IT! *);
#pragma write h, ( * *);
#pragma write h, ( * FILE NAME: etpu_uart_auto.c COPYRIGHT (c) Freescale 2004 *);
#pragma write h, ( * All Rights Reserved *);
#pragma write h, ( * This file generated by: *);
#pragma write h, ( * $RCSfile: etpuc_uart.c,v $ $Revision: 1.2 $);
#pragma write h, ( * *);
#pragma write h, ( * This file provides an interface between eTPU code and CPU *);
#pragma write h, ( * code. All references to the UART function should be made with*);
#pragma write h, ( * information in this file. This allows only symbolic *);
#pragma write h, ( * information to be referenced which allows the eTPU code to be*);
#pragma write h, ( * optimized without effecting the CPU code. *);
#pragma write h, ( ****************************************************************/);
#pragma write h, (#ifndef _ETPU_UART_AUTO_H_ );
#pragma write h, (#define _ETPU_UART_AUTO_H_ );
#pragma write h, ( );
#pragma write h, (/* Function Configuration Information */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_FUNCTION_NUMBER) UART_FUNCTION_NUMBER );
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_TABLE_SELECT) ::ETPUentrytype(UART) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_NUM_PARMS) ::ETPUram(UART) );
#pragma write h, ( );
#pragma write h, (/* Host Service Request Definitions */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_TX_INIT) UART_TX_INIT );
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_RX_INIT) UART_RX_INIT);
#pragma write h, ( );
#pragma write h, (/* Function Mode Bit Definitions - polarity options */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_NO_PARITY) UART_NO_PARITY );
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_EVEN_PARITY) UART_EVEN_PARITY + UART_USE_PARITY );
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_ODD_PARITY) UART_ODD_PARITY + UART_USE_PARITY );
#pragma write h, ( );
#pragma write h, (/* Parameter Definitions */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_MATCH_RATE_OFFSET) ::ETPUlocation (UART, FS_ETPU_UART_MATCH_RATE));
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_TX_RX_DATA_OFFSET) ::ETPUlocation (UART, FS_ETPU_UART_TX_RX_DATA));
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_BITS_PER_DATA_WORD_OFFSET) ::ETPUlocation (UART, FS_ETPU_UART_BITS_PER_DATA_WORD));
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_ACTUAL_BIT_COUNT_OFFSET) ::ETPUlocation (UART, FS_ETPU_UART_ACTUAL_BIT_COUNT));
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_SHIFT_REG_OFFSET) ::ETPUlocation (UART, FS_ETPU_UART_SHIFT_REG));
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_PARITY_TEMP_OFFSET) ::ETPUlocation (UART, FS_ETPU_UART_PARITY_TEMP));
#pragma write h, (::ETPUliteral(#define FS_ETPU_UART_RX_ERROR_OFFSET) ::ETPUlocation (UART, FS_ETPU_UART_RX_ERROR));
#pragma write h, ( );
#pragma write h, (#endif /* _ETPU_UART_AUTO_H_ */);
#pragma write h, ( );
/*********************************************************************
*
* Copyright:
* Freescale Semiconductor, INC. All Rights Reserved.
* You are hereby granted a copyright license to use, modify, and
* distribute the SOFTWARE so long as this entire notice is
* retained without alteration in any modified and/or redistributed
* versions, and that such modified versions are clearly identified
* as such. No licenses are granted by implication, estoppel or
* otherwise under any patents or trademarks of Freescale
* Semiconductor, Inc. This software is provided on an "AS IS"
* basis and without warranty.
*
* To the maximum extent permitted by applicable law, Freescale
* Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
* PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH
* REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
* AND ANY ACCOMPANYING WRITTEN MATERIALS.
*
* To the maximum extent permitted by applicable law, IN NO EVENT
* SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER
* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
* BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER
* PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
*
* Freescale Semiconductor assumes no responsibility for the
* maintenance and support of this software
*
********************************************************************/
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -