📄 etpuc_uart.c
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/****************************************************************************
* FILE NAME: etpuc_uart.c COPYRIGHT (c) Freescale 2004 *
* DESCRIPTION: All Rights Reserved *
* This function creates a UART (Universal Asynchronous Recieve/Transmitter)*
* uses 2 eTPU channels. *
*==========================================================================*
* ORIGINAL AUTHOR: Vernon Goler *
* $Log: etpuc_uart.c,v $
* Revision 1.2 2004/11/02 14:05:41 r12110
* -Added support for building function stand alone or in a set.
* -This includes using the global error function if avaialable.
* -Updated comments in auto generated file to include version number.
*
* Revision 1.1 2004/11/01 15:41:24 r12110
* No changes to code, just updated for CVS and checked into CVS.
*
*..........................................................................*
* 0.3 V. Goler 10/Aug/04 Function updated to common coding style. *
* 0.4 V. Goler 9/Sep/04 Added output and input buffer enable for *
* PUMA, added DMA requests, disabled matches in init threads, *
* added prefix UART to parity defines, *
* included ClearAllLatches function, some slight teaks to code *
****************************************************************************/
#ifndef __ETPUC_H
#include <etpuc.h> /*Defines eTPU hardware*/
#endif
#ifndef __ETPUC_COMMON_H
#include <eTPUc_common.h> /*Standard way to use eTPU*/
#endif
#ifdef UART_FUNCTION_NUMBER
#pragma ETPU_function UART, alternate @ UART_FUNCTION_NUMBER;
#else
#pragma ETPU_function UART, alternate;
#endif
/* Macros to make the code easier to understand. */
/* These are specific to this UART function */
/* Host service requests */
#define UART_TX_INIT 4
#define UART_RX_INIT 7
/*Function Modes */
#define UART_NO_PARITY 0 /* used with FM1 */
#define UART_USE_PARITY 2 /* used when parity is passed to CPU */
#define UART_EVEN_PARITY 0 /* used with FM0 */
#define UART_ODD_PARITY 1 /* used with FM0 */
/****************************************************************************
* General Notes:
* 1. When the ETPU functions as a transmitter, bit 23 of FS_ETPU_UART_TX_RX_DATA
* must be written by the host as zero to tell the ETPU new data is present.
* When the ETPU copies data from FS_ETPU_UART_TX_RX_DATA to
* FS_ETPU_UART_SHIFT_REG, the ETPU will set the MSB of
* FS_ETPU_UART_TX_RX_DATA to a one. This will tell the ETPU that
* FS_ETPU_UART_TX_RX_DATA is available to receive new data.
* 2. Received data always has the following
* form = blank[23]:data[22:0]
* The API will right adjust the data.
*
* Channel Flag usage
* Flag0 = 0 - wait for start bit.
* Flag0 = 1 - start bit detected, transmit data
* Flag1 = 0 - Transmit thread
* Flag1 = 1 - Receive thread
*
* Function mode bits
* FM1 FM0 Action
* ----- ----- ----------
* 0 0 No Parity
* 0 1 No Parity
* 1 0 Even Parity
* 1 1 Odd Parity
****************************************************************************/
/*--------------------------------------------------------------------------+
| FUNCTION PARAMETERS: |
| FS_ETPU_UART_ACTUAL_BIT_COUNT: used by etpu to count the number of bits |
| FS_ETPU_UART_MATCH_RATE: baud period in tcr1 clocks |
| FS_ETPU_UART_PARITY_TEMP: used by etpu to calculate parity |
| FS_ETPU_UART_SHIFT_REG: used by etpu for shifting in/out data |
| FS_ETPU_UART_RX_ERROR: used by etpu to hold calculated error code |
| FS_ETPU_UART_TX_RX_DATA: Tx or Rx data |
| FS_ETPU_UART_BITS_PER_DATA_WORD: holds the number of bits in a data word |
| including parity |
+--------------------------------------------------------------------------*/
void UART (int8 FS_ETPU_UART_ACTUAL_BIT_COUNT,
int24 FS_ETPU_UART_MATCH_RATE,
int8 FS_ETPU_UART_PARITY_TEMP,
int24 FS_ETPU_UART_SHIFT_REG,
int8 FS_ETPU_UART_RX_ERROR,
int24 FS_ETPU_UART_TX_RX_DATA,
int8 FS_ETPU_UART_BITS_PER_DATA_WORD)
{
/*--------------------------------------------------------------------------+
| THREAD NAME: UART_TX_INIT (S0) |
| DESCRIPTION: Initialize a channel to function as a transmitter (TX). |
| 1. Match TRC1, Capture TCR1, >= compare, enable output buffer|
| 2. PDCM = sm_st, single match, single transition |
| 3. Set OPACs for do not change on match |
| 4. PIN = high, set channel high |
| 5. Flag0 = 0, Flag1 = 0 |
| 6. Enable channel |
| 7. ERT = TCR1 + match_rate - set up match |
| 8. Clear link, transition, match A, and match B event latch |
| 10. Set channel interrupt, and data transfer request |
+--------------------------------------------------------------------------*/
if ( hsr== UART_TX_INIT ) {
/* TRANSMITTER_INITIALIZATION */
DisableMatchesInThread ();
/* Enable Output Buffer - for Puma */
EnableOutputBuffer();
TimeBaseAMatchTcr1CaptureTcr1GreaterEqual(); /* use tcr1 >= compare */
SingleMatchSingleTransition(); /* single match */
OnMatchAPinNoChange(); /* no change on match */
SetPinHigh(); /* pin high */
ClrFlag0();
ClrFlag1();
EnableMatchAndTransitionEventHandling(); /* enable channel */
erta = tcr1 + FS_ETPU_UART_MATCH_RATE;
ClearAllLatches(); /* clear sll service request sources */
WriteErtAToMatchAAndEnable();
SetChannelInterruptRequest();
SetDataTransferInterruptRequest();
}
/*--------------------------------------------------------------------------+
| THREAD NAME: UART_RX_INIT (S1) |
| DESCRIPTION: Initialize a channel to function as a receiver (RX). |
| 1. Match TRC1, Capture TCR1,>= compare, disable output buffer|
| 2. PDCM = sm_st, single match, single transition |
| 3. Set channel to detect a falling edge, high-to-low trans. |
| 4. PIN = high, set channel high |
| 5. Flag1=1 |
| 6. Clear link, transition, match A, and match B event latch |
| 7. Write ERT to Match register & Enable channel |
+--------------------------------------------------------------------------*/
else if ( hsr==UART_RX_INIT ) {
/* RECEIVER_INITIALIZATION */
DisableMatchesInThread();
/* Disable Output Buffer - for Puma */
DisableOutputBuffer();
TimeBaseAMatchTcr1CaptureTcr1GreaterEqual(); /* use tcr1 >= compare */
SingleMatchSingleTransition();
DetectAFallingEdge(); /* look for falling edge - start-bit */
SetFlag1();
ClearAllLatches(); /* clear sll service request sources */
EnableMatchAndTransitionEventHandling(); /* enable the channel */
}
/*--------------------------------------------------------------------------+
| THREAD NAME: UART_Test_New_Data_Tx (S2) |
| DESCRIPTION: Check for new data to transmit |
| 1. Clear parity_temp variable |
| 2. erta = erta + match_rate, setup new match |
| 3. Clear link, transition, match A, and match B event latch |
| 4. Write ert A to match reg A and enable |
| 5. Check for new valid data - MS bit of data_word low |
| 6. OPAC = low on match, send start bit |
| 7. Set flag0 = 1 |
| 8. actual_bit_count = data_size |
| 9. shift_reg = tx_rx_data |
| 9. Set MS bit of tx_rx_data to 1 to allow for new data |
| 10. Set channel interrupt, and data transfer request |
+--------------------------------------------------------------------------*/
// If TDRE set; set up for next match to test TDRE again
// else set cflag0 to indicate transmission and send start bit
else if( IsMatchAOrTransitionBEvent() && (flag0==0) && (flag1==0) ) {
/* TEST_NEW_DATA_TX */
FS_ETPU_UART_PARITY_TEMP = 0; /* clear parity variable */
erta = erta + FS_ETPU_UART_MATCH_RATE;
ClearAllLatches(); /* clear sll service request sources */
WriteErtAToMatchAAndEnable();
if((FS_ETPU_UART_TX_RX_DATA & 0x800000) == 0x0) { /* Test TDRE - look for new data */
OnMatchAPinLow(); /* output start bit */
SetFlag0();
FS_ETPU_UART_ACTUAL_BIT_COUNT = FS_ETPU_UART_BITS_PER_DATA_WORD;
FS_ETPU_UART_SHIFT_REG = FS_ETPU_UART_TX_RX_DATA; /* copy data to shift register */
FS_ETPU_UART_TX_RX_DATA = 0x800000; /* set TDRE to allow new data */
SetChannelInterruptRequest();
SetDataTransferInterruptRequest();
}
}
/*--------------------------------------------------------------------------+
| THREAD NAME: UART_Send_Serial_Data_TX (S3) |
| DESCRIPTION: Output serial data on pin at specified bit rate |
| 1. if actual bit count = 0 |
| 2. if parity not enabled |
| 3. OPAC = high on match - send stop bit |
| 4. flag0 = 0 |
| 5. else |
| 6. if odd parity |
| 7. parity_temp = parity_temp + 1 |
| 8. if parity_temp even |
| 9. OPAC = low on match - even parity found |
| 10. else |
| 11. OPAC = high on match - odd parity found |
| 12. else if bit count negative |
| 13. OPAC = high on match, setup for STOP bit |
| 14. flag0 = 0 |
| 15. else |
| 16. if LSB of shift_reg = 1 |
| 17. OPAC = high on match |
| 18. count "ones" and add to parity_temp |
| 19. else |
| 20. OPAC = low on match |
| 21. decrement actual_bit_count |
| 22. shift shift_reg data right by one bit |
| 23. Clear link, transition, match A, and match B event latch |
| 24. ERTA = ERTA + match_rate - set up match |
| 25. Write ert A to match reg A and enable |
+--------------------------------------------------------------------------*/
else if( IsMatchAOrTransitionBEvent() && (flag0==1) && (flag1==0) ) {
/* SEND_SERIAL_DATA_TX */
if(FS_ETPU_UART_ACTUAL_BIT_COUNT == 0x0) { /* check for parity enabled */
if(FunctionMode1 == 0) { /* no parity enabled */
OnMatchAPinHigh(); /* set up for stop bit */
ClrFlag0(); /* look to Tx new data */
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