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📄 etpuc_gpio.c

📁 mpc55**系列芯片的例程 包括SCI,SPI,TIMER,FIT,EDMA等几乎所有功能的实现
💻 C
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/*---------------------------------------------------------------------------+
|	Thread Name: Input Match (S5)                                            |
|	Description: Configure channel to read pin level on match event          |
|                                                                            |
|	1/. Select timebase for match and capture depending on FM0               |
|	2/. Set up next match erta =  current TCRx + InputMatchPeriod            |
|   3/. Enable MatchA - channel.ERWA = 0, write erta to Match1 register      |
|   4/. Enable MatchA Service Requests - channel.MTD = 0                     |
+----------------------------------------------------------------------------*/
	else if (HostServiceRequest == GPIO_INPUT_MATCH)
	{

		DisableOutputBuffer();
		SingleMatchSingleTransition();

		if ( FunctionMode0 == GPIO_USE_TCR1 )
		{
				ActionUnitA( MatchTCR1, CaptureTCR1, GreaterEqual);
				erta = tcr1;
		}
		else  /* use TCR2 */
		{
				ActionUnitA( MatchTCR2, CaptureTCR2, GreaterEqual);
				erta = tcr2;
		}

		erta = erta + InputMatchPeriod;

		NextMatch = erta;
		EnableMatchA();


		EnableMatchAndTransitionEventHandling();
	}

/*---------------------------------------------------------------------------+
|	Thread Name: Input Immediate Reset Match and Transition (S6)             |
|	Description: Read immediate value on pin - if FM1 = DISABLE_MATCH_TRANS  |
|	then disable input transition and input match                            |
|                                                                            |
|	1/. If FM1 = DISABLE_MATCH_TRANS then disable transition and match events|
|           - option removed in rev. 0.04                                    |
|	2/. Shift PinState 1 bit left and make PinState lsb = input pin level    |
+----------------------------------------------------------------------------*/
	else if (HostServiceRequest == GPIO_INPUT_IMMED)
	{
		DisableOutputBuffer();
		goto gen_intanddma;
	}

/*---------------------------------------------------------------------------+
|	Thread Name: Match Event (S7)                                            |
|	Description: Updates PinState on match event                             |
|                                                                            |
|	1/. Shift PinState 1 bit left and make PinState lsb = input pin level    |
|	2/. Schedule and enable next match                                       |
+----------------------------------------------------------------------------*/
	else if ((m1==1 && m2==0) || (m1==1 && m2==1) )
	{
			NextMatch = NextMatch + InputMatchPeriod;	/* Set up Match for next pin value read */
			erta = NextMatch;
			ClearMatchAEvent();
			EnableMatchA();

gen_intanddma:
			SetChannelInterruptRequest();
			SetDataTransferInterruptRequest();

ud_pinstate:
   		PinState = (PinState << 1);
			if(IsCurrentInputPinHigh())
			{
				PinState++;
			}
	}

/*---------------------------------------------------------------------------+
|	Thread Name: Transition Event (S8)                                       |
|	Description: Updates PinState on match event                             |
|                                                                            |
|	1/. Shift PinState 1 bit left and make PinState lsb = input pin level    |
|	2/. Clear transition event, enable next transition detection             |
+----------------------------------------------------------------------------*/
	else if ((m1==0) && (m2==1))
	{
			ClearTransitionEvents();
			goto gen_intanddma;
	}
/*--------------------------------------------------------------------------+
| THREAD NAME: Error (S9)                                                   |
| DESCRIPTION: Something has gone wrong. :-(                                |
|                Call the Global error routine and end.                     |
+--------------------------------------------------------------------------*/
	else {
#ifdef GLOBAL_ERROR_FUNC
		Global_Error_Func();
#else
		ClearAllLatches();
#endif
		}
}


/* Information exported to Host CPU program */
#pragma write h, (::ETPUfilename (cpu/etpu_gpio_auto.h));
#pragma write h, ( );
#pragma write h, (/****************************************************************);
#pragma write h, ( * WARNING this file is automatically generated DO NOT EDIT IT! *);
#pragma write h, ( *                                                              *);
#pragma write h, ( * FILE NAME: etpu_gpio_auto.c     COPYRIGHT (c) Freescale 2004 *);
#pragma write h, ( *                                      All Rights Reserved     *);
#pragma write h, ( * This file generated by:                                      *);
#pragma write h, ( * $RCSfile: etpuc_gpio.c,v $ $Revision: 1.2 $);
#pragma write h, ( *                                                              *);
#pragma write h, ( * This file provides an interface between eTPU code and CPU    *);
#pragma write h, ( * code. All references to the GPIO function should be made with*);
#pragma write h, ( * information in this file. This allows only symbolic          *);
#pragma write h, ( * information to be referenced which allows the eTPU code to be*);
#pragma write h, ( * optimized without effecting the CPU code.                    *);
#pragma write h, ( ****************************************************************/);
#pragma write h, (#ifndef _ETPU_GPIO_AUTO_H_ );
#pragma write h, (#define _ETPU_GPIO_AUTO_H_ );
#pragma write h, ( );
#pragma write h, (/* Function Configuration Information */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_FUNCTION_NUMBER) GPIO_FUNCTION_NUMBER );
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_TABLE_SELECT) ::ETPUentrytype(GPIO) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_NUM_PARMS) ::ETPUram(GPIO) );
#pragma write h, ( );
#pragma write h, (/* Host Service Request Definitions */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_OUTPUT_HIGH) GPIO_OUTPUT_HIGH );
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_OUTPUT_LOW) GPIO_OUTPUT_LOW );
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_INPUT_IMMED) GPIO_INPUT_IMMED );
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_INPUT_RISING) GPIO_INPUT_RISING );
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_INPUT_FALLING) GPIO_INPUT_FALLING );
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_INPUT_EITHER) GPIO_INPUT_EITHER );
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_INPUT_MATCH) GPIO_INPUT_MATCH );
#pragma write h, ( );
#pragma write h, (/* Parameter and variable definitions */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_PINSTATE_OFFSET) ::ETPUlocation (GPIO, PinState) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_GPIO_INPUT_MATCH_PERIOD_OFFSET) ::ETPUlocation (GPIO, InputMatchPeriod) );
#pragma write h, ( );
#pragma write h, (#endif /* _ETPU_GPIO_AUTO_H_ */);
#pragma write h, ( );


/*********************************************************************
 *
 * Copyright:
 *	Freescale Semiconductor, INC. All Rights Reserved.
 *  You are hereby granted a copyright license to use, modify, and
 *  distribute the SOFTWARE so long as this entire notice is
 *  retained without alteration in any modified and/or redistributed
 *  versions, and that such modified versions are clearly identified
 *  as such. No licenses are granted by implication, estoppel or
 *  otherwise under any patents or trademarks of Freescale
 *  Semiconductor, Inc. This software is provided on an "AS IS"
 *  basis and without warranty.
 *
 *  To the maximum extent permitted by applicable law, Freescale
 *  Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
 *  INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
 *  PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH
 *  REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
 *  AND ANY ACCOMPANYING WRITTEN MATERIALS.
 *
 *  To the maximum extent permitted by applicable law, IN NO EVENT
 *  SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER
 *  (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
 *  BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER
 *  PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
 *
 *  Freescale Semiconductor assumes no responsibility for the
 *  maintenance and support of this software
 *
 ********************************************************************/

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