📄 etpuc_pwm.c
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}
/*--------------------------------------------------------------------------+
| THREAD NAME: Immediate Update Missed (S2) |
| DESCRIPTION: The immediate update can not be done because the active edge |
| has already occured so just reschedule edge in next frame.|
+--------------------------------------------------------------------------*/
else if ( HostServiceRequest == PWM_IMMED_UPDATE && flag0==1)
{
NextEdge = LastFrame + ActiveTime;
ertb = NextEdge;
WriteErtBToMatchBAndEnable();
}
/*--------------------------------------------------------------------------+
| THREAD NAME: Coherent Update (S3) |
| DESCRIPTION: Copy coherent update values into normal period and Active. |
| This will always be coherent on the eTPU side because |
| threads run to completion so this can not be interrupted. |
| This will be coherent on the CPU side as long as the CPU |
| writes the values, issues the host service request and then|
| wait until the service is finished. |
+--------------------------------------------------------------------------*/
else if (HostServiceRequest == PWM_COHERENT_UPDATE )
{
NextEdge = LastFrame + Coherent_ActiveTime;
if ((Flag & 0x1) == 1){
ertb = NextEdge;
WriteErtBToMatchBAndEnable();
}
Period = Coherent_Period;
ActiveTime = Coherent_ActiveTime;
}
/*--------------------------------------------------------------------------+
| THREAD NAME: Frame Edge Active high (S4) |
| DESCRIPTION: All calculations are done on the frame edge to make sure |
| everything is coherent. |
| 1. If 0% is requested stop the action on the match. |
| 2. Calculate next period and active edge. |
| 3. Schedule the period edge. |
| 4. Store the active edge. |
| 5. Clear flag 0 to show next match should be match2. |
| 6. Request interrupt. |
+--------------------------------------------------------------------------*/
else if (( m1==1 && m2==0 && flag0==1 && flag1==1) ||
( m1==1 && m2==1 && flag0==1 && flag1==1) )
{
Clear( flag0); /*Match2 is next.*/
Flag = Flag & 0xFE;
SetChannelInterrupt() ;
erta = erta + Period;
PWM_Frame:
if( ActiveTime ==0 ){
OnMatchA (PinLow); /*opposite of normal for 0%*/
}
else{
OnMatchA (PinHigh); /*normal*/
}
PWM_Frame1:
LastFrame = erta;
WriteErtAToMatchAAndEnable();
Clear( MatchALatch );
NextEdge = erta + ActiveTime;
}
/*--------------------------------------------------------------------------+
| THREAD NAME: Frame Edge Active Low (S5) |
| DESCRIPTION: Do the 0% test and stop the action, then goto the full edge |
| thread. |
+--------------------------------------------------------------------------*/
else if (( m1==1 && m2==0 && flag0==1 && flag1==0) ||
( m1==1 && m2==1 && flag0==1 && flag1==0) )
{
Clear( flag0); /*Match2 is next.*/
Flag = Flag & 0xFE;
SetChannelInterrupt() ;
erta = erta + Period;
PWM_Frame2:
if( ActiveTime ==0 ){
OnMatchA (PinHigh); /*opposite of normal for 0%*/
}
else{
OnMatchA (PinLow); /*normal*/
}
goto PWM_Frame1;
}
/*--------------------------------------------------------------------------+
| THREAD NAME: Active Edge (S6) |
| DESCRIPTION: 1. Schedule the next already calculated active edge. |
| 2. Set flag 0 to show that match 1 should be next. |
+--------------------------------------------------------------------------*/
else if ((m1==0 && m2==1 && flag0==0) ||
(m1==1 && m2==1 && flag0==0))
{
ertb = NextEdge;
Set( flag0 );
Flag = Flag | 1;
WriteErtBToMatchBAndEnable();
Clear( MatchBLatch );
}
/*--------------------------------------------------------------------------+
| THREAD NAME: Error (S7) |
| DESCRIPTION: Something has gone wrong. :-( |
| Call the Global error routine and end. |
+--------------------------------------------------------------------------*/
else
{
#ifdef GLOBAL_ERROR_FUNC
Global_Error_Func();
#else
ClearAllLatches();
#endif
}
}
/* Information exported to Host CPU program */
#pragma write h, (::ETPUfilename (cpu/etpu_pwm_auto.h));
#pragma write h, (/****************************************************************);
#pragma write h, ( * WARNING this file is automatically generated DO NOT EDIT IT! *);
#pragma write h, ( * *);
#pragma write h, ( * FILE NAME: etpu_pwm_auto.c COPYRIGHT (c) Freescale 2004 *);
#pragma write h, ( * All Rights Reserved *);
#pragma write h, ( * This file generated by: *);
#pragma write h, ( * $RCSfile: etpuc_pwm.c,v $ $Revision: 1.5 $);
#pragma write h, ( * *);
#pragma write h, ( * This file provides an interface between eTPU code and CPU *);
#pragma write h, ( * code. All references to the PWM function should be made with *);
#pragma write h, ( * information in this file. This allows only symbolic *);
#pragma write h, ( * information to be referenced which allows the eTPU code to be*);
#pragma write h, ( * optimized without effecting the CPU code. *);
#pragma write h, ( ****************************************************************/);
#pragma write h, (#ifndef _ETPU_PWM_AUTO_H_ );
#pragma write h, (#define _ETPU_PWM_AUTO_H_ );
#pragma write h, ( );
#pragma write h, (/* Function Configuration Information */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_FUNCTION_NUMBER) PWM_FUNCTION_NUMBER );
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_TABLE_SELECT) ::ETPUentrytype(PWM) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_NUM_PARMS) ::ETPUram(PWM) );
#pragma write h, ( );
#pragma write h, (/* Host Service Request Definitions */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_INIT) PWM_INIT );
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_IMM_UPDATE) PWM_IMMED_UPDATE );
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_CO_UPDATE) PWM_COHERENT_UPDATE );
#pragma write h, ( );
#pragma write h, (/* Function Mode Bit Definitions - polarity options */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_ACTIVEHIGH) PWM_ACTIVE_HIGH );
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_ACTIVELOW) PWM_ACTIVE_LOW );
#pragma write h, ( );
#pragma write h, (/* Parameter Definitions */);
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_PERIOD_OFFSET) ::ETPUlocation (PWM, Period) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_ACTIVE_OFFSET) ::ETPUlocation (PWM, ActiveTime) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_CO_PERIOD_OFFSET) ::ETPUlocation (PWM, Coherent_Period) );
#pragma write h, (::ETPUliteral(#define FS_ETPU_PWM_CO_ACTIVE_OFFSET) ::ETPUlocation (PWM, Coherent_ActiveTime));
#pragma write h, ( );
#pragma write h, (#endif /* _ETPU_PWM_AUTO_H_ */);
#pragma write h, ( );
/*********************************************************************
*
* Copyright:
* Freescale Semiconductor, INC. All Rights Reserved.
* You are hereby granted a copyright license to use, modify, and
* distribute the SOFTWARE so long as this entire notice is
* retained without alteration in any modified and/or redistributed
* versions, and that such modified versions are clearly identified
* as such. No licenses are granted by implication, estoppel or
* otherwise under any patents or trademarks of Freescale
* Semiconductor, Inc. This software is provided on an "AS IS"
* basis and without warranty.
*
* To the maximum extent permitted by applicable law, Freescale
* Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
* PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH
* REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
* AND ANY ACCOMPANYING WRITTEN MATERIALS.
*
* To the maximum extent permitted by applicable law, IN NO EVENT
* SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER
* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
* BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER
* PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
*
* Freescale Semiconductor assumes no responsibility for the
* maintenance and support of this software
*
********************************************************************/
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