mpc5554.cmm

mpc55**系列芯片的例程 包括SCI,SPI,TIMER,FIT,EDMA等几乎所有功能的实现

;
; Example script for programming of MPC5554 internal flash.
;
; Internal Flash Memory (MCR.SIZE[0:3] = 0111; 2 MByte):
;   Low address range   256 kByte (16, 48, 48, 16, 64, 64 kByte)
;                       0x00000000--0x0003ffff
;   Mid address range   256 kByte (2 * 128 kByte)
;                       0x00040000--0x0007ffff
;   High address range  1.5 MByte (12 * 128 kByte)
;                       0x00080000--0x001fffff
;   Shadow row          1 kByte
;                       0x00fffc00--0x00ffffff
; 
; Internal SRAM         64 kByte
;                       0x40000000--0x4000ffff 
;
; Flash register base address is 0xc3f88000
;
; Version of flash algorithm depends on processor revision:
;   MPC5554 Rev 0.1               h7fa_v307.bin
;   MPC5554 Rev 0.3               h7fa_v309.bin
;   MPC5554 Rev 0.4               h7fa_v309.bin or h7fa_v310.bin
;   MPC5554 Rev 0.5               h7fa_v309.bin or h7fa_v310.bin
;   MPC5554 Rev A0                h7fa_v310.bin or higher
;   MPC5554 Rev A or higher       h7fa_v310.bin or higher
;
;   h7fa.bin contains latest version of flash algorithm.
;
; NOTES:
; 
;   Up to core revision 0.5 the last high address space sector is 
;   reserved for BAM and should not be erased. Flash family code NOP 
;   is used to protect against unintended erasure or programming.
;
;   Up to core revision 0.5 shadow row should not be erased. Flash 
;   family code NOP is used to protect against unintended erasure 
;   or programming.
;
;   Flash register base address has to be 0xc3f88000, because target
;   program does currently not support another base address.
;
;   Programming a 32 byte row more than once until next erasure may
;   cause bus error on this row. To avoid such problems FLASH.AUTO
;   can be used for programming.
;
; wrd - 16.03.2004
;

&flashbase=0x00000000
&flashsize="tbd"
&shadowbase=0x00fffc00
&shadowrow="no"
&rambase=0x40000000
&flashdriver="tbd.bin"

; Optimize flash programming time by switching on PLL
&optimize=0

;========================================================================
; CPU setup

SYStem.RESet
SYStem.BdmClock 4MHz
SYStem.CPU MPC5554
SYStem.Up

if &optimize==1
(
  ; setup PLL. NOTE: this value depends on external CPU
  ; configuration. 0x06000000 fits for the Axiom EVB.
  Data.Set ASD:0xC3F80000 %LONG 0x06000000
  ; set JTAG clock to 25 MHz
  SYStem.BdmClock 25MHz
)

; initialize internal SRAM
Data.Set EA:0x40000000--0x4000FFFF %Quad 0

; setup MMU for flash, RAM and register access
MMU.TLB1.SET 0x1 0xC0000500 0xFFF0000A 0xFFF0003F
MMU.TLB1.SET 0x2 0xC0000700 0x20000000 0x2000003F
MMU.TLB1.SET 0x3 0xC0000400 0x40000008 0x4000003F
MMU.TLB1.SET 0x4 0xC0000500 0xC3F00008 0xC3F0003F
MMU.TLB1.SET 0x5 0xC0000700 0x00000000 0x0000003F

; set BIUAPR register to make Flash memory visible for Nexus
Data.Set ASD:0xC3F88020 %Long 0x000000FF

;========================================================================
; Check SIU_MIDR register to select flash driver depending on processor 
; revision
&corerevision=data.long(EA:0xC3F90004)
PRINT "Core revision 0x" &corerevision
if &corerevision==0x55540001||&corerevision==0x55540002
(
  ; Core revision 0.1 has revision ID 0x01 or 0x02
  &flashdriver="~~/demo/powerpc/flash/quad/h7fa_v307.bin"
  &flashsize=0x0001E0000
  &shadowrow="no"
)
else if &corerevision==0x55540003
(
  ; Core revision 0.3, 0.4 and 0.5 have same revision ID 0x03
  &flashdriver="~~/demo/powerpc/flash/quad/h7fa_v309.bin"
  &flashsize=0x0001E0000
  &shadowrow="no"
)
else if (&corerevision>=0x55540004)&&(&corerevision<=0x555400ff)
(
  ; Core revision A0 or higher. Revison A0 has ID 0x08, revision A 
  ; has ID 0x10.
  &flashdriver="~~/demo/powerpc/flash/quad/h7fa.bin"
  &flashsize=0x000200000
  &shadowrow="yes"
)
else
(
  PRINT %error "flash driver for core revision not defined"
  END
)

;========================================================================
; Flash declaration

FLASH.RESet

FLASH.Create 1. (&flashbase+0x00000000)++0x03fff TARGET Quad 0. ; L0
FLASH.Create 1. (&flashbase+0x00004000)++0x0bfff TARGET Quad 1. ; L1 
FLASH.Create 1. (&flashbase+0x00010000)++0x0bfff TARGET Quad 2. ; L2 
FLASH.Create 1. (&flashbase+0x0001c000)++0x03fff TARGET Quad 3. ; L3
FLASH.Create 1. (&flashbase+0x00020000)++0x0ffff TARGET Quad 4. ; L4
FLASH.Create 1. (&flashbase+0x00030000)++0x0ffff TARGET Quad 5. ; L5
FLASH.Create 2. (&flashbase+0x00040000)++0x1ffff TARGET Quad 0. ; M0
FLASH.Create 2. (&flashbase+0x00060000)++0x1ffff TARGET Quad 1. ; M1
&flashaddr=&flashbase+0x00080000
&Hx=0.
while &flashaddr<(&flashbase+&flashsize)
(
  FLASH.Create 3. &flashaddr++0x1ffff TARGET Quad &Hx ; H0..H11
  &flashaddr=&flashaddr+0x20000
  &Hx=&Hx+1.
)
if &flashsize<0x000200000
(
  ; H11, do not erase BAM (Boot assist module) for core revision older 
  ; than A.
  FLASH.Create 3. &flashaddr++0x1ffff NOP Quad 
)
; Declare shadow row
if "&shadowrow"=="yes"
(
  FLASH.Create 4. (&shadowbase+0x00000000)++0x3ff NOP Quad
)
else
(
  FLASH.Create 4. (&shadowbase+0x00000000)++0x3ff NOP Quad
)

FLASH.TARGET E:&rambase E:&rambase+0x2000 0x1000 &flashdriver

;========================================================================
; Flash programming example
;
; Flash programming speed is about three times faster when memory class E:
; is used for data buffer (DUALPORT memory access). For DUALPORT access it
; is required to setup MemAccess NEXUS for both, NEXUS and JTAG debugger. 

DIALOG.YESNO "Program flash memory?"
entry &progflash

if &progflash 
(
  FLASH.Auto ALL
  ; optional set unused flash memory to 0xFF 
  ;Data.Set E:0x00--(&flashsize-1) %Quad 0xFFFFFFFFFFFFFFFF
  Data.LOAD * E:0x00--(&flashsize-1)
  FLASH.Auto OFF
)

;set JTAG clock back to default
SYStem.BdmClock 4MHz

ENDDO