📄 mac_csp_tx.s51
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EXTERN macTxTimestampCallback
FUNCTION macTxTimestampCallback,0202H
ARGFRAME ISTACK, 2, STACK
EXTERN macTxChannelBusyCallback
FUNCTION macTxChannelBusyCallback,0202H
ARGFRAME ISTACK, 2, STACK
EXTERN macTxAckNotReceivedCallback
FUNCTION macTxAckNotReceivedCallback,0202H
ARGFRAME ISTACK, 2, STACK
EXTERN macPib
EXTERN macRxOnFlag
EXTERN macTxCsmaBackoffDelay
// C:\Texas Instruments\ZStack-1.4.2-1.1.0\Components\mac\low_level\srf03\single_chip\mac_csp_tx.c
// 1 /**************************************************************************************************
// 2 Filename:
// 3 Revised: $Date: 2007-03-28 18:21:19 -0700 (Wed, 28 Mar 2007) $
// 4 Revision: $Revision: 13888 $
// 5
// 6 Description:
// 7
// 8 Describe the purpose and contents of the file.
// 9
// 10 Copyright (c) 2006 by Texas Instruments, Inc.
// 11 All Rights Reserved. Permission to use, reproduce, copy, prepare
// 12 derivative works, modify, distribute, perform, display or sell this
// 13 software and/or its documentation for any purpose is prohibited
// 14 without the express written consent of Texas Instruments, Inc.
// 15 **************************************************************************************************/
// 16
// 17
// 18
// 19 /* ------------------------------------------------------------------------------------------------
// 20 * Includes
// 21 * ------------------------------------------------------------------------------------------------
// 22 */
// 23
// 24 /* hal */
// 25 #include "hal_types.h"
// 26 #include "hal_mcu.h"
ASEGN SFR_AN:DATA:NOROOT,091H
// unsigned char volatile __sfr RFIM
RFIM:
DS 1
ASEGN SFR_AN:DATA:NOROOT,094H
// unsigned char volatile __sfr T2CMP
T2CMP:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0a1H
// unsigned char volatile __sfr T2OF0
T2OF0:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0a6H
// unsigned char volatile __sfr T2TLD
T2TLD:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0a7H
// unsigned char volatile __sfr T2THD
T2THD:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0e1H
// unsigned char volatile __sfr RFST
RFST:
DS 1
// 27
// 28 /* high-level */
// 29 #include "mac_spec.h"
// 30 #include "mac_pib.h"
// 31
// 32 /* exported low-level */
// 33 #include "mac_low_level.h"
// 34
// 35 /* low-level specific */
// 36 #include "mac_csp_tx.h"
// 37 #include "mac_tx.h"
// 38 #include "mac_rx.h"
// 39 #include "mac_rx_onoff.h"
// 40
// 41 /* target specific */
// 42 #include "mac_radio_defs.h"
// 43
// 44 /* debug */
// 45 #include "mac_assert.h"
// 46
// 47
// 48 /* ------------------------------------------------------------------------------------------------
// 49 * CSP Defines / Macros
// 50 * ------------------------------------------------------------------------------------------------
// 51 */
// 52 /* immediate strobe commands */
// 53 #define ISSTART 0xFE
// 54 #define ISSTOP 0xFF
// 55
// 56 /* strobe processor instructions */
// 57 #define SKIP(s,c) (0x00 | (((s) & 0x07) << 4) | ((c) & 0x0F)) /* skip 's' instructions if 'c' is true */
// 58 #define WHILE(c) SKIP(0,c) /* pend while 'c' is true (derived instruction) */
// 59 #define WAITW(w) (0x80 | ((w) & 0x1F)) /* wait for 'w' number of MAC timer overflows */
// 60 #define WEVENT (0xB8) /* wait for MAC timer compare */
// 61 #define WAITX (0xBB) /* wait for CPSX number of MAC timer overflows */
// 62 #define LABEL (0xBA) /* set next instruction as start of loop */
// 63 #define RPT(c) (0xA0 | ((c) & 0x0F)) /* if condition is true jump to last label */
// 64 #define INT (0xB9) /* assert IRQ_CSP_INT interrupt */
// 65 #define INCY (0xBD) /* increment CSPY */
// 66 #define INCMAXY(m) (0xB0 | ((m) & 0x07)) /* increment CSPY but not above maximum value of 'm' */
// 67 #define DECY (0xBE) /* decrement CSPY */
// 68 #define DECZ (0xBF) /* decrement CSPZ */
// 69 #define RANDXY (0xBC) /* load the lower CSPY bits of CSPX with random value */
// 70
// 71 /* strobe processor command instructions */
// 72 #define SSTOP (0xDF) /* stop program execution */
// 73 #define SNOP (0xC0) /* no operation */
// 74 #define STXCALN (0xC1) /* enable and calibrate frequency synthesizer for TX */
// 75 #define SRXON (0xC2) /* turn on receiver */
// 76 #define STXON (0xC3) /* transmit after calibration */
// 77 #define STXONCCA (0xC4) /* transmit after calibration if CCA indicates clear channel */
// 78 #define SRFOFF (0xC5) /* turn off RX/TX */
// 79 #define SFLUSHRX (0xC6) /* flush receive FIFO */
// 80 #define SFLUSHTX (0xC7) /* flush transmit FIFO */
// 81 #define SACK (0xC8) /* send ACK frame */
// 82 #define SACKPEND (0xC9) /* send ACK frame with pending bit set */
// 83
// 84 /* conditions for use with instructions SKIP and RPT */
// 85 #define C_CCA_IS_VALID 0x00
// 86 #define C_SFD_IS_ACTIVE 0x01
// 87 #define C_CPU_CTRL_IS_ON 0x02
// 88 #define C_END_INSTR_MEM 0x03
// 89 #define C_CSPX_IS_ZERO 0x04
// 90 #define C_CSPY_IS_ZERO 0x05
// 91 #define C_CSPZ_IS_ZERO 0x06
// 92
// 93 /* negated conditions for use with instructions SKIP and RPT */
// 94 #define C_NEGATE(c) ((c) | 0x08)
// 95 #define C_CCA_IS_INVALID C_NEGATE(C_CCA_IS_VALID)
// 96 #define C_SFD_IS_INACTIVE C_NEGATE(C_SFD_IS_ACTIVE)
// 97 #define C_CPU_CTRL_IS_OFF C_NEGATE(C_CPU_CTRL_IS_ON)
// 98 #define C_NOT_END_INSTR_MEM C_NEGATE(C_END_INSTR_MEM)
// 99 #define C_CSPX_IS_NON_ZERO C_NEGATE(C_CSPX_IS_ZERO)
// 100 #define C_CSPY_IS_NON_ZERO C_NEGATE(C_CSPY_IS_ZERO)
// 101 #define C_CSPZ_IS_NON_ZERO C_NEGATE(C_CSPZ_IS_ZERO)
// 102
// 103 ///////////////////////////////////////////////////////////////////////////////////////
// 104 // REV_B_WORKAROUND : part of a workaround to help ameliorate chip bug #273.
// 105 // This bug could actually be the source of extant every-once-in-a-while problems.
// 106 // When Rev B is obsolete, delete these defines and all references to them.
// 107 // Compile errors should flag all related fixes.
// 108 #define __SNOP_SKIP__ 1
// 109 #define __SNOP__ SNOP
// 110 ///////////////////////////////////////////////////////////////////////////////////////
// 111
// 112
// 113 /* ------------------------------------------------------------------------------------------------
// 114 * Defines
// 115 * ------------------------------------------------------------------------------------------------
// 116 */
// 117
// 118 /* CSPY return values from CSP program */
// 119 #define CSPY_RXTX_COLLISION 0
// 120 #define CSPY_NO_RXTX_COLLISION 1
// 121
// 122 /* CSPZ return values from CSP program */
// 123 #define CSPZ_CODE_TX_DONE 0
// 124 #define CSPZ_CODE_CHANNEL_BUSY 1
// 125 #define CSPZ_CODE_TX_ACK_TIME_OUT 2
// 126
// 127
// 128 /* ------------------------------------------------------------------------------------------------
// 129 * Macros
// 130 * ------------------------------------------------------------------------------------------------
// 131 */
// 132 #define CSP_STOP_AND_CLEAR_PROGRAM() st( RFST = ISSTOP; )
// 133 #define CSP_START_PROGRAM() st( RFST = ISSTART; )
// 134 ////////////////////////////////////////////////////////////////////////////////////////////////////
// 135 // REV_B_WORKAROUND : workaround for chip bug #574, delete this whole mess when Rev B is obsolete.
// 136 // Compile errors will flag all instances of macro call. Delete those too.
// 137 #ifndef _REMOVE_REV_B_WORKAROUNDS
// 138 #define __FIX_T2CMP_BUG__() st( if (T2CMP == 0) { T2CMP = 1;} )
// 139 #else
// 140 #define __FIX_T2CMP_BUG__()
// 141 #endif
// 142 ////////////////////////////////////////////////////////////////////////////////////////////////////
// 143
// 144 /*
// 145 * These macros improve readability of using T2CMP in conjunction with WEVENT.
// 146 *
// 147 * The timer2 compare, T2CMP, only compares one byte of the 16-bit timer register.
// 148 * It is configurable and has been set to compare against the upper byte of the timer value.
// 149 * The CSP instruction WEVENT waits for the timer value to be greater than or equal
// 150 * the value of T2CMP.
// 151 *
// 152 * Reading the timer value is done by reading the low byte first. This latches the
// 153 * high byte. A trick with the ternary operator is used by a macro below to force a
// 154 * read of the low byte when returning the value of the high byte.
// 155 *
// 156 * CSP_WEVENT_SET_TRIGGER_NOW() - sets the WEVENT trigger point at the current timer count
// 157 * CSP_WEVENT_SET_TRIGGER_SYMBOLS(x) - sets the WEVENT trigger point in symbols
// 158 * CSP_WEVENT_READ_COUNT_SYMBOLS() - reads the current timer count in symbols
// 159 */
// 160 #define T2THD_TICKS_PER_SYMBOL (MAC_RADIO_TIMER_TICKS_PER_SYMBOL() >> 8)
// 161
// 162 #define CSP_WEVENT_SET_TRIGGER_NOW() st( uint8 temp=T2TLD; T2CMP = T2THD; __FIX_T2CMP_BUG__(); )
// 163 #define CSP_WEVENT_SET_TRIGGER_SYMBOLS(x) st( MAC_ASSERT(x <= MAC_A_UNIT_BACKOFF_PERIOD); \
// 164 T2CMP = (x) * T2THD_TICKS_PER_SYMBOL; \
// 165 __FIX_T2CMP_BUG__(); )
// 166 #define CSP_WEVENT_READ_COUNT_SYMBOLS() (((T2TLD) ? T2THD : T2THD) / T2THD_TICKS_PER_SYMBOL)
// 167
// 168 /*
// 169 * Number of bits used for aligning a slotted transmit to the backoff count (plus
// 170 * derived values). There are restrictions on this value. Compile time integrity
// 171 * checks will catch an illegal setting of this value. A full explanation accompanies
// 172 * this compile time check (see bottom of this file).
// 173 */
// 174 #define SLOTTED_TX_MAX_BACKOFF_COUNTDOWN_NUM_BITS 4
// 175 #define SLOTTED_TX_MAX_BACKOFF_COUNTDOWN (1 << SLOTTED_TX_MAX_BACKOFF_COUNTDOWN_NUM_BITS)
// 176 #define SLOTTED_TX_BACKOFF_COUNT_ALIGN_BIT_MASK (SLOTTED_TX_MAX_BACKOFF_COUNTDOWN - 1)
// 177
// 178
// 179
// 180 /* ------------------------------------------------------------------------------------------------
// 181 * Local Programs
// 182 * ------------------------------------------------------------------------------------------------
// 183 */
// 184 static void cspPrepForTxProgram(void);
// 185
// 186
// 187 /**************************************************************************************************
// 188 * @fn macCspTxReset
// 189 *
// 190 * @brief Reset the CSP. Immediately halts any running program.
// 191 *
// 192 * @param none
// 193 *
// 194 * @return none
// 195 **************************************************************************************************
// 196 */
RSEG BANKED_CODE:CODE:NOROOT(0)
// 197 void macCspTxReset(void)
macCspTxReset:
CFI Block cfiBlock0 Using cfiCommon0
CFI Function macCspTxReset
// 198 {
FUNCALL macCspTxReset, macMcuAndRFIM
LOCFRAME ISTACK, 2, STACK
ARGFRAME ISTACK, 2, STACK
FUNCALL macCspTxReset, macMcuAndRFIM
LOCFRAME ISTACK, 2, STACK
ARGFRAME ISTACK, 2, STACK
PUSH DPL
CFI DPL0 Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
PUSH DPH
CFI DPH0 Frame(CFA_SP, 5)
CFI CFA_SP SP+-5
; Saved register size: 2
; Auto size: 0
// 199 MAC_MCU_CSP_STOP_DISABLE_INTERRUPT();
; Setup parameters for call to function macMcuAndRFIM
MOV R1,#-0x3
MOV DPTR,#(macMcuAndRFIM & 0xffff)
MOV A,#((macMcuAndRFIM >> 16) & 0xff)
LCALL ?BCALL ; Banked call to: DPTR()
// 200 MAC_MCU_CSP_INT_DISABLE_INTERRUPT();
; Setup parameters for call to function macMcuAndRFIM
MOV R1,#-0x2
CFI EndBlock cfiBlock0
REQUIRE ?Subroutine1
; // Fall through to label ?Subroutine1
// 201 CSP_STOP_AND_CLEAR_PROGRAM();
// 202 }
RSEG BANKED_CODE:CODE:NOROOT(0)
?Subroutine1:
CFI Block cfiBlock1 Using cfiCommon0
CFI NoFunction
CFI CFA_SP SP+-5
CFI DPL0 Frame(CFA_SP, 4)
CFI DPH0 Frame(CFA_SP, 5)
MOV A,#((macMcuAndRFIM >> 16) & 0xff)
LCALL ?BCALL ; Banked call to: DPTR()
MOV 0xe1,#-0x1
LJMP ??Subroutine0_1 & 0xFFFF
CFI EndBlock cfiBlock1
// 203
// 204
// 205 /*=================================================================================================
// 206 * @fn cspPrepForTxProgram
// 207 *
// 208 * @brief Prepare and initialize for transmit CSP program.
// 209 * Call *before* loading the CSP program!
// 210 *
// 211 * @param none
// 212 *
// 213 * @return none
// 214 *=================================================================================================
// 215 */
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