📄 pid.mdl
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OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Integrator
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
IgnoreLimit off
ZeroCross on
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Scope
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "-1"
}
Block {
BlockType Step
Time "1"
Before "0"
After "1"
SampleTime "-1"
VectorParams1D on
ZeroCross on
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType TransferFcn
Numerator "[1]"
Denominator "[1 2 1]"
AbsoluteTolerance "auto"
Realization "auto"
}
Block {
BlockType UnitDelay
X0 "0"
SampleTime "1"
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
Block {
BlockType ZeroOrderHold
SampleTime "1"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Arial"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "Subsys"
Location [143, 95, 723, 728]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Gain
Name "Gain"
Position [350, 230, 380, 260]
Gain "1/2.5"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Integrator
Name "Integrator"
Ports [1, 1]
Position [410, 230, 440, 260]
IgnoreLimit off
}
Block {
BlockType Mux
Name "Mux"
Ports [2, 1]
Position [475, 109, 490, 216]
ShowName off
Inputs "2"
DisplayOption "bar"
}
Block {
BlockType Scope
Name "Scope"
Ports [1]
Position [520, 149, 550, 181]
Floating off
Location [5, 56, 1029, 741]
Open off
NumInputPorts "1"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
YMin "-2"
YMax "2"
DataFormat "StructureWithTime"
SampleTime "0"
}
Block {
BlockType Step
Name "Step"
Position [15, 120, 45, 150]
SampleTime "0"
}
Block {
BlockType SubSystem
Name "Subsystem"
Ports [2, 1]
Position [140, 176, 220, 309]
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
FunctionWithSeparateData off
MaskHideContents off
System {
Name "Subsystem"
Location [177, 209, 675, 509]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [25, 143, 55, 157]
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "In2"
Position [25, 198, 55, 212]
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Gain
Name "Gain1"
Position [265, 81, 300, 109]
Gain "1.5"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name "Gain2"
Position [265, 136, 300, 164]
Gain "3.5"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name "Gain3"
Position [385, 79, 420, 111]
Gain "2.5"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [155, 85, 175, 105]
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum1"
Ports [2, 1]
Position [205, 140, 225, 160]
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum2"
Ports [2, 1]
Position [330, 85, 350, 105]
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType UnitDelay
Name "Unit Delay 1"
Position [105, 133, 140, 167]
SampleTime "0.004"
}
Block {
BlockType Outport
Name "Out1"
Position [440, 88, 470, 102]
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "In1"
SrcPort 1
Points [15, 0]
Branch {
DstBlock "Unit Delay 1"
DstPort 1
}
Branch {
Points [0, -55]
DstBlock "Sum"
DstPort 1
}
}
Line {
SrcBlock "Unit Delay 1"
SrcPort 1
Points [20, 0]
Branch {
DstBlock "Sum1"
DstPort 1
}
Branch {
DstBlock "Sum"
DstPort 2
}
}
Line {
SrcBlock "Sum1"
SrcPort 1
DstBlock "Gain2"
DstPort 1
}
Line {
SrcBlock "In2"
SrcPort 1
Points [155, 0]
DstBlock "Sum1"
DstPort 2
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "Gain1"
DstPort 1
}
Line {
SrcBlock "Gain1"
SrcPort 1
DstBlock "Sum2"
DstPort 1
}
Line {
SrcBlock "Sum2"
SrcPort 1
DstBlock "Gain3"
DstPort 1
}
Line {
SrcBlock "Gain2"
SrcPort 1
Points [35, 0]
DstBlock "Sum2"
DstPort 2
}
Line {
SrcBlock "Gain3"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
}
}
Block {
BlockType TransferFcn
Name "Transfer Fcn"
Position [260, 227, 320, 263]
Numerator "[21]"
Denominator "[0.005 1]"
}
Block {
BlockType ZeroOrderHold
Name "Zero-Order\nHold1"
Position [70, 195, 105, 225]
SampleTime "0.004"
}
Block {
BlockType ZeroOrderHold
Name "Zero-Order\nHold2"
Position [70, 260, 105, 290]
SampleTime "0.004"
}
Line {
SrcBlock "Zero-Order\nHold1"
SrcPort 1
DstBlock "Subsystem"
DstPort 1
}
Line {
SrcBlock "Zero-Order\nHold2"
SrcPort 1
DstBlock "Subsystem"
DstPort 2
}
Line {
SrcBlock "Subsystem"
SrcPort 1
DstBlock "Transfer Fcn"
DstPort 1
}
Line {
SrcBlock "Transfer Fcn"
SrcPort 1
DstBlock "Gain"
DstPort 1
}
Line {
SrcBlock "Gain"
SrcPort 1
DstBlock "Integrator"
DstPort 1
}
Line {
SrcBlock "Integrator"
SrcPort 1
Points [15, 0]
Branch {
Points [0, 90; -405, 0]
DstBlock "Zero-Order\nHold2"
DstPort 1
}
Branch {
DstBlock "Mux"
DstPort 2
}
}
Line {
SrcBlock "Step"
SrcPort 1
Points [5, 0]
Branch {
DstBlock "Mux"
DstPort 1
}
Branch {
DstBlock "Zero-Order\nHold1"
DstPort 1
}
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Scope"
DstPort 1
}
}
}
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