drawusb.lst
来自「单片机USB接口模拟键盘,该程序可以控制PC机的PS/2键盘的NUM LOCK和」· LST 代码 · 共 1,077 行 · 第 1/5 页
LST
1,077 行
011C: 30 HALT
011D: 30 HALT
011E: 30 HALT
011F: 30 HALT
0120: 30 HALT
0121: 30 HALT
0122: 30 HALT
0123: 30 HALT
0124: 30 HALT
0125: 30 HALT
0126: 30 HALT
0127: 30 HALT
0128: 30 HALT
0129: 30 HALT
012A: 30 HALT
012B: 30 HALT
012C: 30 HALT
012D: 30 HALT
012E: 30 HALT
012F: 30 HALT
0130: 30 HALT
0131: 30 HALT
0132: 30 HALT
0133: 30 HALT
0134: 30 HALT
0135: 30 HALT
0136: 30 HALT
0137: 30 HALT
0138: 30 HALT
0139: 30 HALT
013A: 30 HALT
013B: 30 HALT
013C: 30 HALT
013D: 30 HALT
013E: 30 HALT
013F: 30 HALT
0140: 30 HALT
0141: 30 HALT
0142: 30 HALT
0143: 30 HALT
0144: 30 HALT
0145: 30 HALT
0146: 30 HALT
0147: 30 HALT
0148: 30 HALT
0149: 30 HALT
014A: 30 HALT
014B: 30 HALT
014C: 30 HALT
014D: 30 HALT
014E: 30 HALT
014F: 30 HALT
0150: 00 SWI
0151: 00 SWI
0152: 53 00 MOV [a_ram],A
0154: 00 SWI
0155: 00 SWI
0156: 00 SWI
0157: 00 SWI
0158: 00 SWI
0159: 00 SWI
015A: 47 00 00 TST [0],0
015D: 00 SWI
015E: 00 SWI
015F: 00 SWI
0160: 00 SWI
0161: 00 SWI
0162: 00 SWI
0163: 00 SWI
0164: 00 SWI
0165: 00 SWI
0166: 00 SWI
0167: 00 SWI
0168: 00 SWI
0169: 00 SWI
016A: 39 00 CMP A,0
016C: 00 SWI
016D: 00 SWI
016E: 00 SWI
016F: 00 SWI
0170: 01 01 ADD A,1
0172: 75 INC X
0173: 01 BE ADD A,190
0175: 01 01 ADD A,1
0177: 80 01 JMP 0x0179
0179: 7A 01 DEC [a_ram+1]
017B: 82 01 JMP 0x037D
017D: 8D 01 JMP 0xFE7F
017F: 84 80 JMP 0x0600
0181: 7F RET
0182: 01 96 ADD A,150
0184: 00 SWI
0185: 00 SWI
0186: 00 SWI
0187: 09 07 ADC A,7
0189: 39 00 CMP A,0
018B: 00 SWI
018C: DE 00 JNC 0xFF8D
018E: 00 SWI
018F: 00 SWI
0190: 2B 07 OR A,[X+7]
0192: 49 00 00 TST REG[0],0
0195: DE 04 JNC 0xFF9A
0197: 01 A3 ADD A,163
0199: 00 SWI
019A: 00 SWI
019B: 01 AC ADD A,172
019D: 00 SWI
019E: 00 SWI
019F: 01 B5 ADD A,181
01A1: 00 SWI
01A2: 00 SWI
01A3: 00 SWI
01A4: 01 00 ADD A,0
01A6: 08 PUSH A
01A7: 00 SWI
01A8: 21 00 AND A,0
01AA: 00 SWI
01AB: DE 00 JNC 0xFFAC
01AD: 01 00 ADD A,0
01AF: 00 SWI
01B0: 00 SWI
01B1: 29 00 OR A,0
01B3: 00 SWI
01B4: DE 00 JNC 0xFFB5
01B6: 01 00 ADD A,0
01B8: 00 SWI
01B9: 00 SWI
01BA: 31 00 XOR A,0
01BC: 00 SWI
01BD: DE 00 JNC 0xFFBE
01BF: 00 SWI
01C0: 00 SWI
01C1: 22 07 AND A,[7]
01C3: 27 00 00 AND [X+0],0
01C6: DE 00 JNC 0xFFC7
01C8: 00 SWI
01C9: 00 SWI
01CA: 12 07 SUB A,[7]
01CC: 15 00 SUB [X+0],A
01CE: 00 SWI
01CF: DE 70 JNC 0x0040
FILE: lib\psocconfigtbl.asm
(0001) ; Generated by PSoC Designer ver 4.3 b1884 : 23 June, 2006
(0002) ;
(0003) include "m8c.inc"
(0004) ; Personalization tables
(0005) export LoadConfigTBL_drawusb2
(0006) AREA psoc_config(rom, rel)
(0007) LoadConfigTBL_drawusb2:
(0008) ; Ordered Global Register values
01D1: EF 62 JACC 0x0134 (0009) M8C_SetBank0
(0010) ; Global Register values
01D3: 30 HALT (0011) mov reg[30h], 00h ; CPUCLKCR register (CPUCLKCR)
01D4: 00 SWI
01D5: 62 05 00 MOV REG[5],0 (0012) mov reg[05h], 00h ; P00CR register (P00CR)
01D8: 62 06 00 MOV REG[6],0 (0013) mov reg[06h], 00h ; P01CR register (P01CR)
01DB: 62 07 06 MOV REG[7],6 (0014) mov reg[07h], 06h ; P02CR register (P02CR)
01DE: 62 08 06 MOV REG[8],6 (0015) mov reg[08h], 06h ; P03CR register (P03CR)
01E1: 62 09 06 MOV REG[9],6 (0016) mov reg[09h], 06h ; P04CR register (P04CR)
01E4: 62 0A 07 MOV REG[10],7 (0017) mov reg[0ah], 07h ; P05CR register (P05CR)
01E7: 62 0B 07 MOV REG[11],7 (0018) mov reg[0bh], 07h ; P06CR register (P06CR)
01EA: 62 0C 00 MOV REG[12],0 (0019) mov reg[0ch], 00h ; P07CR register (P07CR)
01ED: 62 0D 00 MOV REG[13],0 (0020) mov reg[0dh], 00h ; P10CR register (P10CR)
01F0: 62 0E 00 MOV REG[14],0 (0021) mov reg[0eh], 00h ; P11CR register (P11CR)
01F3: 62 0F 00 MOV REG[15],0 (0022) mov reg[0fh], 00h ; P12CR register (P12CR)
01F6: 62 10 07 MOV REG[16],7 (0023) mov reg[10h], 07h ; P13CR register (P13CR)
01F9: 62 11 00 MOV REG[17],0 (0024) mov reg[11h], 00h ; P14CR register (P14CR)
01FC: 62 12 00 MOV REG[18],0 (0025) mov reg[12h], 00h ; P15CR register (P15CR)
01FF: 62 13 00 MOV REG[19],0 (0026) mov reg[13h], 00h ; P16CR register (P16CR)
0202: 62 14 00 MOV REG[20],0 (0027) mov reg[14h], 00h ; P17CR register (P17CR)
0205: 62 15 00 MOV REG[21],0 (0028) mov reg[15h], 00h ; P20CR register (P20CR)
0208: 62 16 00 MOV REG[22],0 (0029) mov reg[16h], 00h ; P30CR register (P30CR)
020B: 62 17 00 MOV REG[23],0 (0030) mov reg[17h], 00h ; P40CR register (P40CR)
020E: 62 3D 00 MOV REG[61],0 (0031) mov reg[3dh], 00h ; SPICR register (SPICR)
0211: 62 2B 00 MOV REG[43],0 (0032) mov reg[2bh], 00h ; TCAPINTE register (TCAPINTE)
0214: 62 31 00 MOV REG[49],0 (0033) mov reg[31h], 00h ; TMRCLKCR register (TMRCLKCR)
0217: 62 2A 00 MOV REG[42],0 (0034) mov reg[2ah], 00h ; TMRCR register (TMRCR)
021A: 62 73 00 MOV REG[115],0 (0035) mov reg[73h], 00h ; VREGCR register (VREGCR)
(0036) ; Instance name USB, User Module USB
021D: 71 10 OR F,16 (0037) M8C_SetBank1
(0038) ; Global Register values
021F: 62 E3 14 MOV REG[227],20 (0039) mov reg[e3h], 14h ; VLDCR register (VLDCR)
(0040) ; Instance name USB, User Module USB
0222: 70 EF AND F,239 (0041) M8C_SetBank0
0224: 7F RET (0042) ret
FILE: lib\psocconfig.asm
(0001) ; Generated by PSoC Designer ver 4.3 b1884 : 23 June, 2006
(0002) ;
(0003) ;==========================================================================
(0004) ; PSoCConfig.asm
(0005) ; @PSOC_VERSION
(0006) ;
(0007) ; Version: 0.85
(0008) ; Revised: June 22, 2004
(0009) ; Copyright Cypress MicroSystems 2000-2004. All Rights Reserved.
(0010) ;
(0011) ; This file is generated by the Device Editor on Application Generation.
(0012) ; It contains code which loads the configuration data table generated in
(0013) ; the file PSoCConfigTBL.asm
(0014) ;
(0015) ; DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
(0016) ; Edits to this file will not be preserved.
(0017) ;==========================================================================
(0018) ;
(0019) include "m8c.inc"
(0020) include "memory.inc"
(0021) include "GlobalParams.inc"
(0022)
(0023) export LoadConfigInit
(0024) export _LoadConfigInit
(0025) export LoadConfig_drawusb2
(0026) export _LoadConfig_drawusb2
(0027) export Port_1_Data_SHADE
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