12864b.lss.svn-base

Program using ATMEGA2561 to initialize Crystalfontz CFAG12864B series of LCD modules with LED backli

  //Reset the hardware timer count. The timer is stopped.
  TCNT0=0;
 6a8:	16 bc       	out	0x26, r1	; 38
  //Set the compare to 112.
  OCR0A=112;
 6aa:	80 e7       	ldi	r24, 0x70	; 112
 6ac:	87 bd       	out	0x27, r24	; 39
  //Enable the counter.
  //  16MHz/1 = 16,000,000Hz
  //  16,000,000/64 = 250,000Hz
     TCCR0A = (1 << WGM00) | (1 << COM0A1);
 6ae:	81 e8       	ldi	r24, 0x81	; 129
 6b0:	84 bd       	out	0x24, r24	; 36
     TCCR0B = (1 << CS01);
 6b2:	82 e0       	ldi	r24, 0x02	; 2
 6b4:	85 bd       	out	0x25, r24	; 37
  }
 6b6:	08 95       	ret

000006b8 <Initialize_And_Start_Timer_1_32_Hz_and_Backlight>:
//============================================================================
void Initialize_And_Start_Timer_1_32_Hz_and_Backlight(void)
  {
 6b8:	e0 e8       	ldi	r30, 0x80	; 128
 6ba:	f0 e0       	ldi	r31, 0x00	; 0
 6bc:	10 82       	st	Z, r1
  //Stop the timer for now.
  TCCR1A=0x00;
  TCCR1B=0x00;
 6be:	a1 e8       	ldi	r26, 0x81	; 129
 6c0:	b0 e0       	ldi	r27, 0x00	; 0
 6c2:	1c 92       	st	X, r1

  //Make sure the interrupt is disabled
  TIMSK1=0;
 6c4:	10 92 6f 00 	sts	0x006F, r1

  //Reset the hardware timer count. The timer is stopped.
  TCNT1=0;
 6c8:	10 92 85 00 	sts	0x0085, r1
 6cc:	10 92 84 00 	sts	0x0084, r1

  //Set the compare to 255 = 100%, LCD backlight is on.
  OCR1A=255;
 6d0:	8f ef       	ldi	r24, 0xFF	; 255
 6d2:	90 e0       	ldi	r25, 0x00	; 0
 6d4:	90 93 89 00 	sts	0x0089, r25
 6d8:	80 93 88 00 	sts	0x0088, r24

// TCCR1A:
// COM1A1 COM1A0 COM1B1 COM1B0 COM1C1 COM1C0 WGM11 WGM10
//    0      1      0      0      0      0     0     1
  //Enable the counter.
  TCCR1A = (1 << WGM10) | (1 << COM1A1);
 6dc:	81 e8       	ldi	r24, 0x81	; 129
 6de:	80 83       	st	Z, r24
  TCCR1B = (1 << CS12) | (1 << CS10) | (1 << WGM12);
 6e0:	8d e0       	ldi	r24, 0x0D	; 13
 6e2:	8c 93       	st	X, r24
  }
 6e4:	08 95       	ret

000006e6 <Initialize_GPIO>:
// Port Direction Initialization.
//
// This routine will set the default processor port directions.
//----------------------------------------------------------------------------
void Initialize_GPIO(void)
{
 6e6:	9f ef       	ldi	r25, 0xFF	; 255
 6e8:	91 b9       	out	0x01, r25	; 1
 *              2: LCD_DB2,             output, low
 *              1: LCD_DB1,             output, low
 *              0: LCD_DB0,             output, low
 */
     DDRA =  0b11111111;
     PORTA = 0b00000000;
 6ea:	12 b8       	out	0x02, r1	; 2
 *              3: MISO,                output, low
 *              2: MOSI,                output, low
 *              1: SCK,                 output, low
 *              0: nSS,                 output, low
 */
     DDRB =  0b10111111;
 6ec:	8f eb       	ldi	r24, 0xBF	; 191
 6ee:	84 b9       	out	0x04, r24	; 4
     PORTB = 0b01110000;
 6f0:	80 e7       	ldi	r24, 0x70	; 112
 6f2:	85 b9       	out	0x05, r24	; 5
 *              3: LCD_CS2,             output, high
 *              2: LCD_RST,             output, low
 *              1: LCD_CS3,             output, high
 *              0: NC                   input, pull-up
 */
     DDRC =  0b11111110;
 6f4:	8e ef       	ldi	r24, 0xFE	; 254
 6f6:	87 b9       	out	0x07, r24	; 7
     PORTC = 0b11011011;
 6f8:	8b ed       	ldi	r24, 0xDB	; 219
 6fa:	88 b9       	out	0x08, r24	; 8
 *              3: NC,                  input, pull-up
 *              2: LED2,                input, pull-up
 *              1: LED1,                input, pull-up
 *              0: NC,                  input, pull-up
 */
     DDRD =  0b00000110;
 6fc:	86 e0       	ldi	r24, 0x06	; 6
 6fe:	8a b9       	out	0x0a, r24	; 10
     PORTD = 0b11111001;
 700:	89 ef       	ldi	r24, 0xF9	; 249
 702:	8b b9       	out	0x0b, r24	; 11
 *              3: LCD_BL_GRN,          output, high
 *              2: NC,                  input, pull-up
 *              1: NC,                  input, pull-up
 *              0: NC,                  input, pull-up
 */
     DDRE =  0b00001000;
 704:	88 e0       	ldi	r24, 0x08	; 8
 706:	8d b9       	out	0x0d, r24	; 13
     PORTE = 0b11111111;
 708:	9e b9       	out	0x0e, r25	; 14
 *              3: NC,                  input, pull-up
 *              2: NC,                  input, pull-up
 *              1: NC,                  input, pull-up
 *              0: NC,                  input, pull-up
 */
     DDRG =  0b00010000;
 70a:	80 e1       	ldi	r24, 0x10	; 16
 70c:	83 bb       	out	0x13, r24	; 19
     PORTG = 0b11111111;
 70e:	94 bb       	out	0x14, r25	; 20
}
 710:	08 95       	ret

00000712 <update_contrast>:
//============================================================================
void update_contrast(unsigned char contrast)
{
 712:	9f ef       	ldi	r25, 0xFF	; 255
 714:	89 9f       	mul	r24, r25
 716:	c0 01       	movw	r24, r0
 718:	11 24       	eor	r1, r1
 71a:	64 e6       	ldi	r22, 0x64	; 100
 71c:	70 e0       	ldi	r23, 0x00	; 0
 71e:	0e 94 d9 03 	call	0x7b2	; 0x7b2 <__udivmodhi4>
 722:	67 bd       	out	0x27, r22	; 39
     OCR0A = ((unsigned short)contrast * 255) / 100;
//     OCR0A = ((uword)contrast * 128) / 100;
}
 724:	08 95       	ret

00000726 <update_backlight>:
//============================================================================
void update_backlight(unsigned char backlight)
{
 726:	9f ef       	ldi	r25, 0xFF	; 255
 728:	89 9f       	mul	r24, r25
 72a:	c0 01       	movw	r24, r0
 72c:	11 24       	eor	r1, r1
 72e:	64 e6       	ldi	r22, 0x64	; 100
 730:	70 e0       	ldi	r23, 0x00	; 0
 732:	0e 94 d9 03 	call	0x7b2	; 0x7b2 <__udivmodhi4>
 736:	70 93 89 00 	sts	0x0089, r23
 73a:	60 93 88 00 	sts	0x0088, r22
     OCR1A = ((unsigned short)backlight * 255) / 100;
//     OCR2A = ((uword)backlight * 255) / 100;
//    OCR3A = ((uword)backlight * 255) / 100;
}
 73e:	08 95       	ret

00000740 <Initialize_contrast_backlight_and_LCD>:
//============================================================================
void Initialize_contrast_backlight_and_LCD()
{
 740:	ef 92       	push	r14
 742:	ff 92       	push	r15
 744:	0f 93       	push	r16
 746:	1f 93       	push	r17
	register unsigned char contrast;
	register unsigned char backlight;

    // copy the bitmap from flash to memory
	memcpy_P(display, boot_logo, sizeof(display));
 748:	0c ec       	ldi	r16, 0xCC	; 204
 74a:	10 e0       	ldi	r17, 0x00	; 0
 74c:	81 e0       	ldi	r24, 0x01	; 1
 74e:	e8 2e       	mov	r14, r24
 750:	82 e0       	ldi	r24, 0x02	; 2
 752:	f8 2e       	mov	r15, r24
 754:	40 e0       	ldi	r20, 0x00	; 0
 756:	54 e0       	ldi	r21, 0x04	; 4
 758:	b8 01       	movw	r22, r16
 75a:	c7 01       	movw	r24, r14
 75c:	0e 94 c9 03 	call	0x792	; 0x792 <memcpy_P>

	// Reset the LCD
	ResetLCD();
 760:	0e 94 35 03 	call	0x66a	; 0x66a <ResetLCD>

	//Start the timers.
	Initialize_And_Start_Timer_0_LCD_Contrast_PWM();
 764:	0e 94 51 03 	call	0x6a2	; 0x6a2 <Initialize_And_Start_Timer_0_LCD_Contrast_PWM>
	Initialize_And_Start_Timer_1_32_Hz_and_Backlight();
 768:	0e 94 5c 03 	call	0x6b8	; 0x6b8 <Initialize_And_Start_Timer_1_32_Hz_and_Backlight>

	// Initializes the LCD, also takes LCD out of reset
	InitializeLCD();
 76c:	0e 94 3b 03 	call	0x676	; 0x676 <InitializeLCD>

	// Copies from the array in flash to RAM
    memcpy_P(display, boot_logo, sizeof(display));
 770:	40 e0       	ldi	r20, 0x00	; 0
 772:	54 e0       	ldi	r21, 0x04	; 4
 774:	b8 01       	movw	r22, r16
 776:	c7 01       	movw	r24, r14
 778:	0e 94 c9 03 	call	0x792	; 0x792 <memcpy_P>
     PORTG = 0b11111111;
}
//============================================================================
void update_contrast(unsigned char contrast)
{
     OCR0A = ((unsigned short)contrast * 255) / 100;
 77c:	83 e3       	ldi	r24, 0x33	; 51
 77e:	87 bd       	out	0x27, r24	; 39
//     OCR0A = ((uword)contrast * 128) / 100;
}
//============================================================================
void update_backlight(unsigned char backlight)
{
     OCR1A = ((unsigned short)backlight * 255) / 100;
 780:	10 92 89 00 	sts	0x0089, r1
 784:	10 92 88 00 	sts	0x0088, r1
    contrast = 20;
    update_contrast(contrast);
    backlight = 0;
    update_backlight(backlight);

}
 788:	1f 91       	pop	r17
 78a:	0f 91       	pop	r16
 78c:	ff 90       	pop	r15
 78e:	ef 90       	pop	r14
 790:	08 95       	ret

00000792 <memcpy_P>:
 792:	fb 01       	movw	r30, r22
 794:	dc 01       	movw	r26, r24
 796:	02 c0       	rjmp	.+4      	; 0x79c <memcpy_P+0xa>
 798:	05 90       	lpm	r0, Z+
 79a:	0d 92       	st	X+, r0
 79c:	41 50       	subi	r20, 0x01	; 1
 79e:	50 40       	sbci	r21, 0x00	; 0
 7a0:	d8 f7       	brcc	.-10     	; 0x798 <memcpy_P+0x6>
 7a2:	08 95       	ret

000007a4 <memset>:
 7a4:	dc 01       	movw	r26, r24
 7a6:	01 c0       	rjmp	.+2      	; 0x7aa <memset+0x6>
 7a8:	6d 93       	st	X+, r22
 7aa:	41 50       	subi	r20, 0x01	; 1
 7ac:	50 40       	sbci	r21, 0x00	; 0
 7ae:	e0 f7       	brcc	.-8      	; 0x7a8 <memset+0x4>
 7b0:	08 95       	ret

000007b2 <__udivmodhi4>:
 7b2:	aa 1b       	sub	r26, r26
 7b4:	bb 1b       	sub	r27, r27
 7b6:	51 e1       	ldi	r21, 0x11	; 17
 7b8:	07 c0       	rjmp	.+14     	; 0x7c8 <__udivmodhi4_ep>

000007ba <__udivmodhi4_loop>:
 7ba:	aa 1f       	adc	r26, r26
 7bc:	bb 1f       	adc	r27, r27
 7be:	a6 17       	cp	r26, r22
 7c0:	b7 07       	cpc	r27, r23
 7c2:	10 f0       	brcs	.+4      	; 0x7c8 <__udivmodhi4_ep>
 7c4:	a6 1b       	sub	r26, r22
 7c6:	b7 0b       	sbc	r27, r23

000007c8 <__udivmodhi4_ep>:
 7c8:	88 1f       	adc	r24, r24
 7ca:	99 1f       	adc	r25, r25
 7cc:	5a 95       	dec	r21
 7ce:	a9 f7       	brne	.-22     	; 0x7ba <__udivmodhi4_loop>
 7d0:	80 95       	com	r24
 7d2:	90 95       	com	r25
 7d4:	bc 01       	movw	r22, r24
 7d6:	cd 01       	movw	r24, r26
 7d8:	08 95       	ret

000007da <_exit>:
 7da:	f8 94       	cli

000007dc <__stop_program>:
 7dc:	ff cf       	rjmp	.-2      	; 0x7dc <__stop_program>