ax88796.c

一个AVR 上的UIP移植程序

/*! \file ax88796.c \brief ASIX 88796 L Ethernet Interface Driver. */
//*****************************************************************************
//
// File Name	: 'ax88796.c'
// Title		: ASIX 88796 L Ethernet Interface Driver
// Author		: Pascal Stang
// Created		: 10/22/2002
// Revised		: 10/26/2002
// Version		: 0.1
// Target MCU	: Atmel AVR series
// Editor Tabs	: 4
//
//	Description : This include file is designed to contain items useful to all
//					code files and projects.
//
// Based in part on code by Louis Beaudoin (www.embedded-creations.com)
//
// This code is distributed under the GNU Public License
//		which can be found at http://www.gnu.org/licenses/gpl.txt
//
//*****************************************************************************

#include "global.h"
#include "rprintf.h"
#include "vt100.h"

#include "ax88796.h"

// pointers to locations in the ax88796 receive buffer
static unsigned char nextPage;
static unsigned int currentRetreiveAddress;

// offsets into ax88796 ethernet packet header
#define  enetpacketstatus     0x00
#define  nextblock_ptr        0x01
#define	 enetpacketLenL		  0x02
#define	 enetpacketLenH		  0x03


void ax88796Init(void)
{
	unsigned char tcrFduFlag;
	ax88796SetupPorts();
	
	// do a hard reset
	sbi(AX88796_RESET_PORT, AX88796_RESET_PIN);
	Delay_10ms(1);
	cbi(AX88796_RESET_PORT, AX88796_RESET_PIN);

	// do soft reset
	ax88796Write(ISR, ax88796Read(ISR));
	Delay_10ms(5);

	// wait for PHY to come out of reset
	ax88796Read(RSTPORT);
	while(ax88796Read(TR) & RST_B);
   
	ax88796WriteMii(0x10,0x00,0x0800);
	Delay_10ms(255);
	ax88796WriteMii(0x10,0x00,0x1200);

	ax88796Write(CR,(RD2|STOP));		// stop the NIC, abort DMA, page 0
	Delay_1ms(5);						// make sure nothing is coming in or going out
	ax88796Write(DCR,DCR_INIT);    
	ax88796Write(RBCR0,0x00);
	ax88796Write(RBCR1,0x00);
	ax88796Write(IMR,0x00);
	ax88796Write(ISR,0xFF);
	ax88796Write(RCR,0x20);
	ax88796Write(BNRY,RXSTART_INIT);
	ax88796Write(PSTART,RXSTART_INIT);
	ax88796Write(PSTOP,RXSTOP_INIT);
	
	// switch to page 1
	ax88796Write(CR,(PS0|RD2|STOP));
	// write mac address
	ax88796Write(PAR0+0, MYMAC_0);
	ax88796Write(PAR0+1, MYMAC_1);
	ax88796Write(PAR0+2, MYMAC_2);
	ax88796Write(PAR0+3, MYMAC_3);
	ax88796Write(PAR0+4, MYMAC_4);
	ax88796Write(PAR0+5, MYMAC_5);
	// set start point
	ax88796Write(CURR,RXSTART_INIT+1);

	ax88796Write(CR,(RD2|START));
	ax88796Write(RCR,RCR_INIT);

	if(ax88796Read(GPI) & I_SPD)		// check PHY speed setting
		tcrFduFlag = FDU;				// if 100base, do full duplex
	else
		tcrFduFlag = 0;					// if 10base, do half duplex
		
	ax88796Write(TCR,(tcrFduFlag|TCR_INIT));

	ax88796Write(GPOC,MPSEL);			// select media interface
  
	ax88796Write(TPSR,TXSTART_INIT);

	ax88796Write(CR,(RD2|STOP));
	ax88796Write(DCR,DCR_INIT);
	ax88796Write(CR,(RD2|START));
	ax88796Write(ISR,0xFF);
	ax88796Write(IMR,IMR_INIT);
	ax88796Write(TCR,(tcrFduFlag|TCR_INIT));

	//test
/*
	while(1)
	{
		vt100SetCursorPos(18,0);
		ax88796RegDump();
	}
*/
}


#if MEMORY_MAPPED_NIC == 1
#define ax88796Write(AX88796_REG,AX88796_DATA) do{ *(volatile unsigned char *) \
							(MEMORY_MAPPED_AX88796_OFFSET \
							+ (((unsigned char)(AX88796_REG)) << 8)) = \
							(unsigned char)(AX88796_DATA); } while(0)
#else
void ax88796Write(u08 address, u08 data)
{
	// assert the address
    outb(AX88796_ADDRESS_PORT, address | (inp(AX88796_ADDRESS_PORT)&~AX88796_ADDRESS_MASK));

	// set data bus as output and place data on bus
	outb(AX88796_DATA_DDR, 0xFF);
	outb(AX88796_DATA_PORT, data);
    
	// clock write pin
	cbi(AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN);
	asm volatile ("nop");
	sbi(AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN);
    
	// set data bus back to input with pullups enabled
	outb(AX88796_DATA_DDR, 0x00);
	outb(AX88796_DATA_PORT, 0xFF);
}
#endif

#if MEMORY_MAPPED_NIC == 1
#define ax88796Read(AX88796_ADDRESS) (*(volatile unsigned char *) \
                       (MEMORY_MAPPED_AX88796_OFFSET \
                       + (((unsigned char)(AX88796_ADDRESS)) << 8)) )
#else
u08 ax88796Read(u08 address)
{
	u08 byte;
   
	// assert the address
    outb(AX88796_ADDRESS_PORT, address | (inp(AX88796_ADDRESS_PORT)&~AX88796_ADDRESS_MASK));

	// assert read
	cbi(AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN);
	asm volatile ("nop");

	// read in the data
	byte = inb( AX88796_DATA_PIN );
	asm volatile ("nop");

	// negate read
	sbi(AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN) ;

	return byte;
}
#endif                       


void ax88796SetupPorts(void)
{
#if MEMORY_MAPPED_NIC == 1
  	// enable external SRAM interface - no wait states
  	sbi(MCUSR, SRE);
#else
	// set address port to output
	outb(AX88796_ADDRESS_DDR, AX88796_ADDRESS_MASK);
    
	// set data port to input with pull-ups
	outb(AX88796_DATA_DDR, 0x00);
	outb(AX88796_DATA_PORT, 0xFF);

	// initialize the control port read and write pins to de-asserted
	sbi( AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN );
	sbi( AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN );
	// set the read and write pins to output
	sbi( AX88796_CONTROL_DDR, AX88796_CONTROL_READPIN );
	sbi( AX88796_CONTROL_DDR, AX88796_CONTROL_WRITEPIN );
#endif
	// set reset pin to output
	sbi( AX88796_RESET_DDR, AX88796_RESET_PIN );
}


void ax88796BeginPacketSend(unsigned int packetLength)
{
	unsigned int sendPacketLength;
	sendPacketLength = (packetLength>=ETHERNET_MIN_PACKET_LENGTH) ?
	                 packetLength : ETHERNET_MIN_PACKET_LENGTH ;
	
	//start the NIC
	ax88796Write(CR,0x22);
	
	// still transmitting a packet - wait for it to finish
	while( ax88796Read(CR) & 0x04 );

	//load beginning page for transmit buffer
	ax88796Write(TPSR,TXSTART_INIT);
	
	//set start address for remote DMA operation
	ax88796Write(RSAR0,0x00);
	ax88796Write(RSAR1,0x40);
	
	//clear the packet stored interrupt
	ax88796Write(ISR, PTX);

	//load data byte count for remote DMA
	ax88796Write(RBCR0, (unsigned char)(packetLength));
	ax88796Write(RBCR1, (unsigned char)(packetLength>>8));

	ax88796Write(TBCR0, (unsigned char)(sendPacketLength));
	ax88796Write(TBCR1, (unsigned char)((sendPacketLength)>>8));
	
	//do remote write operation
	ax88796Write(CR,0x12);
}

void ax88796SendPacketData(unsigned char * localBuffer, unsigned int length)
{
	unsigned int i;
	
	for(i=0;i<length;i++)
		ax88796Write(RDMAPORT, localBuffer[i]);
}

void ax88796EndPacketSend(void)
{
	//send the contents of the transmit buffer onto the network
	ax88796Write(CR,0x24);
	
	// clear the remote DMA interrupt
	ax88796Write(ISR, RDC);
}


unsigned int ax88796BeginPacketRetreive(void)
{
	unsigned char writePagePtr;
	unsigned char readPagePtr;
	unsigned char bnryPagePtr;
	unsigned char i;
	
	unsigned char pageheader[4];
	unsigned int rxlen;
	
	// check for and handle an overflow
	ax88796ProcessInterrupt();
	
	// read CURR from page 1
	ax88796Write(CR,(PS0|RD2|START));
	writePagePtr = ax88796Read(CURR);
	// read the boundary register from page 0
	ax88796Write(CR,(RD2|START));
	bnryPagePtr = ax88796Read(BNRY);

	// first packet is at page bnryPtr+1
	readPagePtr = bnryPagePtr+1;
	if(readPagePtr >= RXSTOP_INIT) readPagePtr = RXSTART_INIT;
	
	// return if there is no packet in the buffer
	if( readPagePtr == writePagePtr )
	{
		return 0;
	}
	
	// clear the packet received interrupt flag
	ax88796Write(ISR, PRX);
	
	// if the boundary pointer is invalid,
	// reset the contents of the buffer and exit
	if( (bnryPagePtr < RXSTART_INIT) || (bnryPagePtr >= RXSTOP_INIT) )
	{
		ax88796Write(BNRY, RXSTART_INIT);
		ax88796Write(CR, (PS0|RD2|START));
		ax88796Write(CURR, RXSTART_INIT+1);
		ax88796Write(CR, (RD2|START));
		
		rprintf("B");
		return 0;
	}

	// initiate DMA to transfer the RTL8019 packet header
	ax88796Write(RBCR0, 4);
	ax88796Write(RBCR1, 0);
	ax88796Write(RSAR0, 0);
	ax88796Write(RSAR1, readPagePtr);
	ax88796Write(CR, (RD0|START));
	for(i=0;i<4;i++)
		pageheader[i] = ax88796Read(RDMAPORT);

	// end the DMA operation
    ax88796Write(CR, (RD2|START));
    for(i = 0; i <= 20; i++)
        if(ax88796Read(ISR) & RDC)
            break;
    ax88796Write(ISR, RDC);
	
	rxlen = (pageheader[enetpacketLenH]<<8) + pageheader[enetpacketLenL];
	nextPage = pageheader[nextblock_ptr] ;
	
	currentRetreiveAddress = (readPagePtr<<8) + 4;
	
	// if the nextPage pointer is invalid, the packet is not ready yet - exit
	if( (nextPage >= RXSTOP_INIT) || (nextPage < RXSTART_INIT) )
	{
		rprintf("N");
		rprintfu08(nextPage);
		return 0;
	}