config.h

44b0 vxwork5.5 bsp 支持基于flash 39VF3201的tffs驱动

/************************************************
 * modify 	: hugang [e-mail]			*
 * data		: 2004-05-05						*
 ************************************************/

/* config.h - WindRiver SBC ARM7TDMI configuration header */

/* Copyright 1984-2001 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01n,16jul02,m_h  C++ protection
01m,09may02,m_h  New rev for PHY changes
01l,19dec01,m_h  FLASH_CHIP_WIDTH needed for new version flash functions
01k,30nov01,m_h  increase ROM_SIZE for ROM resident images
01j,27sep01,m_h  bump revision for big endian support
01i,24aug01,m_h  SPR 69508, boot line
01h,23jul01,m_h  builds on UNIX
01g,17jul01,g_h  add support for visionWARE 2.00
01f,10jul01,g_h  add INCLUDE_LCD & INCLUDE_LED & INCLUDE_NETWORK macros
01e,06jun01,m_h  flash cache issues
01d,16may01,m_h  default baud now 9600
01c,01may01,m_h  bump revision to 10
01b,26apr01,m_h  convert tabs to spaces for readability
01a,12apr01,m_h  created from snds100 template.
*/

/*
This module contains the configuration parameters for the SBC ARM7TDMI BSP.
*/

#ifndef INCconfigh
#define INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

#undef SIM


/* BSP version/revision identification, before configAll.h */

#define BSP_VER_1_1    1    /* 1.2 is backward compatible with 1.1 */
#define BSP_VER_1_2    1
#define BSP_VERSION    "1.2"
#define BSP_REV        "/18"    /* BSP revision */

#include "configAll.h"

/* system clock rate */
#undef	SYS_CLK_RATE
#define	SYS_CLK_RATE	100

/*
 * STANDALONE_NET must be defined for network debug with
 * standalone vxWorks
 */
#undef STANDALONE_NET

/*
 * Define SERIAL_DEBUG to enable debugging
 * via the serial ports
 */
#define SERIAL_DEBUG

/*
 * If the FORCE_DEFAULT_BOOT_LINE is defined then the DEFAULT_BOOT_LINE
 * parameters are always used regardless of NVRAM values specified at
 * bootrom time. See target.nr for details. This is usually used to debug
 * downloaded images with out a bootrom present.
 */
/*modified by amine undef->define*/
#define FORCE_DEFAULT_BOOT_LINE

#ifdef INCLUDE_WDB_COMM_VTMD
#define FORCE_DEFAULT_BOOT_LINE /* When using TMD this macro should be undefined */
#endif /* INCLUDE_WDB_COMM_VTMD */

#ifdef FORCE_DEFAULT_BOOT_LINE
#undef INCLUDE_VWARE_LAUNCH
#else
#define INCLUDE_VWARE_LAUNCH
#endif /* FORCE_DEFAULT_BOOT_LINE */


#ifdef INCLUDE_VWARE_LAUNCH
  #define VWARE_BOOT_LINE       "ene(0,0) host:vxWorks " \
                                "%s " \
                                "%s " \
                                "%s " \
                                "u=target " \
                                "tn=targetname" 
#endif /* INCLUDE_VWARE_LAUNCH */

/* Memory configuration */

#undef  LOCAL_MEM_AUTOSIZE              /* run-time memory sizing */
/*#define LOCAL_MEM_SIZE       0x00800000 /* 8M */   
#define LOCAL_MEM_SIZE 0x01000000   /*16M*/
#define USER_RESERVED_MEM    0x0        /* see sysMemTop() */
#define DRAM_TYPE 1                     /* 1 - SDRAM, 0 - EDO DRAM */

/*
 * Boot ROM is an image written either to EPROM or to a Flash device.
 * If a Flash device is used, part of it can be reserved for boot
 * parameters etc. (see the Flash section below).
 *
 * The following parameters are defined here and in the Makefile.
 * They must be kept synchronized; effectively config.h depends on Makefile.
 * Any changes made here must be made in the Makefile and vice versa.
 *
 * ROM_BASE_ADRS is the base of the Flash ROM/EPROM.
 * ROM_TEXT_ADRS is the entry point of the VxWorks image
 * ROM_SIZE is the size of the part of the Flash ROM/EPROM allocated to
 *        the VxWorks image (block size - size of headers)
 *
 * Two other constants are used:
 * ROM_COPY_SIZE is the size of the part of the ROM to be copied into RAM
 *          (uncompressed bootrom)
 * ROM_SIZE_TOTAL is the size of the entire Flash ROM (used in sysPhysMemDesc)
 *
 * The values are given as literals here to make it easier to ensure
 * that they are the same as those in the Makefile.
 */

#define ROM_BASE_ADRS        0x00000000    /* base of Flash/EPROM 16 MB */
/*modified by amine 0x01000000->0x00000000*/
#define ROM_TEXT_ADRS        0x00000000    /* code start addr in ROM */
#define ROM_SIZE             0x00100000    /* size of ROM holding VxWorks 1024K*/
#define ROM_COPY_SIZE        ROM_SIZE
#define ROM_SIZE_TOTAL       0x00200000    /* total size of ROM 2MB */

#define RAM_LOW_ADRS         0x0C100000    /* VxWorks image entry point */
/*#define RAM_LOW_ADRS         0x0C000000*/
#define RAM_HIGH_ADRS        0x0C500000    /* RAM address for ROM boot */

/*
 * Flash memory configuration
 *
 * If a Flash memory part is fitted instead of an EPROM, part of it can
 * be used as NVRAM storage, if desired.  If this is wanted, define
 * INCLUDE_FLASH and reduce ROM_SIZE in this file and in Makefile by
 * NV_RAM_SIZE.  The default is not to provide support for Flash.
 */
/*modified by amine define->undef*/
#undef INCLUDE_FLASH

#ifdef INCLUDE_FLASH
#define FLASH_WIDTH           4
#define FLASH_CHIP_WIDTH      2
#define SYS_FLASH_TYPE        FLASH_29LV800    /* Specify 16 bit 29F part */
#define FLASH_SEGMENT_SIZE    0x2000           /* sector size at 0xFA000-0xFBFFF */
#define FLASH_ADRS            ((SBCARM7_FLASH_BASE + 0xFA000) | 0x4000000) /* non cacheable */
#define FLASH_SIZE            FLASH_SEGMENT_SIZE
#undef FLASH_NO_OVERLAY

#undef NV_RAM_ADRS
#undef NV_RAM_INTRVL
#undef NV_RAM_SIZE
#undef NV_BOOT_OFFSET
#define NV_RAM_ADRS           FLASH_ADRS
#define NV_RAM_INTRVL         1
#define NV_RAM_SIZE           FLASH_SEGMENT_SIZE
#define NV_BOOT_OFFSET        (FLASH_SEGMENT_SIZE - 0x200)

#else
#define NV_RAM_SIZE           NONE
#endif    /* INCLUDE_FLASH */

/* LCD support */
/*modified by amine define->undef*/
#undef INCLUDE_LCD

/* LED support */
/*modified by amine define->undef*/
#define INCLUDE_LED

#undef BSP_VTS

#ifdef BSP_VTS
#undef INCLUDE_PING
#undef INCLUDE_RLOGIN
#undef INCLUDE_SHOW_ROUTINES
#undef INCLUDE_NET_SYM_TABLE

#define INCLUDE_SHELL
#define INCLUDE_PING
#define INCLUDE_RLOGIN
#define INCLUDE_SHOW_ROUTINES
#define INCLUDE_NET_SYM_TABLE
#endif /*BSP_VTS*/

/* Serial port configuration */

#define INCLUDE_SERIAL
#undef    NUM_TTY
#define NUM_TTY               N_SIO_CHANNELS

#undef  CONSOLE_TTY
#define CONSOLE_TTY           0
#undef  CONSOLE_BAUD_RATE
#define CONSOLE_BAUD_RATE	  57600		 /* console baud rate */

#ifndef INCLUDE_TSFS_BOOT
#define INCLUDE_TSFS_BOOT
#endif /* TSFS */

/*** WDB ***/
/* WDB communicate configuration */
#ifdef INCLUDE_TSFS_BOOT

/* WDB self test include */
#undef  INCLUDE_WDB_TTY_TEST
#define INCLUDE_WDB_TTY_TEST

/* default TYCODRV_5_2 device name */
#undef  WDB_TTY_DEV_NAME
#define WDB_TTY_DEV_NAME      "/tyCo/1"
  
/* WDB COM PORT #2 */
#undef  WDB_TTY_CHANNEL
#define WDB_TTY_CHANNEL       1

/* WDB in Serial mode */
#undef  WDB_COMM_TYPE
#define WDB_COMM_TYPE         WDB_COMM_SERIAL

/* Baud rate for WDB Connection */
#undef  WDB_TTY_BAUD
#define WDB_TTY_BAUD          57600

#undef WDB_MODE        	/* WDB_MODE_[DUAL|TASK|EXTERN] */
#define WDB_MODE      WDB_MODE_DUAL

/* BOOT from TSFS */
#define INCLUDE_TSFS_BOOT
#define INCLUDE_WDB_TSFS
#define INCLUDE_WDB

#undef  DEFAULT_BOOT_LINE
#define DEFAULT_BOOT_LINE    "ene(0,0) hgxxx:vxWorks " \
							 "h=192.168.111.36 " \
							 "e=192.168.111.11:ffffff00 " \
							 "u=target " \
							 "pw=ok " \
							 "tn=44b0"
#endif


/*
 * Cache configuration
 *
 * Note that when MMU is enabled, cache modes are controlled by
 * the MMU table entries in sysPhysMemDesc[], not the cache mode
 * macros defined here.
 */

/* De-select unused (default) network drivers selected in configAll.h */

#undef    INCLUDE_ENP           /* include CMC Ethernet interface*/
#undef    INCLUDE_EX            /* include Excelan Ethernet interface */
#undef    INCLUDE_SM_NET        /* include backplane net interface */
#undef    INCLUDE_SM_SEQ_ADDR   /* shared memory network auto address setup */



/* Enhanced Network Driver (END) Support */
#define INCLUDE_NETWORK
#ifdef INCLUDE_NETWORK
	#define INCLUDE_UDP
	#define INCLUDE_TCP
	#define INCLUDE_ICMP
	#define INCLUDE_IGMP
	#undef INCLUDE_PPP
#endif

#define INCLUDE_END
#undef END_OVERRIDE /* define if you are using old boot ROMs. */
#ifdef INCLUDE_END
	#define INCLUDE_SNG44BSP_END /* Include Ethernet driver */
#endif /* INCLUDE_END */

#ifdef INCLUDE_SHELL
#define INCLUDE_SYM_TABLE
#define INCLUDE_STANDALONE_SYM_TABLE
#define INCLUDE_LOADER
#define INCLUDE_UNLOADER
#define INCLUDE_SYM_TBL_SYNC 
#define INCLUDE_NET_SHOW
#endif /* INCLUDE_SHELL */

/*
 * Interrupt mode - interrupts can be in either preemptive or non-preemptive
 * mode.  For non-preemptive mode, change INT_MODE to INT_NON_PREEMPT_MODEL
 */
#define INT_MODE    INT_NON_PREEMPT_MODEL

/*
 * miscellaneous definitions
 * Note: ISR_STACK_SIZE is defined here rather than in ../all/configAll.h
 * (as is more usual) because the stack size depends on the interrupt
 * structure of the BSP.
 */

#define ISR_STACK_SIZE    0x800    /* size of ISR stack, in bytes */

/* Optional timestamp support */
#define    INCLUDE_TIMESTAMP

#undef INCLUDE_WINDVIEW
#undef INCLUDE_INSTRUMENTATION

#define INCLUDE_DOSFS
#define INCLUDE_RAMDRV

/* Optional TrueFFS support */

#define    INCLUDE_TFFS        /* to include TrueFFS driver */

#ifdef INCLUDE_TFFS
#define INCLUDE_SHOW_ROUTINES
#define INCLUDE_DOSFS
#endif /* INCLUDE_TFFS */

/*
 * There isn't MMU support in this BSP, this macro is to
 * force the MMU to be disable.
 */

#undef INCLUDE_MMU_BASIC
#undef INCLUDE_MMU_FULL
#undef INCLUDE_MMU_MPU

/*
 * For cache support define this macro
 */
 /*modified by amine define->undef*/
#undef INCLUDE_CACHE_SUPPORT
#ifdef  INCLUDE_CACHE_SUPPORT
#define USER_I_CACHE_ENABLE
#undef  USER_I_CACHE_MODE
#define USER_I_CACHE_MODE        CACHE_WRITETHROUGH
#define USER_D_CACHE_ENABLE
#undef  USER_D_CACHE_MODE
#define  USER_D_CACHE_MODE		 CACHE_WRITETHROUGH
/*#define USER_D_CACHE_MODE        CACHE_DISABLED*/
#endif /* INCLUDE_CACHE_SUPPORT */

#include "wrSbcArm7.h"

#ifdef __cplusplus
}
#endif

#endif /* INCconfigh */
#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif