sngks32csio.h

44b0 vxwork5.5 bsp 支持基于flash 39VF3201的tffs驱动

/************************************************
 * modify 	: hugang [e-mail]			*
 * data		: 2004-05-03						*
 ************************************************/

/* sngks32cSio.h - header file for Samsung KS32C serial driver */

/* Copyright 1984-2001 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01c,16jul02,m_h  C++ protection
01b,26apr01,m_h  convert tabs to spaces for readability
01a,12apr01,m_h  created from snds100 template.
*/

#ifndef __INCsngks32cSioh
#define __INCsngks32cSioh

#ifdef __cplusplus
extern "C" {
#endif

#include "sioLib.h"
#include "sngks32c.h"

#define MCLK  24000000
/* Register offsets from Base Address*/

#define S3C44B0X_ULCON         0x0000        /*UART Line Control Registers*/
#define S3C44B0X_UCON          0x0004        /*UART Control Register */
#define S3C44B0X_UFCON         0x0008
#define S3C44B0X_UMCON         0x000C
#define S3C44B0X_UTRSTAT       0x0010        /*UART Status Register */
#define S3C44B0X_UERSTAT       0x0014 
#define S3C44B0X_UFSTAT        0x0018 
#define S3C44B0X_UMSTAT        0x001C 
#define S3C44B0X_UTXH          0x0020 
#define S3C44B0X_URXH          0x0024 
#define S3C44B0X_UBRDIV        0x0028 


/* Bit definitions within ULCON0/1 Line Control Register*/

#define PARITY_NONE     0x00            /* Set No Parity*/
#define PARITY_ODD      0x20            /* Set Odd Parity*/
#define PARITY_EVEN     0x28            /* Set Even Parity*/
#define ONE_STOP        0x00            /* One Stop Bit*/
#define WORD_LEN        0x03            /* Set Word Length 8*/

/* Bit definitions within UCON0/1 Control Register*/

#define UCON_RX          0x01            /* Receive Mode -Interrupt*/
#define UCON_TX          0x04            /* Transmit Mode-Interrupt*/
#define UCON_RX_TX_RESET 0x3f0            /* Rx and Tx Reset */
#define UCON_BREAK       0x10            /* Set Break*/

#define UCON_STAT_EN     0x04            /* Status Interrrupt -Enable*/
#define UCON_TX_DIS      0x01            /* Transmit Interrupt -Disable*/
#define UCON_DSR         0x20            /* Data Set Ready -Enable*/

/* Bit definitions within USTAT0/1 Status Register*/


#define UTRSTAT_TX_READY  0x02            /* Transmitter Ready for another char */
#define UTRSTAT_RX_READY  0x01            /* Receive Data Buffer*/



/* device and channel structures */

typedef struct
    {
    /* must be first */

    SIO_CHAN        sio;        /* standard SIO_CHAN element */

    /* callbacks */

    STATUS            (*getTxChar) ();
    STATUS            (*putRcvChar) ();
    void *            getTxArg;
    void *            putRcvArg;

    /* register addresses */

    UINT32 *          regs;        /*UART Registers*/

    /*  interrupts */
    UINT8             intLevelRx;     /* recv interrupt Level for this device*/
    UINT8             intLevelTx;     /* transmit interrupt Level for this device*/
  

    /* misc */
    UINT32            regDelta;       /* register address spacing */
    uint_t            options;        /* Hardware options */
    int               mode;           /* current mode (interrupt or poll) */
    int               baudRate;       /* input clock frequency */

    } SNGKS32C_CHAN;

/* function prototypes */

#if defined(__STDC__)

extern void    sngks32cDevInit  (SNGKS32C_CHAN *pChan); 
extern void    sngks32cDevInit2 (SNGKS32C_CHAN *pChan); 
extern void    sngks32cIntRcv   (SNGKS32C_CHAN *pChan);
extern void    sngks32cIntTx    (SNGKS32C_CHAN *pChan);

#else   /* __STDC__ */

extern void    sngks32cDevInit  ();
extern void    sngks32cDevInit2 ();
extern void    sngks32cIntRcv   ();
extern void    sngks32cIntTx    ();


#endif  /* __STDC__ */

#ifdef __cplusplus
}
#endif

#endif  /* __INCsngks32cSioh */