flash.c

freescla hcs08 flash 读写

#include <hidef.h> /* for EnableInterrupts macro */
//#include <stdio.h> /* for memcpy() */
#include "derivative.h" /* include peripheral declarations */
#include "Flash.h"

extern void SendData(int Data);

const unsigned char __NVPROT @ 0xFFBD = HCS08_FLASH_PROTECTION;
void WaitFlashEnd(void)
{
  	FSTAT = FSTAT | 0x80;                //Put FCBEF at 1.
  	_asm NOP;                            //Wait 4 cycles
  	_asm NOP;
  	_asm NOP;
  	_asm NOP;
//   	if (FSTAT&0x30){                     //check to see if FACCERR or FVIOL are set
//   		return 0xFF;                     //if so, error.
//   	}
  	while ((FSTAT&0x40)==0) ;          //else wait for command to comple
}  
typedef void (*Wait_FlashEnd)(void);
void ParaSave(uint8 Flag)
{
	uint8 RAM_CODE[20];
	uint8 i;
	volatile uint8 *ArmAdd;
	volatile uint8 *SourAdd;

	memcpy_my(RAM_CODE,(uint8 *)WaitFlashEnd,20);
	DisableInterrupts;

	__RESET_WATCHDOG();/*----喂狗----*/
	if (FSTAT&0x10) FSTAT = FSTAT | 0x10;                // if FACCERR is set write a 1 to FACCERR to clear
	if ( Flag==0 )	{
		i=sizeof(PARASTRU);
		ArmAdd=(volatile uint8 *)FLASH_HADDR;
		SourAdd=(volatile uint8 *)&ParaData;
		(*((volatile uint8 *)(FLASH_HADDR)))=0xFF;
	}
	else {
		i=ADNUM*2;
		ArmAdd=(volatile uint8 *)POWEROFFSAVEADDR;
		SourAdd=(volatile uint8 *)ADResoult;
		(*((volatile uint8 *)(POWEROFFSAVEADDR)))=0xFF;
	}
	FCMD=0x40;
	((Wait_FlashEnd)(RAM_CODE))();
	
	while(i--) {
		__RESET_WATCHDOG();/*----喂狗----*/
		if (FSTAT&0x10) FSTAT = FSTAT | 0x10;                // if FACCERR is set write a 1 to FACCERR to clear
		*(ArmAdd++)=*(SourAdd++);
		FCMD=0x20;
		((Wait_FlashEnd)(RAM_CODE))();
	}

	EnableInterrupts;
	for (i=0;i<sizeof(PARASTRU);i++) {
		if (*(((volatile uint8 *)&ParaData)+i)!=(*((volatile uint8 *)(FLASH_HADDR+i))) ) WDDirFlag=0;
	}
	if ( Flag ) {
		uint16 Temp=0xFFFF;
		while (Temp--) {
			for (i=0;i<20;i++) ;
			__RESET_WATCHDOG();/*----喂狗----*/
		}
	}
}