lan91c111_init.c

This driver was developed to ARM SMSC LAN91C11 (PXA CPU)

	USHORT      TempStore;
    ULONG        IOBase;
	USHORT      ChipInfo;
    	
	PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111:==> Adapter Verify \r\n")));
	IOBase = Adapter->IOBase;

	//Check for the correct bank select
	PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111:A.IO  0x%8lx!\r\n"),Adapter->IOBase));
	PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111:IO    0x%8lx!\r\n"),IOBase));
	NdisRawReadPortUshort( IOBase + BANK_SELECT, (USHORT *) &TempStore );
    if((TempStore & BANK_ID_MASK) != BANK_UPPER)
    {
        PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111:ERROR : Invalid BankSelect Constant===0x%lx!\r\n"),IOBase));
		return(FALSE);
    }
	
	//Store the current Config register value
    NdisRawWritePortUshort(IOBase + BANK_SELECT,(USHORT) 1);	
	NdisRawReadPortUshort(IOBase + BANK1_CONFIG,(PUSHORT) &Adapter->ConfigReg);

	//Get Chip ID and Revision.
    NdisRawWritePortUshort(IOBase + BANK_SELECT,(USHORT) 3);
	NdisRawReadPortUshort(IOBase + BANK3_REV,(USHORT *) &ChipInfo);
	Adapter->ChipID = (ChipInfo & REV_CHIP_ID) >> 4;
	Adapter->ChipRev = ChipInfo & REV_REV_ID;
    if (Adapter->ChipID != LAN91C111_CHIPID)
	{
		PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111: ERROR : Invalid LAN Chip and Driver Combination \r\n")));
		PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111:<== Adapter Verify \r\n")));
		return (FALSE);
	}

	//Set the NO_WAIT in Bank1/Offset0
	NdisRawWritePortUshort( Adapter->IOBase + BANK_SELECT, (USHORT) 1 );
	//Adapter->ConfigReg |= CFG_NO_WAIT; 
	NdisRawWritePortUshort( Adapter->IOBase +  BANK1_CONFIG, Adapter->ConfigReg);

	PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111:<== Adapter Verify - OK\r\n")));
	return TRUE;	
}


/*
 Function Name : 	AdapterReset
 Description   :
                    Issues a soft reset to the chip. And re-initializes the adapter structure variables.
                        Also re-establishes the link.
 Parameters    :
                    MINIPORT_ADAPTER *Adapter - Pointer to the adapter structure
 Return Value  :
                    TRUE    - Reset is successful 
                        else FALSE

*/

BOOLEAN     AdapterReset(MINIPORT_ADAPTER *Adapter)
{

	UINT        Counter;
	ULONG		IOBase;

	RETAILMSG(1,(TEXT("RESET\r\n")));
	PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111:==> Adapter Reset %x\r\n"), Adapter->IOBase));
	IOBase = Adapter->IOBase;

	//Clear the card's interrupt mask register
    NdisRawWritePortUshort( IOBase+BANK_SELECT, 2 );
    NdisRawWritePortUshort( IOBase + BANK2_INT_STS, (USHORT)0 );

	Adapter->State = RESET_STATE;

	//Output reset to the card.
    NdisRawWritePortUshort( IOBase+BANK_SELECT, 0 );
    NdisRawWritePortUshort( IOBase + BANK0_RCR, (USHORT) RCR_RESET );
	NdisStallExecution(1);  //Initiated by writing bit hight and terminated by writing low.
	NdisRawWritePortUshort( IOBase + BANK0_RCR, (USHORT) 0);

	//Write to the Configuration register
	Adapter->ConfigReg = 0xA0B1;
	NdisRawWritePortUshort(IOBase + BANK_SELECT,(USHORT) 1);
    NdisRawWritePortUshort(IOBase + BANK1_CONFIG, Adapter->ConfigReg);

	//Restore Multicast Hash Table.
    NdisRawWritePortUshort(IOBase + BANK_SELECT, (USHORT) 3 );
 	for(Counter = 0;Counter < 8;Counter += 2)
		NdisRawWritePortUshort(IOBase + BANK3_MT01 + Counter, *(&Adapter->HashTable[Counter]));

	// Output control register.
    NdisRawWritePortUshort( IOBase + BANK_SELECT, (USHORT) 1 );
	Adapter->CtrlRegister = 0x1210 | CTL_LE_EN | CTL_CR_EN | CTL_TE_EN;
#ifdef  SMSC_AUTO_RELEASE
	Adapter->CtrlRegister |= CTL_AUTO;
#endif
	NdisRawWritePortUshort(IOBase + BANK1_CTL, Adapter->CtrlRegister);

	//Setup Receive control Register
	Adapter->RCVAllMulticast = TRUE;
	Adapter->RCVBroadcast = TRUE;
	Adapter->PromiscuousMode = FALSE;
	Adapter->RCR = RCR_RX_EN;
	Adapter->RCR |= RCR_STRP_CRC;
	NdisRawWritePortUshort( IOBase + BANK_SELECT, (USHORT) 0);
	NdisRawWritePortUshort(IOBase + BANK0_RCR, Adapter->RCR);


	//Clear all the statistic counter
	Adapter->Stat_RxError		=
		Adapter->Stat_RxOK		=
		Adapter->Stat_RxOvrn	=
		Adapter->Stat_TxError	=
		Adapter->Stat_TxOK		= 
		Adapter->Stat_AlignError =
		Adapter->Stat_MultiColl = 
		Adapter->Stat_SingleColl = 0;

    //Initialize Queues.
    ClearPacketQue(Adapter->AckPending);
	ClearPacketQue(Adapter->AllocPending);
	Adapter->AllocIntPending = FALSE;

	//Wait for the power-on reset to cool down
	Sleep(35);

	//Establish the Link
	EstablishLink(Adapter);

	//Setup Transmit Control Register
	Adapter->TCR = (USHORT)(TCR_TX_ENA | TCR_PAD_EN | TCR_MON_CSN);
	if (Adapter->Duplex == FULL_DUPLEX)
		Adapter->TCR |= TCR_SWFDUP;
	else
		Adapter->TCR &= (~TCR_SWFDUP);
	NdisRawWritePortUshort(IOBase+BANK_SELECT, (USHORT) 0);
	NdisRawWritePortUshort( IOBase + BANK0_TCR, Adapter->TCR);

	Adapter->State = NORMAL_STATE;

	PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111:<== Adapter Reset %x\r\n"), Adapter->IOBase));
	return TRUE;
}

/*
 Function Name : 	BackOut				
 Description   :    
                    Called when the driver is unloaded. This releases all the OS resources
                     used by the chip and the driver.
 Parameters    :
                    MINIPORT_ADAPTER *Adapter
 Return Value  :
                    VOID
*/

void        BackOut				(MINIPORT_ADAPTER *Adapter)
{
	ULONG		IOBase; 
	PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111==> BackOut\r\n")));
	PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111==> Releasing all LAN91C111 resources\r\n")));
	
    IOBase = Adapter->IOBase;

	//Release the TX buffer
	NdisFreeMemory(Adapter->TxBuffer, LOOK_AHEAD_BUFFER_SIZE,  0);

	//De-Register the IRQ
	if (Adapter->IsInterruptSet)
		NdisMDeregisterInterrupt(&Adapter->InterruptInfo);

	//Release the Lookahead buffer
	if (Adapter->LookAheadBuffer)
		NdisFreeMemory(Adapter->LookAheadBuffer, LOOK_AHEAD_BUFFER_SIZE,  0);

	if (Adapter->IsPortRegistered)
		NdisMDeregisterIoPortRange(Adapter->AdapterHandle,IOBase,16, (PVOID)IOBase);
    
	//Release the adapter structure.
    NdisFreeMemory(Adapter, MINIPORT_ADAPTER_SIZE, 0);
	PrintDebugMsg(ZONE_INIT, (TEXT("LAN91C111<== BackOut\r\n")));
    return;
}



/*
 Function Name : 	DumpRegisters
 Description   :
                    This function is used for debugging. This dumps the contents of the all 
                      the registers in the chip. This doesn't maintain the bank select status
                      This might affect some register values, which are sensitive to read.
 Parameters    :
                    MINIPORT_ADAPTER    *Adapter - Pointer to the adapter structure

 Return Value  :
                    VOID
*/


VOID		DumpRegisters		(MINIPORT_ADAPTER *Adapter)
{
	USHORT		Bank, 
		Offset;
	USHORT		Value;
	ULONG		IOBase = Adapter->IOBase;	
	
	for (Bank=0; Bank <=3; Bank++)  //Cycle the banks
	{
		NdisRawWritePortUshort(IOBase + BANK_SELECT,Bank);
		for (Offset=0; Offset <= 0xE; Offset+=2)    //cycle the registers
		{
			NdisRawReadPortUshort(IOBase+Offset,(PUSHORT)&Value);
			RETAILMSG(ZONE_INIT, (TEXT("(%x,%x)=%4X\r\n"), Bank, Offset, Value));
		}
	}
}



/*
 Function Name : 	DumpBuffer
 Description   :    
                    This function dumps the contents of a buffer specified by the Buffer parameter of size Size.
                    This useful when it's required to dump the Tx/Rx packet buffers.
 Parameters    :
                    UCHAR *Buffer   - Pointer to the buffer to dump
                    INT     Size    - No. bytes to dump
 Return Value  :
                    VOID
*/

VOID DumpBuffer (UCHAR *Buffer, INT Size)
{
	int i;
	PrintDebugMsg(ZONE_INIT, (TEXT("\t\t\tDumping Packet, Size=%d\r\n"), Size));	
	for (i=0; i<Size; i++)
	{
		if ((Size % 16) == 0) 
			PrintDebugMsg(ZONE_INIT, (TEXT("\r\n")));
		PrintDebugMsg(ZONE_INIT, (TEXT("%02x "), Buffer[i]));	
	}
	PrintDebugMsg(ZONE_INIT, (TEXT("\r\n")));
}


/*
 The following three functions, nCtrlPulse/nCtrlLow/nCtrlHigh can be used to toggle the nCtrl pin on
 LAN91C111 for GPIO functions.

  ========================== WARNING =================================
   NOTE THE BANK SELECT IS CHANGED TO 2nd BANK ALWAYS. 
   
   This should  be changed as required.
   ===================================================================
*/
__inline void nCtrlPulse(MINIPORT_ADAPTER *Adapter) 
{
	USHORT temp;
	NdisRawWritePortUshort(Adapter->IOBase + BANK_SELECT, (USHORT)1);
	NdisRawReadPortUshort(Adapter->IOBase + BANK1_CONFIG, &temp);
	temp |= CFG_GPCNTRL;
	NdisRawWritePortUshort(Adapter->IOBase + BANK1_CONFIG, temp);
	temp &= ~CFG_GPCNTRL;
	NdisRawWritePortUshort(Adapter->IOBase + BANK1_CONFIG, temp);
	NdisRawWritePortUshort(Adapter->IOBase + BANK_SELECT, (USHORT)2);
};

__inline void nCtrlLow(MINIPORT_ADAPTER *Adapter) 
{
	USHORT temp;
	NdisRawWritePortUshort(Adapter->IOBase + BANK_SELECT, (USHORT)1);
	NdisRawReadPortUshort(Adapter->IOBase + BANK1_CONFIG, &temp);
	temp |= CFG_GPCNTRL;
	NdisRawWritePortUshort(Adapter->IOBase + BANK1_CONFIG, temp);
	NdisRawWritePortUshort(Adapter->IOBase + BANK_SELECT, (USHORT)2);
};

__inline void nCtrlHigh(MINIPORT_ADAPTER *Adapter) 
{
	USHORT temp;
	NdisRawWritePortUshort(Adapter->IOBase + BANK_SELECT, (USHORT)1);
	NdisRawReadPortUshort(Adapter->IOBase + BANK1_CONFIG, &temp);
	temp &= ~CFG_GPCNTRL;
	NdisRawWritePortUshort(Adapter->IOBase + BANK1_CONFIG, temp);
	NdisRawWritePortUshort(Adapter->IOBase + BANK_SELECT, (USHORT)2);
};