psocgpioint.h

利用psoc进行usb及capsense的程序编写

BYTE			VR1_IntEn_ADDR;
#define VR1_MASK 0x40
#pragma	ioport	VR1_MUXBusCtrl_ADDR:	0x1db
BYTE			VR1_MUXBusCtrl_ADDR;
// VR2 address and mask defines
#pragma	ioport	VR2_Data_ADDR:	0xc
BYTE			VR2_Data_ADDR;
#pragma	ioport	VR2_DriveMode_0_ADDR:	0x10c
BYTE			VR2_DriveMode_0_ADDR;
#pragma	ioport	VR2_DriveMode_1_ADDR:	0x10d
BYTE			VR2_DriveMode_1_ADDR;
#pragma	ioport	VR2_DriveMode_2_ADDR:	0xf
BYTE			VR2_DriveMode_2_ADDR;
#pragma	ioport	VR2_GlobalSelect_ADDR:	0xe
BYTE			VR2_GlobalSelect_ADDR;
#pragma	ioport	VR2_IntCtrl_0_ADDR:	0x10e
BYTE			VR2_IntCtrl_0_ADDR;
#pragma	ioport	VR2_IntCtrl_1_ADDR:	0x10f
BYTE			VR2_IntCtrl_1_ADDR;
#pragma	ioport	VR2_IntEn_ADDR:	0xd
BYTE			VR2_IntEn_ADDR;
#define VR2_MASK 0x80
#pragma	ioport	VR2_MUXBusCtrl_ADDR:	0x1db
BYTE			VR2_MUXBusCtrl_ADDR;
// LCDD4 address and mask defines
#pragma	ioport	LCDD4_Data_ADDR:	0x10
BYTE			LCDD4_Data_ADDR;
#pragma	ioport	LCDD4_DriveMode_0_ADDR:	0x110
BYTE			LCDD4_DriveMode_0_ADDR;
#pragma	ioport	LCDD4_DriveMode_1_ADDR:	0x111
BYTE			LCDD4_DriveMode_1_ADDR;
#pragma	ioport	LCDD4_DriveMode_2_ADDR:	0x13
BYTE			LCDD4_DriveMode_2_ADDR;
#pragma	ioport	LCDD4_GlobalSelect_ADDR:	0x12
BYTE			LCDD4_GlobalSelect_ADDR;
#pragma	ioport	LCDD4_IntCtrl_0_ADDR:	0x112
BYTE			LCDD4_IntCtrl_0_ADDR;
#pragma	ioport	LCDD4_IntCtrl_1_ADDR:	0x113
BYTE			LCDD4_IntCtrl_1_ADDR;
#pragma	ioport	LCDD4_IntEn_ADDR:	0x11
BYTE			LCDD4_IntEn_ADDR;
#define LCDD4_MASK 0x1
#pragma	ioport	LCDD4_MUXBusCtrl_ADDR:	0x1ec
BYTE			LCDD4_MUXBusCtrl_ADDR;
// LCDD4 Shadow defines
//   LCDD4_DataShadow define
extern BYTE Port_4_Data_SHADE;
#define LCDD4_DataShadow (*(unsigned char*)&Port_4_Data_SHADE)
//   LCDD4_DriveMode_0Shadow define
extern BYTE Port_4_DriveMode_0_SHADE;
#define LCDD4_DriveMode_0Shadow (*(unsigned char*)&Port_4_DriveMode_0_SHADE)
//   LCDD4_DriveMode_1Shadow define
extern BYTE Port_4_DriveMode_1_SHADE;
#define LCDD4_DriveMode_1Shadow (*(unsigned char*)&Port_4_DriveMode_1_SHADE)
// LCDD5 address and mask defines
#pragma	ioport	LCDD5_Data_ADDR:	0x10
BYTE			LCDD5_Data_ADDR;
#pragma	ioport	LCDD5_DriveMode_0_ADDR:	0x110
BYTE			LCDD5_DriveMode_0_ADDR;
#pragma	ioport	LCDD5_DriveMode_1_ADDR:	0x111
BYTE			LCDD5_DriveMode_1_ADDR;
#pragma	ioport	LCDD5_DriveMode_2_ADDR:	0x13
BYTE			LCDD5_DriveMode_2_ADDR;
#pragma	ioport	LCDD5_GlobalSelect_ADDR:	0x12
BYTE			LCDD5_GlobalSelect_ADDR;
#pragma	ioport	LCDD5_IntCtrl_0_ADDR:	0x112
BYTE			LCDD5_IntCtrl_0_ADDR;
#pragma	ioport	LCDD5_IntCtrl_1_ADDR:	0x113
BYTE			LCDD5_IntCtrl_1_ADDR;
#pragma	ioport	LCDD5_IntEn_ADDR:	0x11
BYTE			LCDD5_IntEn_ADDR;
#define LCDD5_MASK 0x2
#pragma	ioport	LCDD5_MUXBusCtrl_ADDR:	0x1ec
BYTE			LCDD5_MUXBusCtrl_ADDR;
// LCDD5 Shadow defines
//   LCDD5_DataShadow define
extern BYTE Port_4_Data_SHADE;
#define LCDD5_DataShadow (*(unsigned char*)&Port_4_Data_SHADE)
//   LCDD5_DriveMode_0Shadow define
extern BYTE Port_4_DriveMode_0_SHADE;
#define LCDD5_DriveMode_0Shadow (*(unsigned char*)&Port_4_DriveMode_0_SHADE)
//   LCDD5_DriveMode_1Shadow define
extern BYTE Port_4_DriveMode_1_SHADE;
#define LCDD5_DriveMode_1Shadow (*(unsigned char*)&Port_4_DriveMode_1_SHADE)
// LCDD6 address and mask defines
#pragma	ioport	LCDD6_Data_ADDR:	0x10
BYTE			LCDD6_Data_ADDR;
#pragma	ioport	LCDD6_DriveMode_0_ADDR:	0x110
BYTE			LCDD6_DriveMode_0_ADDR;
#pragma	ioport	LCDD6_DriveMode_1_ADDR:	0x111
BYTE			LCDD6_DriveMode_1_ADDR;
#pragma	ioport	LCDD6_DriveMode_2_ADDR:	0x13
BYTE			LCDD6_DriveMode_2_ADDR;
#pragma	ioport	LCDD6_GlobalSelect_ADDR:	0x12
BYTE			LCDD6_GlobalSelect_ADDR;
#pragma	ioport	LCDD6_IntCtrl_0_ADDR:	0x112
BYTE			LCDD6_IntCtrl_0_ADDR;
#pragma	ioport	LCDD6_IntCtrl_1_ADDR:	0x113
BYTE			LCDD6_IntCtrl_1_ADDR;
#pragma	ioport	LCDD6_IntEn_ADDR:	0x11
BYTE			LCDD6_IntEn_ADDR;
#define LCDD6_MASK 0x4
#pragma	ioport	LCDD6_MUXBusCtrl_ADDR:	0x1ec
BYTE			LCDD6_MUXBusCtrl_ADDR;
// LCDD6 Shadow defines
//   LCDD6_DataShadow define
extern BYTE Port_4_Data_SHADE;
#define LCDD6_DataShadow (*(unsigned char*)&Port_4_Data_SHADE)
//   LCDD6_DriveMode_0Shadow define
extern BYTE Port_4_DriveMode_0_SHADE;
#define LCDD6_DriveMode_0Shadow (*(unsigned char*)&Port_4_DriveMode_0_SHADE)
//   LCDD6_DriveMode_1Shadow define
extern BYTE Port_4_DriveMode_1_SHADE;
#define LCDD6_DriveMode_1Shadow (*(unsigned char*)&Port_4_DriveMode_1_SHADE)
// LCDD7 address and mask defines
#pragma	ioport	LCDD7_Data_ADDR:	0x10
BYTE			LCDD7_Data_ADDR;
#pragma	ioport	LCDD7_DriveMode_0_ADDR:	0x110
BYTE			LCDD7_DriveMode_0_ADDR;
#pragma	ioport	LCDD7_DriveMode_1_ADDR:	0x111
BYTE			LCDD7_DriveMode_1_ADDR;
#pragma	ioport	LCDD7_DriveMode_2_ADDR:	0x13
BYTE			LCDD7_DriveMode_2_ADDR;
#pragma	ioport	LCDD7_GlobalSelect_ADDR:	0x12
BYTE			LCDD7_GlobalSelect_ADDR;
#pragma	ioport	LCDD7_IntCtrl_0_ADDR:	0x112
BYTE			LCDD7_IntCtrl_0_ADDR;
#pragma	ioport	LCDD7_IntCtrl_1_ADDR:	0x113
BYTE			LCDD7_IntCtrl_1_ADDR;
#pragma	ioport	LCDD7_IntEn_ADDR:	0x11
BYTE			LCDD7_IntEn_ADDR;
#define LCDD7_MASK 0x8
#pragma	ioport	LCDD7_MUXBusCtrl_ADDR:	0x1ec
BYTE			LCDD7_MUXBusCtrl_ADDR;
// LCDD7 Shadow defines
//   LCDD7_DataShadow define
extern BYTE Port_4_Data_SHADE;
#define LCDD7_DataShadow (*(unsigned char*)&Port_4_Data_SHADE)
//   LCDD7_DriveMode_0Shadow define
extern BYTE Port_4_DriveMode_0_SHADE;
#define LCDD7_DriveMode_0Shadow (*(unsigned char*)&Port_4_DriveMode_0_SHADE)
//   LCDD7_DriveMode_1Shadow define
extern BYTE Port_4_DriveMode_1_SHADE;
#define LCDD7_DriveMode_1Shadow (*(unsigned char*)&Port_4_DriveMode_1_SHADE)
// LCDE address and mask defines
#pragma	ioport	LCDE_Data_ADDR:	0x10
BYTE			LCDE_Data_ADDR;
#pragma	ioport	LCDE_DriveMode_0_ADDR:	0x110
BYTE			LCDE_DriveMode_0_ADDR;
#pragma	ioport	LCDE_DriveMode_1_ADDR:	0x111
BYTE			LCDE_DriveMode_1_ADDR;
#pragma	ioport	LCDE_DriveMode_2_ADDR:	0x13
BYTE			LCDE_DriveMode_2_ADDR;
#pragma	ioport	LCDE_GlobalSelect_ADDR:	0x12
BYTE			LCDE_GlobalSelect_ADDR;
#pragma	ioport	LCDE_IntCtrl_0_ADDR:	0x112
BYTE			LCDE_IntCtrl_0_ADDR;
#pragma	ioport	LCDE_IntCtrl_1_ADDR:	0x113
BYTE			LCDE_IntCtrl_1_ADDR;
#pragma	ioport	LCDE_IntEn_ADDR:	0x11
BYTE			LCDE_IntEn_ADDR;
#define LCDE_MASK 0x10
#pragma	ioport	LCDE_MUXBusCtrl_ADDR:	0x1ec
BYTE			LCDE_MUXBusCtrl_ADDR;
// LCDE Shadow defines
//   LCDE_DataShadow define
extern BYTE Port_4_Data_SHADE;
#define LCDE_DataShadow (*(unsigned char*)&Port_4_Data_SHADE)
//   LCDE_DriveMode_0Shadow define
extern BYTE Port_4_DriveMode_0_SHADE;
#define LCDE_DriveMode_0Shadow (*(unsigned char*)&Port_4_DriveMode_0_SHADE)
//   LCDE_DriveMode_1Shadow define
extern BYTE Port_4_DriveMode_1_SHADE;
#define LCDE_DriveMode_1Shadow (*(unsigned char*)&Port_4_DriveMode_1_SHADE)
// LCDRS address and mask defines
#pragma	ioport	LCDRS_Data_ADDR:	0x10
BYTE			LCDRS_Data_ADDR;
#pragma	ioport	LCDRS_DriveMode_0_ADDR:	0x110
BYTE			LCDRS_DriveMode_0_ADDR;
#pragma	ioport	LCDRS_DriveMode_1_ADDR:	0x111
BYTE			LCDRS_DriveMode_1_ADDR;
#pragma	ioport	LCDRS_DriveMode_2_ADDR:	0x13
BYTE			LCDRS_DriveMode_2_ADDR;
#pragma	ioport	LCDRS_GlobalSelect_ADDR:	0x12
BYTE			LCDRS_GlobalSelect_ADDR;
#pragma	ioport	LCDRS_IntCtrl_0_ADDR:	0x112
BYTE			LCDRS_IntCtrl_0_ADDR;
#pragma	ioport	LCDRS_IntCtrl_1_ADDR:	0x113
BYTE			LCDRS_IntCtrl_1_ADDR;
#pragma	ioport	LCDRS_IntEn_ADDR:	0x11
BYTE			LCDRS_IntEn_ADDR;
#define LCDRS_MASK 0x20
#pragma	ioport	LCDRS_MUXBusCtrl_ADDR:	0x1ec
BYTE			LCDRS_MUXBusCtrl_ADDR;
// LCDRS Shadow defines
//   LCDRS_DataShadow define
extern BYTE Port_4_Data_SHADE;
#define LCDRS_DataShadow (*(unsigned char*)&Port_4_Data_SHADE)
//   LCDRS_DriveMode_0Shadow define
extern BYTE Port_4_DriveMode_0_SHADE;
#define LCDRS_DriveMode_0Shadow (*(unsigned char*)&Port_4_DriveMode_0_SHADE)
//   LCDRS_DriveMode_1Shadow define
extern BYTE Port_4_DriveMode_1_SHADE;
#define LCDRS_DriveMode_1Shadow (*(unsigned char*)&Port_4_DriveMode_1_SHADE)
// LCDRW address and mask defines
#pragma	ioport	LCDRW_Data_ADDR:	0x10
BYTE			LCDRW_Data_ADDR;
#pragma	ioport	LCDRW_DriveMode_0_ADDR:	0x110
BYTE			LCDRW_DriveMode_0_ADDR;
#pragma	ioport	LCDRW_DriveMode_1_ADDR:	0x111
BYTE			LCDRW_DriveMode_1_ADDR;
#pragma	ioport	LCDRW_DriveMode_2_ADDR:	0x13
BYTE			LCDRW_DriveMode_2_ADDR;
#pragma	ioport	LCDRW_GlobalSelect_ADDR:	0x12
BYTE			LCDRW_GlobalSelect_ADDR;
#pragma	ioport	LCDRW_IntCtrl_0_ADDR:	0x112
BYTE			LCDRW_IntCtrl_0_ADDR;
#pragma	ioport	LCDRW_IntCtrl_1_ADDR:	0x113
BYTE			LCDRW_IntCtrl_1_ADDR;
#pragma	ioport	LCDRW_IntEn_ADDR:	0x11
BYTE			LCDRW_IntEn_ADDR;
#define LCDRW_MASK 0x40
#pragma	ioport	LCDRW_MUXBusCtrl_ADDR:	0x1ec
BYTE			LCDRW_MUXBusCtrl_ADDR;
// LCDRW Shadow defines
//   LCDRW_DataShadow define
extern BYTE Port_4_Data_SHADE;
#define LCDRW_DataShadow (*(unsigned char*)&Port_4_Data_SHADE)
//   LCDRW_DriveMode_0Shadow define
extern BYTE Port_4_DriveMode_0_SHADE;
#define LCDRW_DriveMode_0Shadow (*(unsigned char*)&Port_4_DriveMode_0_SHADE)
//   LCDRW_DriveMode_1Shadow define
extern BYTE Port_4_DriveMode_1_SHADE;
#define LCDRW_DriveMode_1Shadow (*(unsigned char*)&Port_4_DriveMode_1_SHADE)