psocgpioint.inc

利用psoc进行usb及capsense的程序编写

; Button1 address and mask equates
Button1_Data_ADDR:	equ	8h
Button1_DriveMode_0_ADDR:	equ	108h
Button1_DriveMode_1_ADDR:	equ	109h
Button1_DriveMode_2_ADDR:	equ	bh
Button1_GlobalSelect_ADDR:	equ	ah
Button1_IntCtrl_0_ADDR:	equ	10ah
Button1_IntCtrl_1_ADDR:	equ	10bh
Button1_IntEn_ADDR:	equ	9h
Button1_MASK:	equ	4h
Button1_MUXBusCtrl_ADDR:	equ	1dah
; Button2 address and mask equates
Button2_Data_ADDR:	equ	8h
Button2_DriveMode_0_ADDR:	equ	108h
Button2_DriveMode_1_ADDR:	equ	109h
Button2_DriveMode_2_ADDR:	equ	bh
Button2_GlobalSelect_ADDR:	equ	ah
Button2_IntCtrl_0_ADDR:	equ	10ah
Button2_IntCtrl_1_ADDR:	equ	10bh
Button2_IntEn_ADDR:	equ	9h
Button2_MASK:	equ	8h
Button2_MUXBusCtrl_ADDR:	equ	1dah
; Button3 address and mask equates
Button3_Data_ADDR:	equ	8h
Button3_DriveMode_0_ADDR:	equ	108h
Button3_DriveMode_1_ADDR:	equ	109h
Button3_DriveMode_2_ADDR:	equ	bh
Button3_GlobalSelect_ADDR:	equ	ah
Button3_IntCtrl_0_ADDR:	equ	10ah
Button3_IntCtrl_1_ADDR:	equ	10bh
Button3_IntEn_ADDR:	equ	9h
Button3_MASK:	equ	10h
Button3_MUXBusCtrl_ADDR:	equ	1dah
; Button4 address and mask equates
Button4_Data_ADDR:	equ	8h
Button4_DriveMode_0_ADDR:	equ	108h
Button4_DriveMode_1_ADDR:	equ	109h
Button4_DriveMode_2_ADDR:	equ	bh
Button4_GlobalSelect_ADDR:	equ	ah
Button4_IntCtrl_0_ADDR:	equ	10ah
Button4_IntCtrl_1_ADDR:	equ	10bh
Button4_IntEn_ADDR:	equ	9h
Button4_MASK:	equ	20h
Button4_MUXBusCtrl_ADDR:	equ	1dah
; LS1 address and mask equates
LS1_Data_ADDR:	equ	8h
LS1_DriveMode_0_ADDR:	equ	108h
LS1_DriveMode_1_ADDR:	equ	109h
LS1_DriveMode_2_ADDR:	equ	bh
LS1_GlobalSelect_ADDR:	equ	ah
LS1_IntCtrl_0_ADDR:	equ	10ah
LS1_IntCtrl_1_ADDR:	equ	10bh
LS1_IntEn_ADDR:	equ	9h
LS1_MASK:	equ	80h
LS1_MUXBusCtrl_ADDR:	equ	1dah
; S1 address and mask equates
S1_Data_ADDR:	equ	ch
S1_DriveMode_0_ADDR:	equ	10ch
S1_DriveMode_1_ADDR:	equ	10dh
S1_DriveMode_2_ADDR:	equ	fh
S1_GlobalSelect_ADDR:	equ	eh
S1_IntCtrl_0_ADDR:	equ	10eh
S1_IntCtrl_1_ADDR:	equ	10fh
S1_IntEn_ADDR:	equ	dh
S1_MASK:	equ	1h
S1_MUXBusCtrl_ADDR:	equ	1dbh
; S2 address and mask equates
S2_Data_ADDR:	equ	ch
S2_DriveMode_0_ADDR:	equ	10ch
S2_DriveMode_1_ADDR:	equ	10dh
S2_DriveMode_2_ADDR:	equ	fh
S2_GlobalSelect_ADDR:	equ	eh
S2_IntCtrl_0_ADDR:	equ	10eh
S2_IntCtrl_1_ADDR:	equ	10fh
S2_IntEn_ADDR:	equ	dh
S2_MASK:	equ	2h
S2_MUXBusCtrl_ADDR:	equ	1dbh
; LED1 address and mask equates
LED1_Data_ADDR:	equ	ch
LED1_DriveMode_0_ADDR:	equ	10ch
LED1_DriveMode_1_ADDR:	equ	10dh
LED1_DriveMode_2_ADDR:	equ	fh
LED1_GlobalSelect_ADDR:	equ	eh
LED1_IntCtrl_0_ADDR:	equ	10eh
LED1_IntCtrl_1_ADDR:	equ	10fh
LED1_IntEn_ADDR:	equ	dh
LED1_MASK:	equ	4h
LED1_MUXBusCtrl_ADDR:	equ	1dbh
; LED2 address and mask equates
LED2_Data_ADDR:	equ	ch
LED2_DriveMode_0_ADDR:	equ	10ch
LED2_DriveMode_1_ADDR:	equ	10dh
LED2_DriveMode_2_ADDR:	equ	fh
LED2_GlobalSelect_ADDR:	equ	eh
LED2_IntCtrl_0_ADDR:	equ	10eh
LED2_IntCtrl_1_ADDR:	equ	10fh
LED2_IntEn_ADDR:	equ	dh
LED2_MASK:	equ	8h
LED2_MUXBusCtrl_ADDR:	equ	1dbh
; LED3 address and mask equates
LED3_Data_ADDR:	equ	ch
LED3_DriveMode_0_ADDR:	equ	10ch
LED3_DriveMode_1_ADDR:	equ	10dh
LED3_DriveMode_2_ADDR:	equ	fh
LED3_GlobalSelect_ADDR:	equ	eh
LED3_IntCtrl_0_ADDR:	equ	10eh
LED3_IntCtrl_1_ADDR:	equ	10fh
LED3_IntEn_ADDR:	equ	dh
LED3_MASK:	equ	10h
LED3_MUXBusCtrl_ADDR:	equ	1dbh
; LED4 address and mask equates
LED4_Data_ADDR:	equ	ch
LED4_DriveMode_0_ADDR:	equ	10ch
LED4_DriveMode_1_ADDR:	equ	10dh
LED4_DriveMode_2_ADDR:	equ	fh
LED4_GlobalSelect_ADDR:	equ	eh
LED4_IntCtrl_0_ADDR:	equ	10eh
LED4_IntCtrl_1_ADDR:	equ	10fh
LED4_IntEn_ADDR:	equ	dh
LED4_MASK:	equ	20h
LED4_MUXBusCtrl_ADDR:	equ	1dbh
; VR1 address and mask equates
VR1_Data_ADDR:	equ	ch
VR1_DriveMode_0_ADDR:	equ	10ch
VR1_DriveMode_1_ADDR:	equ	10dh
VR1_DriveMode_2_ADDR:	equ	fh
VR1_GlobalSelect_ADDR:	equ	eh
VR1_IntCtrl_0_ADDR:	equ	10eh
VR1_IntCtrl_1_ADDR:	equ	10fh
VR1_IntEn_ADDR:	equ	dh
VR1_MASK:	equ	40h
VR1_MUXBusCtrl_ADDR:	equ	1dbh
; VR2 address and mask equates
VR2_Data_ADDR:	equ	ch
VR2_DriveMode_0_ADDR:	equ	10ch
VR2_DriveMode_1_ADDR:	equ	10dh
VR2_DriveMode_2_ADDR:	equ	fh
VR2_GlobalSelect_ADDR:	equ	eh
VR2_IntCtrl_0_ADDR:	equ	10eh
VR2_IntCtrl_1_ADDR:	equ	10fh
VR2_IntEn_ADDR:	equ	dh
VR2_MASK:	equ	80h
VR2_MUXBusCtrl_ADDR:	equ	1dbh
; LCDD4 address and mask equates
LCDD4_Data_ADDR:	equ	10h
LCDD4_DriveMode_0_ADDR:	equ	110h
LCDD4_DriveMode_1_ADDR:	equ	111h
LCDD4_DriveMode_2_ADDR:	equ	13h
LCDD4_GlobalSelect_ADDR:	equ	12h
LCDD4_IntCtrl_0_ADDR:	equ	112h
LCDD4_IntCtrl_1_ADDR:	equ	113h
LCDD4_IntEn_ADDR:	equ	11h
LCDD4_MASK:	equ	1h
LCDD4_MUXBusCtrl_ADDR:	equ	1ech
; LCDD4_Data access macros
;   GetLCDD4_Data macro, return in a
macro GetLCDD4_Data
	mov		a,[Port_4_Data_SHADE]
	and		a, 1h
endm
;   SetLCDD4_Data macro
macro SetLCDD4_Data
	or		[Port_4_Data_SHADE], 1h
	mov		reg[Port_4_Data], [Port_4_Data_SHADE]
endm
;   SetLCDD4_Data macro
macro ClearLCDD4_Data
	and		[Port_4_Data_SHADE], ~1h
	mov		reg[Port_4_Data], [Port_4_Data_SHADE]
endm

; LCDD4_DriveMode_0 access macros
;   GetLCDD4_DriveMode_0 macro, return in a
macro GetLCDD4_DriveMode_0
	mov		a,[Port_4_DriveMode_0_SHADE]
	and		a, 1h
endm
;   SetLCDD4_DriveMode_0 macro
macro SetLCDD4_DriveMode_0
	or		[Port_4_DriveMode_0_SHADE], 1h
	mov		reg[Port_4_DriveMode_0], [Port_4_DriveMode_0_SHADE]
endm
;   SetLCDD4_DriveMode_0 macro
macro ClearLCDD4_DriveMode_0
	and		[Port_4_DriveMode_0_SHADE], ~1h
	mov		reg[Port_4_DriveMode_0], [Port_4_DriveMode_0_SHADE]
endm

; LCDD4_DriveMode_1 access macros
;   GetLCDD4_DriveMode_1 macro, return in a
macro GetLCDD4_DriveMode_1
	mov		a,[Port_4_DriveMode_1_SHADE]
	and		a, 1h
endm
;   SetLCDD4_DriveMode_1 macro
macro SetLCDD4_DriveMode_1
	or		[Port_4_DriveMode_1_SHADE], 1h
	mov		reg[Port_4_DriveMode_1], [Port_4_DriveMode_1_SHADE]
endm
;   SetLCDD4_DriveMode_1 macro
macro ClearLCDD4_DriveMode_1
	and		[Port_4_DriveMode_1_SHADE], ~1h
	mov		reg[Port_4_DriveMode_1], [Port_4_DriveMode_1_SHADE]
endm

; LCDD5 address and mask equates
LCDD5_Data_ADDR:	equ	10h
LCDD5_DriveMode_0_ADDR:	equ	110h
LCDD5_DriveMode_1_ADDR:	equ	111h
LCDD5_DriveMode_2_ADDR:	equ	13h
LCDD5_GlobalSelect_ADDR:	equ	12h
LCDD5_IntCtrl_0_ADDR:	equ	112h
LCDD5_IntCtrl_1_ADDR:	equ	113h
LCDD5_IntEn_ADDR:	equ	11h
LCDD5_MASK:	equ	2h
LCDD5_MUXBusCtrl_ADDR:	equ	1ech
; LCDD5_Data access macros
;   GetLCDD5_Data macro, return in a
macro GetLCDD5_Data
	mov		a,[Port_4_Data_SHADE]
	and		a, 2h
endm
;   SetLCDD5_Data macro
macro SetLCDD5_Data
	or		[Port_4_Data_SHADE], 2h
	mov		reg[Port_4_Data], [Port_4_Data_SHADE]
endm
;   SetLCDD5_Data macro
macro ClearLCDD5_Data
	and		[Port_4_Data_SHADE], ~2h
	mov		reg[Port_4_Data], [Port_4_Data_SHADE]
endm

; LCDD5_DriveMode_0 access macros
;   GetLCDD5_DriveMode_0 macro, return in a
macro GetLCDD5_DriveMode_0
	mov		a,[Port_4_DriveMode_0_SHADE]
	and		a, 2h
endm
;   SetLCDD5_DriveMode_0 macro
macro SetLCDD5_DriveMode_0
	or		[Port_4_DriveMode_0_SHADE], 2h
	mov		reg[Port_4_DriveMode_0], [Port_4_DriveMode_0_SHADE]
endm
;   SetLCDD5_DriveMode_0 macro
macro ClearLCDD5_DriveMode_0
	and		[Port_4_DriveMode_0_SHADE], ~2h
	mov		reg[Port_4_DriveMode_0], [Port_4_DriveMode_0_SHADE]
endm

; LCDD5_DriveMode_1 access macros
;   GetLCDD5_DriveMode_1 macro, return in a
macro GetLCDD5_DriveMode_1
	mov		a,[Port_4_DriveMode_1_SHADE]
	and		a, 2h
endm
;   SetLCDD5_DriveMode_1 macro
macro SetLCDD5_DriveMode_1
	or		[Port_4_DriveMode_1_SHADE], 2h
	mov		reg[Port_4_DriveMode_1], [Port_4_DriveMode_1_SHADE]
endm
;   SetLCDD5_DriveMode_1 macro
macro ClearLCDD5_DriveMode_1
	and		[Port_4_DriveMode_1_SHADE], ~2h
	mov		reg[Port_4_DriveMode_1], [Port_4_DriveMode_1_SHADE]
endm

; LCDD6 address and mask equates
LCDD6_Data_ADDR:	equ	10h
LCDD6_DriveMode_0_ADDR:	equ	110h
LCDD6_DriveMode_1_ADDR:	equ	111h
LCDD6_DriveMode_2_ADDR:	equ	13h
LCDD6_GlobalSelect_ADDR:	equ	12h
LCDD6_IntCtrl_0_ADDR:	equ	112h
LCDD6_IntCtrl_1_ADDR:	equ	113h
LCDD6_IntEn_ADDR:	equ	11h
LCDD6_MASK:	equ	4h
LCDD6_MUXBusCtrl_ADDR:	equ	1ech
; LCDD6_Data access macros
;   GetLCDD6_Data macro, return in a
macro GetLCDD6_Data
	mov		a,[Port_4_Data_SHADE]
	and		a, 4h
endm
;   SetLCDD6_Data macro
macro SetLCDD6_Data
	or		[Port_4_Data_SHADE], 4h
	mov		reg[Port_4_Data], [Port_4_Data_SHADE]
endm