📄 genifunctions.bas
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' The REQUEST_Q_ENTRY structure is used in processing the receipt of memory
' access datagrams. It is not currently supported in this module...
' See GFK-0845, "Genius I/O Geni Board User's Manual" for details.
Public Type REQUEST_Q_ENTRY
COMMAND As Byte
status As Byte
data_length As Byte
host_memory_map(3) As Byte
source_device As Byte
aux_source_address As Byte
Data(128) As Byte
End Type
' ----------------------------------------------------------------------------
' ############################################################################
' The DEVICE_DATA structure defines the makeup of the I/O data for each of the
' possible Genius blocks.
'
' @@ ONLY DISCRETE blocks, 4IN/2OUT ANALOG BLOCKS and GENI-based device global
' data ARE CURRENTLY DEFINED HERE!!!!!
'
' See GFK-0845, "Genius I/O Geni Board User's Manual" for details.
'
' ANALOG_4IN_2OUT ' 4 input / 2 output analog blocks
' analog_inputs(4) As Integer
' analog_outputs(2) As Integer
'
' discrete_blocks(4) As Byte ' 8, 16 & 32 circuit discrete blocks
' Analog4In2Out As ANALOG_4IN_2OUT ' 4 input / 2 output analog blocks (Was a C++ type struct and Union)
' broadcast_global_data(128) As Byte ' input from global data producing device
' directed_control_data(128) As Byte ' directed control inputs in PCI Genius card
' Only care about global data in this application so that's all I defined. If anything else is desired
' then just define it and convert the format to or dump the format into the 128 bytes defined.
' 128 Bytes is the maximum, but memory allocation must be 128 bytes irregardless of what is needed.
Public Type DEVICE_DATA
block_type As Byte
broadcast_global_data(128) As Byte
' input from global data producing device
End Type
Private Const MAX_CARDS_SUPPORTED As Integer = 4
' PCGEN driver can support up to 4 cards
Public Enum GENI_Outputs
OutputsEnabled = &H0 ' Outputs enabled for all bus devices
Outputsdisabled = &H80 ' Outputs disabled for all bus devices
End Enum
#If False Then 'Trick preserves Case of Enums when typing in IDE
Private OutputsEnabled, Outputsdisabled
#End If
' Enumeration used to set PCGEN card bus baud rate during a call to some of
' the class contructors or to the CardSetup function.
Public Enum GENI_BaudRate
Baud_153p6kEXT = &H0 ' 153.6k extended
Baud_38p4k = &H20 ' 38.4k
Baud_76p8k = &H40 ' 76.8k
baud_153p6kstd = &H60 ' 153.6k standard
End Enum
#If False Then 'Trick preserves Case of Enums when typing in IDE
Private Baud_153p6kEXT, Baud_38p4k, Baud_76p8k, baud_153p6kstd
#End If
'## PCGEN Status Register masks
Private Const COMM_OK_LED As Byte = &H10
' bit b4, 0001_0000
Private Const GENI_OK_LED As Byte = &H8
' bit b3, 0000_1000
Private Const WatchDogStatus As Byte = &H2
' bit b1, 0000_0010
Private Const ResetDetect As Byte = &H1
' bit b0, 0000_0001
Private Const FILE_DEVICE_UNKNOWN As Integer = 34
'Public Const FILE_DEVICE_UNKNOWN = &H22
Private Const METHOD_BUFFERED As Long = 0
'PCI Genius card commands
'Declare IOCTL variables to Mimic C++ Macros with CTL_CODE Function
Private IOCTL_GEGENIUS_READ_PORT As Long
Private IOCTL_GEGENIUS_WRITE_PORT As Long
Private IOCTL_GEGENIUS_MAP_MEMORY As Long
Private IOCTL_GEGENIUS_UNMAP_MEMORY As Long
'Use these statements for API DeviceIOControl functions
'IOCTL_GEGENIUS_READ_PORT = CTL_CODE(FILE_DEVICE_UNKNOWN, &H910, METHOD_BUFFERED, FILE_READ_ACCESS)
'IOCTL_GEGENIUS_WRITE_PORT = CTL_CODE(FILE_DEVICE_UNKNOWN, &H911, METHOD_BUFFERED, FILE_WRITE_ACCESS)
'IOCTL_GEGENIUS_MAP_MEMORY = CTL_CODE(FILE_DEVICE_UNKNOWN, &H912, METHOD_BUFFERED, FILE_ANY_ACCESS)
'IOCTL_GEGENIUS_UNMAP_MEMORY = CTL_CODE(FILE_DEVICE_UNKNOWN, &H913, METHOD_BUFFERED, FILE_ANY_ACCESS)
Private Const MAX_PATH As Long = 260
Private Const INVALID_HANDLE_VALUE As Long = -1
Private Const ERROR_FILE_NOT_FOUND As Long = 2
'###############################################################################
'## The GENPORT_WRITE_INPUT structure defines the interface for reading/writing
'## one of the 3 PCGEN hardware registers: configuration, status And control.
'##
'## See GFK-2342, "PCI Genius Card Quick Install Guide" for details.
'##
'Contents of GENPORT_WRITE_INPUT_WriteData
'LongData As Long - Maximum Size
'ShortData As Integer
'CharData As Byte
Public Type GENPORT_WRITE_INPUT
PortNumber As Long
'## Port # to be accessed
WriteData As Long
'## Data to be read from / written to port
End Type 'GENPORT_WRITE_INPUT
'## ----------------------------------------------------------------------------
'## PCGEN Register Offsets
Private Const CONFIG_REG As Integer = 0
'## configuration register
Private Const STATUS_REG As Integer = 1
'## status register
Private Const CONTROL_REG As Integer = 2
'## control register
'## ----------------------------------------------------------------------------
'###############################################################################
'## Caution: The following structure MUST be defined as byte-aligned, not word-
'## aligned. The structure order cannot be altered.
'##
'##
'## The COMMAND portion of PCGEN dual-port RAM is used for the processing of
'## datagrams. The current intent is to shield the user from the nuances of
'## datagrams, which can be rather complex. Should this portion of dual-port RAM
'## need to be exposed to the user, then the structure definitions would need to
'## moved to PCGEN.h
'##
'## @@ Have not yet added support for the "Change Configuration" datagram...
'##
' Content of COMMAND_OPTIONS
' read_datagram_options As READ_DATAGRAM
' xmit_datagram_options As TRANSMIT_DATAGRAM
' xmit_with_reply_datagram_options As TRANSMIT_DATAGRAM_WITH_REPLY
' OPTIONS(14) - Maximum Size
Public Type COMMAND
status As Byte
'Initiation of command + command status
COMMAND As Byte
'Command type (read, xmit, xmit w/reply, cfg change)
OPTIONS(14) As Byte
'maximum size
End Type 'COMMAND
'## Bit masks used in processing datagrams
Private Const CMDMASK As Long = &H3F
Private Const FLGMASK As Long = &H80
Private Const FREEBLK As Long = &H0
Private Const INCOMECMD As Long = &H1
Private Const INPROGRESS As Long = &H2
Private Const CCOMPLETE As Long = &H4
Private Const SYNTAXERR As Long = &H8
Private Const PROCERR As Long = &H10
'## Command types
Private Const READ_DATAGRAM As Integer = 1
Private Const XMIT_DATAGRAM As Integer = 2
Private Const XMIT_DATAGRAM_WITH_REPLY As Integer = 3
Private Const CHANGE_CONFIG As Integer = 4
'## Command function codes
Private Const GEF_DATAGRAM As Long = &H20
'## Command Sub-function codes
Private Const SF_READ_ID As Long = &H0
Private Const SF_READ_ID_REPLY As Long = &H1
Private Const SF_READ_CONFIG As Long = &H2
Private Const SF_READ_CONFIG_REPLY As Long = &H3
Private Const SF_WRITE_CONFIG As Long = &H4
Private Const SF_ASSIGN_MONITOR As Long = &H5
Private Const SF_BEGIN_PACKET_SEQUENCE As Long = &H6
Private Const SF_END_PACKET_SEQUENCE As Long = &H7
Private Const SF_READ_DIAGS As Long = &H8
Private Const SF_READ_DIAGS_REPLY As Long = &H9
Private Const SF_WRITE_POINT As Long = &HB
Private Const SF_READ_BLOCK_IO As Long = &HC
Private Const SF_READ_BLOCK_IO_REPLY As Long = &HD
Private Const SF_REPORT_FAULT As Long = &HF
Private Const SF_PULSE_TEST As Long = &H10
Private Const SF_PULSE_TEST_COMPLETE As Long = &H11
Private Const SF_CLEAR_CIRCUIT_FAULT As Long = &H12
Private Const SF_CLEAR_ALL_CIRCUIT_FAULTS As Long = &H13
Private Const SF_SWITCH_BSM As Long = &H1C
Private Const SF_READ_DEVICE As Long = &H1E
Private Const SF_READ_DEVICE_REPLY As Long = &H1F
Private Const SF_WRITE_DEVICE As Long = &H20
Private Const SF_CONFIG_CHANGE As Long = &H22
Private Const SF_READ_DATA As Long = &H27
Private Const SF_READ_DATA_REPLY As Long = &H28
Private Const SF_READ_MAP As Long = &H2A
Private Const SF_READ_MAP_REPLY As Long = &H2B
Private Const SF_WRITE_MAP As Long = &H2C
Private Const SF_ASSIGN_SBA29_HOT_STANDBY As Long = &H2D
'## Transmit datagram priorities
Private Const NORMAL_PRIORITY As Integer = 0
Private Const HIGH_PRIORITY As Integer = 1
'## ----------------------------------------------------------------------------
'###############################################################################
'## Caution: The following structure MUST be defined as byte-aligned, not word-
'## aligned. The structure order cannot be altered.
'##
'##
'## This is the master structure definition of the PCGEN dual-port RAM. The
'## current intent is to shield the user from dealing directly with dual-port RAM.
'## Should dual-port RAM need to be exposed to the user, then the structure
'## definitions would need to move to PCGEN.h
'##
Public Type Shared_RAM_Interface
request_q(15) As REQUEST_Q_ENTRY
' Incoming datagram queue
queue_head_ptr As Byte
' Entry currently being read
queue_tail_ptr As Byte
' Most recent entry in queue
Setup As GENI_SETUP
' PCGEN card setup data
status As GENI_STATUS
' PCGEN card status data
interrupt_status(15) As Byte
' Current interrupt status
interrupt_disable(15) As Byte
' Enable/disable host interrupts
command_block As COMMAND
' Outgoing datagram
transmit_datagram_buffer(239) As Byte
' Temporary xmit datagram buffer
read_datagram_buffer(133) As Byte
' Read access to recd datagram
iotable_lockout_request As Byte
' Set/release I/O table lockout
iotable_lockout_state As Byte
' Actual lockout state
host_clear As Byte
' Clear interrupts from host
reserved_1(63) As Byte
' Reserved area
aux_request_q(47) As Byte
' Used with datagram request queue
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