memtest.c

nios sopc上的sram调试程序

  /* Read it back as two half-words */
  if (!ret_code)
  {
    if ((IORD_16DIRECT(memory_base, 2) != 0x50A0) &&
        (IORD_16DIRECT(memory_base, 0) != 0x050A))
    {
      ret_code = memory_base;
    }
  }

  /* Read it back as 4 bytes */
  if (!ret_code)
  {
    if ((IORD_8DIRECT(memory_base, 3) != 0x50) &&
        (IORD_8DIRECT(memory_base, 2) != 0xA0) &&
        (IORD_8DIRECT(memory_base, 1) != 0x05) &&
        (IORD_8DIRECT(memory_base, 0) != 0x0A))
    {
    ret_code = memory_base;
    }
  }

  /* Write 2 half-words */
  if (!ret_code)
  {
    IOWR_16DIRECT(memory_base, 0, 0x50A0);
    IOWR_16DIRECT(memory_base, 2, 0x050A);

    /* Read it back as one word */
    if(IORD_32DIRECT(memory_base, 0) != 0x050A50A0)
    {
      ret_code = memory_base;
    }
  }

  /* Read it back as two half-words */
  if (!ret_code)
  {
    if ((IORD_16DIRECT(memory_base, 2) != 0x050A) &&
        (IORD_16DIRECT(memory_base, 0) != 0x50A0))
    {
      ret_code = memory_base;
    }
  }

  /* Read it back as 4 bytes */
  if (!ret_code)
  {
    if ((IORD_8DIRECT(memory_base, 3) != 0x05) &&
        (IORD_8DIRECT(memory_base, 2) != 0x0A) &&
        (IORD_8DIRECT(memory_base, 1) != 0x50) &&
        (IORD_8DIRECT(memory_base, 0) != 0xA0))
    {
      ret_code = memory_base;
    }
  }

  return(ret_code);
}


/******************************************************************
*  Function: MemTestDevice
*
*  Purpose: Tests that every bit in the memory device within the 
*           specified address range can store both a '1' and a '0'.
*
******************************************************************/
static int MemTestDevice(unsigned int memory_base, unsigned int nBytes)
{
  unsigned int offset;
  unsigned int pattern;
  unsigned int antipattern;
  unsigned int ret_code = 0x0;

  /* Fill memory with a known pattern. */
  for (pattern = 1, offset = 0; offset < nBytes; pattern++, offset+=4)
  {
    IOWR_32DIRECT(memory_base, offset, pattern);
  }

  printf(" .");

  /* Check each location and invert it for the second pass. */
  for (pattern = 1, offset = 0; offset < nBytes; pattern++, offset+=4)
  {
    if (IORD_32DIRECT(memory_base, offset) != pattern)
    {
      ret_code = (memory_base + offset);
      break;
    }
    antipattern = ~pattern;
    IOWR_32DIRECT(memory_base, offset, antipattern);
  }

  printf(" .");

  /* Check each location for the inverted pattern and zero it. */
  for (pattern = 1, offset = 0; offset < nBytes; pattern++, offset+=4)
  {
    antipattern = ~pattern;
    if (IORD_32DIRECT(memory_base, offset) != antipattern)
    {
      ret_code = (memory_base + offset);
      break;
    }
    IOWR_32DIRECT(memory_base, offset, 0x0);
  }
  return ret_code;
}

/******************************************************************
*  Function: dma_done
*
*  Purpose: Called when a DMA recieve transaction is complete.
*           Increments rx_done to signal to the main program that
*           the transaction is done.
*
******************************************************************/
//#ifdef DMA_NAME  
//static void dma_done (void* handle, void* data)
//{
//  rx_done++;
//}
//#endif /* DMA_NAME */  

/******************************************************************
*  Function: MemDMATest
*
*  Purpose: Tests every bit in the memory device within the 
*  specified address range using DMA.  The DMA controller provides 
*  a more rigourous test of the memory since it performs back-to-
*  back memory accesses at full system speed.
*
******************************************************************/
//#ifdef DMA_NAME  
//static int MemDMATest(unsigned int memory_base, unsigned int nBytes)
//{
//  int rc;
//  int ret_code = 0;
//  int pattern, offset;
//  alt_dma_txchan txchan;
//  alt_dma_rxchan rxchan;
//  void* data_written;
//  void* data_read;
//  
//  /* Get a couple buffers for the test */
//  data_written = (void*)alt_uncached_malloc(0x1000);
//  data_read = (void*)alt_uncached_malloc(0x1000);
//  
//  
//  /* Fill write buffer with known values */
//  for (pattern = 1, offset = 0; offset < 0x1000; pattern++, offset+=4)
//  {
//    IOWR_32DIRECT((int)data_written, offset, pattern);
//  }
//
//  /* Create the transmit channel */
//  if ((txchan = alt_dma_txchan_open("/dev/dma")) == NULL)
//  {
//    printf ("Failed to open transmit channel\n");
//    exit (1);
//  }
//  
//  /* Create the receive channel */
//  if ((rxchan = alt_dma_rxchan_open("/dev/dma")) == NULL)
//  {
//    printf ("Failed to open receive channel\n");
//    exit (1);
//  }
//  
//  for(offset = memory_base; offset < (memory_base + nBytes); offset += 0x1000)
//  {
//    /* Use DMA to transfer from write buffer to memory under test */
//    /* Post the transmit request */
//    if ((rc = alt_dma_txchan_send (txchan, data_written, 0x1000, NULL, NULL)) < 0)
//    {
//      printf ("Failed to post transmit request, reason = %i\n", rc);
//      exit (1);
//    }
//
//    /* Post the receive request */
//    if ((rc = alt_dma_rxchan_prepare (rxchan, (void*)offset, 0x1000, dma_done, NULL)) < 0)
//    {
//      printf ("Failed to post read request, reason = %i\n", rc);
//      exit (1);
//    }
//  
//    /* Wait for transfer to complete */
//    while (!rx_done);
//    rx_done = 0;
//    
//    /* Clear the read buffer before we fill it */
//    memset(data_read, 0, 0x1000);
//    
//    /* Use DMA to read data back into read buffer from memory under test */
//    /* Post the transmit request */
//    if ((rc = alt_dma_txchan_send (txchan, (void*)offset, 0x1000, NULL, NULL)) < 0)
//    {
//      printf ("Failed to post transmit request, reason = %i\n", rc);
//      exit (1);
//    }
//
//    /* Post the receive request */
//    if ((rc = alt_dma_rxchan_prepare (rxchan, data_read, 0x1000, dma_done, NULL)) < 0)
//    {
//      printf ("Failed to post read request, reason = %i\n", rc);
//      exit (1);
//    }
//
//    /* Wait for transfer to complete */
//    while (!rx_done);
//    rx_done = 0;
//    
//    if (memcmp(data_written, data_read, 0x1000))
//    {
//      ret_code = offset;
//      break;
//    }
//  }
//  alt_uncached_free(data_written);
//  alt_uncached_free(data_read);
//  return ret_code;
//}
//#endif /* DMA_NAME */  


/******************************************************************
*  Function: TestRam
*
*  Purpose: Performs a full-test on the RAM specified.  The tests
*           run are:
*             - MemTestDataBus
*             - MemTestAddressBus
*             - MemTest8_16BitAccess
*             - MemTestDevice
*             - MemDMATest
*
******************************************************************/
static void TestRam(void)
{
  
  int memory_base, memory_end, memory_size;
  int ret_code = 0x0;

  /* Find out what range of memory we are testing */
  //MemGetAddressRange(&memory_base, &memory_end);
  memory_base = 0x08000000;
  memory_end = 0x0fffffff;
  memory_size = (memory_end - memory_base);

  printf("\n");
  printf("Testing RAM from 0x%X to 0x%X\n", memory_base, (memory_base + memory_size));

  /* Test Data Bus. */
  ret_code = MemTestDataBus(memory_base);

  if (ret_code)
   printf(" -Data bus test failed at bit 0x%X", (int)ret_code);
  else
    printf(" -Data bus test passed\n");

  /* Test Address Bus. */
  if (!ret_code)
  {
    ret_code  = MemTestAddressBus(memory_base, memory_size);
    if  (ret_code)
      printf(" -Address bus test failed at address 0x%X", (int)ret_code);
    else
      printf(" -Address bus test passed\n");
  }

  /* Test byte and half-word access. */
  if (!ret_code)
  {
    ret_code = MemTest8_16BitAccess(memory_base);
    if  (ret_code)
      printf(" -Byte and half-word access test failed at address 0x%X", (int)ret_code);
    else
      printf(" -Byte and half-word access test passed\n");
  }

  /* Test that each bit in the device can store both 1 and 0. */
  if (!ret_code)
  {
    printf(" -Testing each bit in memory device.");
    ret_code = MemTestDevice(memory_base, memory_size);
    if  (ret_code)
      printf("  failed at address 0x%X", (int)ret_code);
    else
      printf("  passed\n");
  }
  
  /* Test DMA access to the RAM if DMA exists */
//#ifdef DMA_NAME  
//  if (!ret_code)
//  {
//    printf(" -Testing memory using DMA.");
//    ret_code = MemDMATest(memory_base, memory_size);
//    if  (ret_code)
//      printf("  failed at address 0x%X", (int)ret_code);
//    else
//      printf("  passed\n");
//  }
//#endif /* DMA_NAME */
      
  if (!ret_code)
    printf("Memory at 0x%X Okay\n", memory_base);
}

/******************************************************************
*  Function: TopMenu
*
*  Purpose: Generates the top level menu.
* 
******************************************************************/
//static int TopMenu( void )
//{
//  char ch;
//
//  /* Print the top-level menu to stdout */
//  while (1)
//  {
//    MenuBegin("      Memory Test Main Menu");
//    MenuItem( 'a', "Test RAM" );
//    MenuItem( 'b', "Test Flash");
//#ifdef EPCS_CONTROLLER_NAME    
//    MenuItem( 'c', "Test EPCS Serial Flash");
//#endif /* EPCS_CONTROLLER_NAME */
//    ch = MenuEnd( 'a', 'b' );
//
//    switch(ch)
//    {
//      MenuCase('a',TestRam());
//      MenuCase('b',TestFlash(TEST, CFI));
//#ifdef EPCS_CONTROLLER_NAME    
//      MenuCase('c',TestFlash(TEST, EPCS));
//#endif /* EPCS_CONTROLLER_NAME */
//      MenuCase('e',FlashErase(CFI));       /* hidden option */
//      MenuCase('f',FlashErase(EPCS));       /* hidden option */
//      MenuCase('m',TestFlash(SHOWMAP, CFI)); /* hidden option */
//      MenuCase('s',TestFlash(SHOWMAP, EPCS)); /* hidden option */
//    }
//    if (ch == 'q')
//      break;
//    printf("\nPress enter to continue...\n");
//    while( (( ch = getc(stdin)) != '\n' ) && ( ch != EOF ));
//
//  }
//  return (ch);
//}


/******************************************************************
*  Function: main
*
*  Purpose: Continually prints the menu and performs the actions
*           requested by the user.
* 
******************************************************************/
int main(void)
{

  //int ch;

  /* Print the Header */
  MenuHeader();
  /* Print the menu and do what the user requests, until they hit 'q' */
  TestRam();

  return 0;
}


/******************************************************************************
*                                                                             *
* License Agreement                                                           *
*                                                                             *
* Copyright (c) 2004 Altera Corporation, San Jose, California, USA.           *
* All rights reserved.                                                        *
*                                                                             *
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* Software is furnished to do so, subject to the following conditions:        *
*                                                                             *
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* all copies or substantial portions of the Software.                         *
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*                                                                             *
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******************************************************************************/