sim26.mdl

matlab源代码,适用于开发研究,带来很好的学习效果.

	      IsPILTarget	      off
	      ModelReferenceCompliant on
	      IncludeMdlTerminateFcn  on
	      CombineOutputUpdateFcns off
	      SuppressErrorStatus     off
	      IncludeFileDelimiter    "Auto"
	      ERTCustomFileBanners    off
	      SupportAbsoluteTime     on
	      LogVarNameModifier      "rt_"
	      MatFileLogging	      on
	      MultiInstanceERTCode    off
	      SupportNonFinite	      on
	      SupportComplex	      on
	      PurelyIntegerCode	      off
	      SupportContinuousTime   on
	      SupportNonInlinedSFcns  on
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
	  }
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      SimulationMode	      "normal"
      ExtraOptions	      "-aExprFoldComments=1 "
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      Constant
      Value		      "1"
      VectorParams1D	      on
      OutDataTypeMode	      "Inherit from 'Constant value'"
      OutDataType	      "sfix(16)"
      ConRadixGroup	      "Use specified scaling"
      OutScaling	      "2^0"
      SampleTime	      "inf"
    }
    Block {
      BlockType		      DataTypeConversion
      OutDataTypeMode	      "Inherit via back propagation"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      ConvertRealWorld	      "Real World Value (RWV)"
      RndMeth		      "Zero"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Display
      Format		      "short"
      Decimation	      "10"
      Floating		      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      ForIterator
      ResetStates	      "held"
      IterationSource	      "internal"
      IterationLimit	      "5"
      ExternalIncrement	      off
      ShowIterationPort	      on
      IndexMode		      "One-based"
      IterationVariableDataType	"int32"
    }
    Block {
      BlockType		      Fcn
      Expr		      "sin(u[1])"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Inport
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      Interpolate	      on
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      Sum
      IconShape		      "rectangular"
      Inputs		      "++"
      InputSameDT	      on
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      UnitDelay
      X0		      "0"
      SampleTime	      "1"
      StateMustResolveToSignalObject off
      RTWStateStorageClass    "Auto"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "sim26"
    Location		    [59, 187, 771, 569]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Display
      Name		      "Display"
      Ports		      [1]
      Position		      [450, 73, 535, 127]
      BackgroundColor	      "lightBlue"
      ShowName		      off
      Decimation	      "1"
    }
    Block {
      BlockType		      Display
      Name		      "Display1"
      Ports		      [1]
      Position		      [450, 188, 540, 242]
      BackgroundColor	      "lightBlue"
      ShowName		      off
      Decimation	      "1"
    }
    Block {
      BlockType		      Fcn
      Name		      "Fcn"
      Position		      [265, 200, 365, 230]
      BackgroundColor	      "cyan"
      ShowName		      off
      Expr		      "( u * (u+1) ) / 2"
    }
    Block {
      BlockType		      Constant
      Name		      "N"
      Position		      [105, 79, 150, 121]
      BackgroundColor	      "green"
      Value		      "20"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Subsystem"
      Ports		      [1, 1]
      Position		      [245, 55, 390, 145]
      BackgroundColor	      "magenta"
      TreatAsAtomicUnit	      on
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      System {
	Name			"Subsystem"
	Location		[139, 350, 801, 620]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "In1"
	  Position		  [50, 46, 90, 64]
	  BackgroundColor	  "[0.501961, 0.000000, 0.501961]"
	  Port			  "1"
	  IconDisplay		  "Port number"
	  LatchInput		  off
	}
	Block {
	  BlockType		  DataTypeConversion
	  Name			  "Data Type Conversion"
	  Position		  [230, 37, 295, 73]
	  BackgroundColor	  "[0.501961, 0.000000, 1.000000]"
	  OutDataTypeMode	  "double"
	}
	Block {
	  BlockType		  ForIterator
	  Name			  "For Iterator"
	  Ports			  [1, 1]
	  Position		  [130, 35, 190, 75]
	  BackgroundColor	  "[1.000000, 0.501961, 0.752941]"
	  ResetStates		  "reset"
	  IterationSource	  "external"
	}
	Block {
	  BlockType		  Sum
	  Name			  "Sum"
	  Ports			  [2, 1]
	  Position		  [320, 40, 350, 70]
	  BackgroundColor	  "[1.000000, 0.501961, 0.501961]"
	  ShowName		  off
	  IconShape		  "round"
	  Inputs		  "|++"
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay"
	  Position		  [360, 101, 400, 149]
	  Orientation		  "left"
	  BackgroundColor	  "[0.501961, 0.000000, 1.000000]"
	  SampleTime		  "-1"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [460, 47, 500, 63]
	  BackgroundColor	  "[0.501961, 0.000000, 0.501961]"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "Sum"
	  SrcPort		  1
	  Points		  [75, 0]
	  Branch {
	    Points		    [0, 70]
	    DstBlock		    "Unit Delay"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "Out1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "In1"
	  SrcPort		  1
	  DstBlock		  "For Iterator"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay"
	  SrcPort		  1
	  Points		  [-20, 0]
	  DstBlock		  "Sum"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Data Type Conversion"
	  SrcPort		  1
	  DstBlock		  "Sum"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "For Iterator"
	  SrcPort		  1
	  DstBlock		  "Data Type Conversion"
	  DstPort		  1
	}
      }
    }
    Line {
      SrcBlock		      "N"
      SrcPort		      1
      Points		      [25, 0; 15, 0]
      Branch {
	DstBlock		"Subsystem"
	DstPort			1
      }
      Branch {
	Points			[0, 115]
	DstBlock		"Fcn"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Subsystem"
      SrcPort		      1
      DstBlock		      "Display"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Fcn"
      SrcPort		      1
      DstBlock		      "Display1"
      DstPort		      1
    }
  }
}