prev_cmp_alu.qmsg

用veriloghdl写的alu程序

{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_0oc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_0oc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_0oc " "Info: Found entity 1: mux_0oc" {  } { { "db/mux_0oc.tdf" "" { Text "D:/ALU/db/mux_0oc.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:ShiftLeft0_rtl_1 " "Info: Elaborated megafunction instantiation \"lpm_mux:ShiftLeft0_rtl_1\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:ShiftLeft0_rtl_2 " "Info: Elaborated megafunction instantiation \"lpm_mux:ShiftLeft0_rtl_2\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_a4d.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_a4d.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_a4d " "Info: Found entity 1: mux_a4d" {  } { { "db/mux_a4d.tdf" "" { Text "D:/ALU/db/mux_a4d.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}