alu.tan.qmsg

用veriloghdl写的alu程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Nov 30 22:18:30 2008 " "Info: Processing started: Sun Nov 30 22:18:30 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off alu -c alu --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off alu -c alu --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "ALU_DB_I\[13\] ALU_DC_O\[11\] 15.735 ns Longest " "Info: Longest tpd from source pin \"ALU_DB_I\[13\]\" to destination pin \"ALU_DC_O\[11\]\" is 15.735 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.810 ns) 0.810 ns ALU_DB_I\[13\] 1 PIN PIN_H3 4 " "Info: 1: + IC(0.000 ns) + CELL(0.810 ns) = 0.810 ns; Loc. = PIN_H3; Fanout = 4; PIN Node = 'ALU_DB_I\[13\]'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { ALU_DB_I[13] } "NODE_NAME" } } { "alu.v" "" { Text "D:/ALU/alu.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(4.660 ns) + CELL(0.272 ns) 5.742 ns ShiftLeft0~12245 2 COMB LCCOMB_X27_Y17_N30 1 " "Info: 2: + IC(4.660 ns) + CELL(0.272 ns) = 5.742 ns; Loc. = LCCOMB_X27_Y17_N30; Fanout = 1; COMB Node = 'ShiftLeft0~12245'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.932 ns" { ALU_DB_I[13] ShiftLeft0~12245 } "NODE_NAME" } } { "alu.v" "" { Text "D:/ALU/alu.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.243 ns) + CELL(0.228 ns) 6.213 ns ShiftLeft0~12247 3 COMB LCCOMB_X27_Y17_N0 1 " "Info: 3: + IC(0.243 ns) + CELL(0.228 ns) = 6.213 ns; Loc. = LCCOMB_X27_Y17_N0; Fanout = 1; COMB Node = 'ShiftLeft0~12247'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.471 ns" { ShiftLeft0~12245 ShiftLeft0~12247 } "NODE_NAME" } } { "alu.v" "" { Text "D:/ALU/alu.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.777 ns) + CELL(0.053 ns) 7.043 ns ShiftLeft0~12248 4 COMB LCCOMB_X25_Y15_N28 13 " "Info: 4: + IC(0.777 ns) + CELL(0.053 ns) = 7.043 ns; Loc. = LCCOMB_X25_Y15_N28; Fanout = 13; COMB Node = 'ShiftLeft0~12248'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.830 ns" { ShiftLeft0~12247 ShiftLeft0~12248 } "NODE_NAME" } } { "alu.v" "" { Text "D:/ALU/alu.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.043 ns) + CELL(0.346 ns) 8.432 ns ALU_DC_O~13632 5 COMB LCCOMB_X27_Y18_N14 12 " "Info: 5: + IC(1.043 ns) + CELL(0.346 ns) = 8.432 ns; Loc. = LCCOMB_X27_Y18_N14; Fanout = 12; COMB Node = 'ALU_DC_O~13632'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.389 ns" { ShiftLeft0~12248 ALU_DC_O~13632 } "NODE_NAME" } } { "alu.v" "" { Text "D:/ALU/alu.v" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.519 ns) + CELL(0.346 ns) 10.297 ns ALU_DC_O~13656 6 COMB LCCOMB_X23_Y19_N26 1 " "Info: 6: + IC(1.519 ns) + CELL(0.346 ns) = 10.297 ns; Loc. = LCCOMB_X23_Y19_N26; Fanout = 1; COMB Node = 'ALU_DC_O~13656'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.865 ns" { ALU_DC_O~13632 ALU_DC_O~13656 } "NODE_NAME" } } { "alu.v" "" { Text "D:/ALU/alu.v" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.017 ns) + CELL(0.357 ns) 11.671 ns ALU_DC_O~13657 7 COMB LCCOMB_X26_Y17_N12 1 " "Info: 7: + IC(1.017 ns) + CELL(0.357 ns) = 11.671 ns; Loc. = LCCOMB_X26_Y17_N12; Fanout = 1; COMB Node = 'ALU_DC_O~13657'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.374 ns" { ALU_DC_O~13656 ALU_DC_O~13657 } "NODE_NAME" } } { "alu.v" "" { Text "D:/ALU/alu.v" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.092 ns) + CELL(1.972 ns) 15.735 ns ALU_DC_O\[11\] 8 PIN PIN_Y8 0 " "Info: 8: + IC(2.092 ns) + CELL(1.972 ns) = 15.735 ns; Loc. = PIN_Y8; Fanout = 0; PIN Node = 'ALU_DC_O\[11\]'" {  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.064 ns" { ALU_DC_O~13657 ALU_DC_O[11] } "NODE_NAME" } } { "alu.v" "" { Text "D:/ALU/alu.v" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.384 ns ( 27.86 % ) " "Info: Total cell delay = 4.384 ns ( 27.86 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.351 ns ( 72.14 % ) " "Info: Total interconnect delay = 11.351 ns ( 72.14 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "15.735 ns" { ALU_DB_I[13] ShiftLeft0~12245 ShiftLeft0~12247 ShiftLeft0~12248 ALU_DC_O~13632 ALU_DC_O~13656 ALU_DC_O~13657 ALU_DC_O[11] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "15.735 ns" { ALU_DB_I[13] {} ALU_DB_I[13]~combout {} ShiftLeft0~12245 {} ShiftLeft0~12247 {} ShiftLeft0~12248 {} ALU_DC_O~13632 {} ALU_DC_O~13656 {} ALU_DC_O~13657 {} ALU_DC_O[11] {} } { 0.000ns 0.000ns 4.660ns 0.243ns 0.777ns 1.043ns 1.519ns 1.017ns 2.092ns } { 0.000ns 0.810ns 0.272ns 0.228ns 0.053ns 0.346ns 0.346ns 0.357ns 1.972ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "118 " "Info: Allocated 118 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sun Nov 30 22:18:30 2008 " "Info: Processing ended: Sun Nov 30 22:18:30 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}