combsquareroot.vhd

来自「VHDL code for the square root.」· VHDL 代码 · 共 57 行

LIBRARY ieee;
  use ieee.std_logic_1164.all;
  use ieee.numeric_std.all;
  
entity CombSquareRoot is
  port (
    InData : in unsigned(15 downto 0);
    result : out unsigned(7 downto 0)
  );
end CombSquareRoot;

architecture behav OF CombSquareRoot IS

function SquareRoot (Arg: unsigned) return unsigned is

    constant AMSB: integer:= Arg'length-1;
    constant RMSB: integer:= (Arg'length/2) - 1;
    variable Root: unsigned(RMSB downto 0);
    variable Test: unsigned(RMSB+1 downto 0);
    variable Rest: unsigned(AMSB+1 downto 0);

begin

    Root := (others => '0');
    Rest := '0' & Arg;

    for i in RMSB downto 0 loop

       Test := Root(RMSB-1 downto 0 ) & "01";
       if Test(RMSB-i+1 downto 0) >
          Rest(AMSB+1 downto 2*i) then
           Root := Root(RMSB-1 downto 0) & '0';
       else
           Root := Root(RMSB-1 downto 0) & '1';
           Rest(AMSB downto i*2) := Rest(AMSB downto i*2) -
                                    Test(RMSB-i+1 downto 0);
       end if;

    end loop;

    return Root;

end;

begin

  Uut : process(InData)
  begin
    result <= SquareRoot(InData);
  end process;

end behav;