📄 sercomm.h
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#ifndef SERCOMM_H
#define SERCOMM_H
//打开串口
//参数 COM1/COM2
//返回 TRUE/FALSE
extern int SerComOn(int comport);
//初始化串口参数
//baud:9600/19200
//para:LCR_BITS8|LCR_STOP_BITS1|LCR_NO_PARITY(8位数据,停止1位,无校验)
//返回 TRUE/FALSE
extern int SetSerCom(const int comport, int baud, int para);
//关闭串口
extern void SerComOff(const int comport);
//关闭全部串口
extern void OffAllSerial(void);
//发送字符
extern void SendChar(const int comport, const char ch);
//发送字符串
extern void SendChars(const int comport, unsigned int strlen, char *buf, unsigned int *sendlen);
//接收字符,没有数据返回FALSE
extern int ReceiveChar(const int comport, char *ch);
//例行扫描
extern void comMainRun(void);
#define COM1 1
#define COM2 2
#define COM1_BASE 0x3F8 /* Base port address for COM1 */
#define COM2_BASE 0x2F8 /* Base port address for COM2 */
#define COM1_IRQ 0xEF /* COM1 */
#define COM2_IRQ 0xF7 /* COM2 */
#define COM1_VECT 0x0C
#define COM2_VECT 0x0B
#define COM1_OLD_VECT 0
#define COM2_OLD_VECT 1
#ifndef TRUE
#define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0
#endif
/***********************************************************************
* TXR Output data to the serial port.
* RXR Input data from the serial port.
* LCR Initialize the serial port.
* IER Controls interrupt generation.
* IIR Identifies interrupts.
* MCR Send contorl signals to the modem.
* LSR Monitor the status of the serial port.
* MSR Receive status of the modem.
* DLL Low byte of baud rate divisor.
* DHH High byte of baud rate divisor.
***************************************************************************/
#define TXR 0 /* Transmit register (WRITE) 0 */
#define RXR 0 /* Receive register (READ) 0 */
#define IER 1 /* Interrupt Enable x */
#define IIR 2 /* Interrupt ID x */
#define LCR 3 /* Line control x */
#define MCR 4 /* Modem control x */
#define LSR 5 /* Line Status x */
#define MSR 6 /* Modem Status x */
#define DLL 0 /* Divisor Latch Low 1 */
#define DLH 1 /* Divisor latch High 1 */
/*-------------------------------------------------------------------*
Bit values held in the Line Control Register (LCR).
bit meaning
--- -------
0-1 00=5 bits, 01=6 bits, 10=7 bits, 11=8 bits. /word length select bit
2 Stop bits. /
3 0=parity off, 1=parity on. /Parity Enable=1
4 0=parity odd, 1=parity even. /Odd or Even select
5 Sticky parity. /
6 Set break.
7 Toggle port addresses. /1:access
*-------------------------------------------------------------------*/
#define LCR_BITS8 0x03
#define LCR_BITS7 0x02
#define LCR_BITS6 0x01
#define LCR_BITS5 0x00
#define LCR_NO_PARITY 0x00
#define LCR_EVEN_PARITY 0x18
#define LCR_ODD_PARITY 0x08
#define LCR_STOP_BITS1 0x00
#define LCR_STOP_BITS2 0x04
/*-------------------------------------------------------------------*
Bit values held in the Line Status Register (LSR).
bit meaning
--- -------
0 Data ready.
1 Overrun error - Data register overwritten.
2 Parity error - bad transmission.
3 Framing error - No stop bit was found.
4 Break detect - End to transmission requested.
5 Transmitter holding register is empty.
6 Transmitter shift register is empty.
7 Time out - off line.
*-------------------------------------------------------------------*/
#define LSR_RCVRDY 0x01
#define LSR_OVRERR 0x02
#define LSR_PRTYERR 0x04
#define LSR_FRMERR 0x08
#define LSR_BRKERR 0x10
#define LSR_XMTRDY 0x20
#define LSR_XMTRSR 0x40
#define LSR_TIMEOUT 0x80
/*-------------------------------------------------------------------*
Bit values held in the Modem Output Control Register (MCR).
bit meaning
--- -------
0 Data Terminal Ready. Computer ready to go.
1 Request To Send. Computer wants to send data.
2 auxillary output #1.
3 auxillary output #2.(Note: This bit must be
set to allow the communications card to send
interrupts to the system)
4 UART ouput looped back as input.
5-7 not used.
*------------------------------------------------------------------*/
#define MCR_DTR 0x01
#define MCR_RTS 0x02
#define MCR_INT 0x08
/*------------------------------------------------------------------*
Bit values held in the Modem Input Status Register (MSR).
bit meaning
--- -------
0 delta Clear To Send.
1 delta Data Set Ready.
2 delta Ring Indicator.
3 delta Data Carrier Detect.
4 Clear To Send.
5 Data Set Ready.
6 Ring Indicator.
7 Data Carrier Detect.
*------------------------------------------------------------------*/
#define MSR_CTS 0x10
#define MSR_DSR 0x20
/*------------------------------------------------------------------*
Bit values held in the Interrupt Enable Register (IER).
bit meaning
--- -------
0 Interrupt when data received.
1 Interrupt when transmitter holding reg. empty.
2 Interrupt when data reception error.
3 Interrupt when change in modem status register.
4-7 Not used.
*------------------------------------------------------------------*/
#define IER_RX_INT 0x01
#define IER_TX_INT 0x02
/*------------------------------------------------------------------*
Bit values held in the Interrupt Identification Register (IIR).
bit meaning
--- -------
0 Interrupt pending
1-2 Interrupt ID code
00=Change in modem status register,
01=Transmitter holding register empty,
10=Data received,
11=reception error, or break encountered.
3-7 Not used.
*------------------------------------------------------------------*/
#define IIR_MS_ID 0x00 // Modem status
#define IIR_RX_ID 0x04 // Rceived data OK,and to read the receive buffer
#define IIR_TX_ID 0x02 // Transmitter holding register empty
#define IIR_MASK 0x07 // Get the low 3 bits of IIR
/**********************************************************************
These are the port addresses of the 8259 Programmable Interrupt
Controller (PIC).
***********************************************************************/
#define PIC8259_IMR 0x21 /* Interrupt Mask Register port */
#define PIC8259_ICR 0x20 /* Interrupt Control Port */
/****************************************************************
An end of interrupt needs to be sent to the Control Port of
the 8259 when a hardware interrupt ends.
******************************************************************/
#define PIC8259_EOI 0x20 /* End Of Interrupt */
#ifndef NO_ERROR
#define NO_ERROR 0 /* No error */
#endif
#ifndef BUF_OVFL
#define BUF_OVFL 1 /* Buffer overflowed */
#endif
#define IBUF_LEN 4096 // Incoming buffer
#define OBUF_LEN 4096 // Outgoing buffer
#endif
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