reg_sp35.h

英飞凌公司的单片机的测试计量程序

/* ****************************************************************************************************/
/*                             Register definition File for SP35                                      */
/*   -----------------------------------------------------------------------------------------------  */
/*                                                                                                    */   
/*   Purpose: Declaring all Special Function Registers for the SP35 including the SFRs of the         */
/*            Intel 80C51 code compatible CPU.                                                        */
/*          																				          */
/*                                                                                                    */
/*                                                                                                    */
/*   Filename:   Reg_SP35.h                                                                           */
/*                                                                                                    */
/*   Target:     SP35                                                                                 */
/*                                                                                                    */
/*   Dev. Envir: Keil Software C51 V7.10                                                              */
/*               礦ision2 V2.40                                                                       */
/*   Author:     KBu, SH                                                 	   		                  */
/*                                                                     	                              */
/*   History:    19.October 2005: First Release														  */
/*				 15.March 2006:	Update for new ASIC Design Step B1									  */
/*				 10.October 2006: Update for Target Datasheet V1.2                                  */
/*                                                                                                    */
/*   Status:     Release V1.2                                                                         */
/* ************************************************************************************************** */
/*  (C)opyright Infineon Technologies AG. All rights reserved.                                        */
/* ****************************************************************************************************/  

/* ------------------------------------  MACRO DEFINITIONS  ----------------------------------------- */
#ifndef SP35_REGISTERS
  #define SP35_REGISTERS
/* ================================================================================================== */


/* ************************************************************************************************** */
/*                           80C51 Standard Special Function Registers                              * */
/*                                +  Special SP35 Control Registers                                 * */
/*  Definition for the C Code only (in the assembler they are known)                                * */
#ifdef __C51__
  #ifndef C8051_REGISTERS_C
    #define C8051_REGISTERS_C
  #endif

sfr SP       = 0x81;
sfr Akku     = 0xE0;
sfr16 _DPTR  = 0x82; 

/*  PSW   */
sbit CY      = 0xD7;
sbit AC      = 0xD6;
sbit F0      = 0xD5;
sbit RS1     = 0xD4;
sbit RS0     = 0xD3;
sbit OV      = 0xD2;
sbit P       = 0xD0;

#endif

	
/* ************************************************************************************************** */

/* **********************              System Configuration Registers          ********************** */
sfr CFG0     = 0xF8;     // Configuration Register 0					
    sbit CLKSel0 = 0xF8; // Clock Source Select (1匵tal, 0匯C-Oscillator)
    sbit IDLE    = 0xFD; // Idle Mode - IDLE State (1), Run State (0)
    sbit TSHDWN  = 0xFE; // Thermal Shutdown Mode - TSHT State (1), Run State (0)
    sbit PDWN    = 0xFF; // Active/PowerDown Mode - PDWN State (1), Active RUN State (0)
									
sfr CFG1     = 0xE8;     // Configuration Register 1					
    sbit ITEn    = 0xE8; // Intervaltimer ENable (1)									
    sbit ITInit  = 0xE9; // Intervaltime initialize (1