u-boot-lfc.patch

该源码是2410下的nandboot的源码

diff -ruN u-boot-20060523/board/smdk2410/lowlevel_init.S.rej u-boot/board/smdk2410/lowlevel_init.S.rej
--- u-boot-20060523/board/smdk2410/lowlevel_init.S.rej	1970-01-01 08:00:00.000000000 +0800
+++ u-boot/board/smdk2410/lowlevel_init.S.rej	2006-10-16 19:41:33.000000000 +0800
@@ -0,0 +1,34 @@
+***************
+*** 51,57 ****
+  #define WAIT		 	(0x1<<2)
+  #define UBLB		 	(0x1<<3)
+  
+- #define B1_BWSCON	  	(DW16)
+  #define B2_BWSCON	  	(DW16)
+  #define B3_BWSCON	  	(DW16 + WAIT + UBLB)
+  #define B4_BWSCON	  	(DW16)
+--- 51,57 ----
+  #define WAIT		 	(0x1<<2)
+  #define UBLB		 	(0x1<<3)
+  
++ #define B1_BWSCON	  	(DW32)
+  #define B2_BWSCON	  	(DW16)
+  #define B3_BWSCON	  	(DW16 + WAIT + UBLB)
+  #define B4_BWSCON	  	(DW16)
+***************
+*** 88,94 ****
+  #define B3_Tacs		 	0x0	/*  0clk */
+  #define B3_Tcos		 	0x0	/*  4clk */
+  #define B3_Tacc		 	0x7	/* 14clk */
+- #define B3_Tcoh		 	0x0	/*  1clk */
+  #define B3_Tah		 	0x0	/*  0clk */
+  #define B3_Tacp		 	0x0     /*  6clk */
+  #define B3_PMC		 	0x0	/* normal */
+--- 88,94 ----
+  #define B3_Tacs		 	0x0	/*  0clk */
+  #define B3_Tcos		 	0x0	/*  4clk */
+  #define B3_Tacc		 	0x7	/* 14clk */
++ #define B3_Tcoh		 	0x0	/*  0clk */
+  #define B3_Tah		 	0x0	/*  0clk */
+  #define B3_Tacp		 	0x0     /*  6clk */
+  #define B3_PMC		 	0x0	/* normal */
diff -ruN u-boot-20060523/board/smdk2410/Makefile u-boot/board/smdk2410/Makefile
--- u-boot-20060523/board/smdk2410/Makefile	2006-09-25 17:03:58.000000000 +0800
+++ u-boot/board/smdk2410/Makefile	2006-10-16 19:41:33.000000000 +0800
@@ -25,7 +25,7 @@
 
 LIB	= lib$(BOARD).a
 
-OBJS	:= smdk2410.o flash.o
+OBJS	:= smdk2410.o flash.o nand_read.o 
 SOBJS	:= lowlevel_init.o
 
 $(LIB):	$(OBJS) $(SOBJS)
diff -ruN u-boot-20060523/board/smdk2410/nand_read.c u-boot/board/smdk2410/nand_read.c
--- u-boot-20060523/board/smdk2410/nand_read.c	1970-01-01 08:00:00.000000000 +0800
+++ u-boot/board/smdk2410/nand_read.c	2006-10-16 19:41:33.000000000 +0800
@@ -0,0 +1,61 @@
+#include <config.h>
+
+#define __REGb(x) (*(volatile unsigned char *)(x))
+#define __REGi(x) (*(volatile unsigned int *)(x))
+#define NF_BASE  0x4e000000
+#define NFCONF  __REGi(NF_BASE + 0x0)
+#define NFCMD  __REGb(NF_BASE + 0x4)
+#define NFADDR  __REGb(NF_BASE + 0x8)
+#define NFDATA  __REGb(NF_BASE + 0xc)
+#define NFSTAT  __REGb(NF_BASE + 0x10)
+
+#define BUSY 1
+inline void wait_idle(void) {
+	    int i;
+
+		    while(!(NFSTAT & BUSY))
+				      for(i=0; i<10; i++);
+}
+
+#define NAND_SECTOR_SIZE 512
+#define NAND_BLOCK_MASK  (NAND_SECTOR_SIZE - 1)
+
+/* low level nand read function */
+int
+nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
+{
+	int i, j;
+
+	if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {
+		return -1; /* invalid alignment */
+	}
+
+/* chip Enable */
+	NFCONF &= ~0x800;
+	for(i=0; i<10; i++);
+
+	for(i=start_addr; i < (start_addr + size);) {
+/* READ0 */
+		NFCMD = 0;
+
+/* Write Address */
+		NFADDR = i & 0xff;
+		NFADDR = (i >> 9) & 0xff;
+		NFADDR = (i >> 17) & 0xff;
+		NFADDR = (i >> 25) & 0xff;
+
+		wait_idle();
+
+		for(j=0; j < NAND_SECTOR_SIZE; j++, i++) {
+			*buf = (NFDATA & 0xff);
+			buf++;
+		}
+	}
+
+/* chip Disable */
+	NFCONF |= 0x800; /* chip disable */
+
+	return 0;
+}
+
+
diff -ruN u-boot-20060523/board/smdk2410/smdk2410.c u-boot/board/smdk2410/smdk2410.c
--- u-boot-20060523/board/smdk2410/smdk2410.c	2006-09-25 17:03:58.000000000 +0800
+++ u-boot/board/smdk2410/smdk2410.c	2006-10-23 12:52:10.000000000 +0800
@@ -27,7 +27,7 @@
 
 #include <common.h>
 #include <s3c2410.h>
-
+//#include <nand.h>
 DECLARE_GLOBAL_DATA_PTR;
 
 #define FCLK_SPEED 1
@@ -69,6 +69,7 @@
 {
 	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
 	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	unsigned int val32;
 
 	/* to reduce PLL lock time, adjust the LOCKTIME register */
 	clk_power->LOCKTIME = 0xFFFFFF;
@@ -87,21 +88,25 @@
 
 	/* set up the I/O ports */
 	gpio->GPACON = 0x007FFFFF;
-	gpio->GPBCON = 0x00044555;
-	gpio->GPBUP = 0x000007FF;
+//	gpio->GPBCON = 0x00044555;
+        gpio->GPBCON = 0x00155555;
+	gpio->GPBUP  = 0x000007FF;
 	gpio->GPCCON = 0xAAAAAAAA;
-	gpio->GPCUP = 0x0000FFFF;
+	gpio->GPCUP  = 0x0000FFFF;
 	gpio->GPDCON = 0xAAAAAAAA;
-	gpio->GPDUP = 0x0000FFFF;
+	gpio->GPDUP  = 0x0000FFFF;
 	gpio->GPECON = 0xAAAAAAAA;
-	gpio->GPEUP = 0x0000FFFF;
+	gpio->GPEUP  = 0x0000FFFF;
 	gpio->GPFCON = 0x000055AA;
-	gpio->GPFUP = 0x000000FF;
+	gpio->GPFUP  = 0x000000FF;
 	gpio->GPGCON = 0xFF95FFBA;
-	gpio->GPGUP = 0x0000FFFF;
-	gpio->GPHCON = 0x002AFAAA;
-	gpio->GPHUP = 0x000007FF;
-
+	gpio->GPGUP  = 0x0000FFFF;
+	gpio->GPHCON = 0x0016faaa; /*0x002AFAAA;*/
+	gpio->GPHUP  = 0x000007FF;
+	val32=gpio->GPBDAT;
+	gpio->GPBDAT = val32|(0xF<<7);
+//	gpio->GPFDAT = (gpio->GPFDAT & ~(0xf<<4))|((~(0x1) & 0xf)<<4);
+	
 	/* arch number of SMDK2410-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_SMDK2410;
 
@@ -121,3 +126,136 @@
 
 	return 0;
 }
+
+
+/*
+   * NAND flash initialization.
+   */
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+typedef enum {
+	NFCE_LOW,
+	NFCE_HIGH
+} NFCE_STATE;
+
+extern unsigned long nand_probe(unsigned long physadr);
+
+static inline void NF_Reset(void)
+{
+	int i;
+
+	NF_SetCE(NFCE_LOW);
+	NF_Cmd(0xFF); // reset command 
+	for(i = 0; i < 10; i++); // tWB = 100ns. 
+	NF_WaitRB(); // wait 200~500us; 
+	NF_SetCE(NFCE_HIGH);
+}
+
+
+static inline void NF_Init(void)
+{
+#if 0 // a little bit too optimistic 
+#define TACLS 0
+#define TWRPH0 3
+#define TWRPH1 0
+#else
+#define TACLS 0
+#define TWRPH0 4
+#define TWRPH1 2
+#endif
+
+	NF_Conf((1<<15)|(0<<14)|(0<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0));
+//	NF_Conf((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0)); 
+	// 1  1    1     1,   1      xxx,  r xxx, r xxx 
+	// En 512B 4step ECCR nFCE=H tACLS   tWRPH0 tWRPH1 
+
+	NF_Reset();
+}
+
+void nand_init(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+	NF_Init();
+	printf ("%4lu MB\n", nand_probe((ulong)nand) >> 20);
+}
+
+static  void NF_Conf(u16 conf)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFCONF = conf;
+}
+
+static  void NF_Cmd(u8 cmd)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFCMD = cmd;
+}
+
+static void NF_CmdW(u8 cmd)
+{
+	NF_Cmd(cmd);
+	udelay(1);
+}
+
+static  void NF_Addr(u8 addr)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFADDR = addr;
+}
+
+static  void NF_SetCE(NFCE_STATE s)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	switch (s) {
+		case NFCE_LOW:
+			nand->NFCONF &= ~(1<<11);
+			break;
+
+		case NFCE_HIGH:
+			nand->NFCONF |= (1<<11);
+			break;
+	}
+}
+
+static void NF_WaitRB(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	while (!(nand->NFSTAT & (1<<0)));
+}
+
+static  void NF_Write(u8 data)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFDATA = data;
+}
+
+static  u8 NF_Read(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	return(nand->NFDATA);
+}
+
+static  void NF_Init_ECC(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFCONF |= (1<<12);
+}
+
+static  u32 NF_Read_ECC(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	return(nand->NFECC);
+}
+
+#endif
+
+
diff -ruN u-boot-20060523/common/cmd_boot.c u-boot/common/cmd_boot.c
--- u-boot-20060523/common/cmd_boot.c	2006-09-25 17:03:59.000000000 +0800
+++ u-boot/common/cmd_boot.c	2006-10-16 19:41:33.000000000 +0800
@@ -32,6 +32,63 @@
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
+void  call_linux(long a0, long a1, long a2)
+{   
+__asm__(
+	    "   mov r1, #0\n"
+	    "   mov r1, #7 << 5\n"        /* 8 segments */
+	    "1: orr r3, r1, #63 << 26\n"      /* 64 entries */
+	    "2: mcr p15, 0, r3, c7, c14, 2\n" /* clean & invalidate D index */
+	    "   subs    r3, r3, #1 << 26\n"
+	    "   bcs 2b\n"             /* entries 64 to 0 */
+	    "   subs    r1, r1, #1 << 5\n"
+	    "   bcs 1b\n"             /* segments 7 to 0 */
+	    "   mcr p15, 0, r1, c7, c5, 0\n"  /* invalidate I cache */
+	    "   mcr p15, 0, r1, c7, c10, 4\n" /* drain WB */
+);
+
+
+__asm__(
+"mov    r0, #0\n"
+"mcr    p15, 0, r0, c7, c10, 4\n"   /* drain WB */
+"mcr    p15, 0, r0, c8, c7, 0\n"    /* invalidate I & D TLBs */
+);
+
+
+__asm__(
+"mov    r0, %0\n"
+"mov    r1, #0x0c1\n"
+"mov    r2, %2\n"
+"mov    ip, #0\n"
+"mcr    p15, 0, ip, c13, c0, 0\n"   /* zero PID */
+"mcr    p15, 0, ip, c7, c7, 0\n"    /* invalidate I,D caches */
+"mcr    p15, 0, ip, c7, c10, 4\n"   /* drain write buffer */
+"mcr    p15, 0, ip, c8, c7, 0\n"    /* invalidate I,D TLBs */
+"mrc    p15, 0, ip, c1, c0, 0\n"    /* get control register */
+"bic    ip, ip, #0x0001\n"      /* disable MMU */
+"mcr    p15, 0, ip, c1, c0, 0\n"    /* write control register */
+"mov    pc, r2\n"
+"nop\n"
+"nop\n"
+: /* no outpus */
+: "r" (a0), "r" (a1), "r" (a2)
+);
+}
+static void setup_linux_param(ulong param_base)
+{   
+struct param_struct *params = (struct param_struct *)param_base; 
+char *linux_cmd;
+
+//linux_cmd = "noinitrd root=/dev/mtdblock/2 init=/linuxrc console=ttyS0";
+linux_cmd = getenv("bootargs");
+memset(params, 0, sizeof(struct param_struct));
+
+/* 部坷苛 秦拎具 瞪 巴甸.. 抄叼啊 版氰利栏肺 措面 嘛篮 巴.. */
+params->u1.s.page_size = 0x00001000;
+params->u1.s.nr_pages = (0x04000000 >> 12);
+/* set linux command line */
+memcpy(params->commandline, linux_cmd, strlen(linux_cmd) + 1);
+}
 int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	ulong	addr, rc;
@@ -45,7 +102,9 @@
 	addr = simple_strtoul(argv[1], NULL, 16);
 
 	printf ("## Starting application at 0x%08lX ...\n", addr);
-
+	setup_linux_param(0x30000100);
+	call_linux(0,0x0c1,0x30008000);
+	printf("ok\n");
 	/*
 	 * pass address parameter as argv[0] (aka command name),
 	 * and all remaining args
diff -ruN u-boot-20060523/common/cmd_bootm.c u-boot/common/cmd_bootm.c
--- u-boot-20060523/common/cmd_bootm.c	2006-09-25 17:03:59.000000000 +0800
+++ u-boot/common/cmd_bootm.c	2006-10-16 19:41:33.000000000 +0800
@@ -413,6 +413,7 @@
 #ifdef CONFIG_SILENT_CONSOLE
 	    fixup_silent_linux();
 #endif
+		printf("boot linux\n");
 	    do_bootm_linux  (cmdtp, flag, argc, argv,
 			     addr, len_ptr, verify);
 	    break;
@@ -582,6 +583,8 @@
 
 	*kbd = *(gd->bd);
 
+	printf ("## cmdline %s", cmdline);
+	printf ("## cmdline at 0x%08lX ... 0x%08lX\n", cmd_start, cmd_end);
 #ifdef	DEBUG
 	printf ("## cmdline at 0x%08lX ... 0x%08lX\n", cmd_start, cmd_end);
 
@@ -610,7 +613,7 @@
 		kbd->bi_pcifreq /= 1000000L;
 #endif /* CONFIG_MPC5xxx */
 	}
-
+	printf("go\n");
 	kernel = (void (*)(bd_t *, ulong, ulong, ulong, ulong)) ntohl(hdr->ih_ep);
 
 	/*
@@ -657,7 +660,7 @@
 			ulong cdata = data, edata = cdata + len;
 #endif	/* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
 
-			puts ("   Verifying Checksum ... ");
+			puts ("   Verifying Checksum .... ");
 
 #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
 
@@ -1096,7 +1099,7 @@
 	data = addr + sizeof(image_header_t);
 	len  = ntohl(hdr->ih_size);
 
-	puts ("   Verifying Checksum ... ");
+	puts ("   Verifying Checksum .. ");
 	if (crc32 (0, (uchar *)data, len) != ntohl(hdr->ih_dcrc)) {
 		puts ("   Bad Data CRC\n");
 		return 1;
@@ -1152,7 +1155,7 @@
 			data = (ulong)hdr + sizeof(image_header_t);
 			len  = ntohl(hdr->ih_size);
 
-			puts ("   Verifying Checksum ... ");
+			puts ("   Verifying Checksum . ");
 			if (crc32 (0, (uchar *)data, len) != ntohl(hdr->ih_dcrc)) {
 				puts ("   Bad Data CRC\n");
 			}
diff -ruN u-boot-20060523/common/cmd_nand.c u-boot/common/cmd_nand.c
--- u-boot-20060523/common/cmd_nand.c	2006-09-25 17:03:59.000000000 +0800
+++ u-boot/common/cmd_nand.c	2006-10-23 22:04:27.000000000 +0800
@@ -10,7 +10,6 @@
 
 #include <common.h>
 
-
 #ifndef CFG_NAND_LEGACY
 /*
  *
@@ -466,8 +465,18 @@
     switch (argc) {
     case 0:
     case 1:
-	printf ("Usage:\n%s\n", cmdtp->usage);
+//	printf ("Usage:\n%s\n", cmdtp->usage);
+        printf ("nand    - NAND sub-system\n");
+        printf ("info  - show available NAND devices\n");