📄 fl_thesis_00_2phase.mdl
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ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
PropName "Components"
}
}
hdlcoderui.hdlcc {
$ObjectID 11
Description "HDL Coder custom configuration component"
Version "1.4.0"
Name "HDL Coder"
Array {
Type "Cell"
Dimension 1
Cell ""
PropName "HDLConfigFile"
}
HDLCActiveTab "0"
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Real-Time Workshop"
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 1
}
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
BlockParameterDefaults {
Block {
BlockType ActionPort
InitializeStates "held"
ActionType "unset"
}
Block {
BlockType Clock
DisplayTime off
}
Block {
BlockType DataTypeConversion
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Inherit via back propagation"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Inherit via back propagation"
LockScale off
ConvertRealWorld "Real World Value (RWV)"
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Demux
Outputs "4"
DisplayOption "none"
BusSelectionMode off
}
Block {
BlockType Derivative
LinearizePole "inf"
}
Block {
BlockType DigitalClock
SampleTime "1"
}
Block {
BlockType DiscreteIntegrator
IntegratorMethod "Integration: Forward Euler"
gainval "1.0"
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
InitialConditionMode "State and output"
SampleTime "1"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Inherit via internal rule"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Inherit via internal rule"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow off
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
IgnoreLimit off
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
Block {
BlockType EnablePort
StatesWhenEnabling "held"
ShowOutputPort off
ZeroCross on
}
Block {
BlockType From
IconDisplay "Tag"
TagVisibility "local"
}
Block {
BlockType Fcn
Expr "sin(u[1])"
SampleTime "-1"
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParamMin "[]"
ParamMax "[]"
ParameterDataTypeMode "Same as input"
ParameterDataType "fixdt(1,16,0)"
ParameterScalingMode "Best Precision: Matrix-wise"
ParameterScaling "[]"
ParamDataTypeStr "Inherit: Same as input"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Goto
IconDisplay "Tag"
}
Block {
BlockType Ground
}
Block {
BlockType HitCross
HitCrossingOffset "0"
HitCrossingDirection "either"
ShowOutputPort on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType If
NumInputs "1"
IfExpression "u1 > 0"
ShowElse on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType InitialCondition
Value "1"
SampleTime "-1"
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: auto"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Logic
Operator "AND"
Inputs "2"
IconShape "rectangular"
AllPortsSameDT on
OutDataTypeMode "Logical (see Configuration Parameters: Optimization)"
LogicDataType "uint(8)"
OutDataTypeStr "Inherit: Logical (see Configuration Parameters: Optimization)"
SampleTime "-1"
}
Block {
BlockType Math
Operator "exp"
OutputSignalType "auto"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as first input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: auto"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType PMComponent
SubClassName "unknown"
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as first input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Reference
}
Block {
BlockType Relay
OnSwitchValue "eps"
OffSwitchValue "eps"
OnOutputValue "1"
OffOutputValue "0"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "All ports same datatype"
OutDataType "fixdt(1,16,0)"
ConRadixGroup "Use specified scaling"
OutScaling "[]"
OutDataTypeStr "Inherit: All ports same datatype"
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Scope
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "-1"
}
Block {
BlockType Selector
NumberOfDimensions "1"
IndexMode "One-based"
InputPortWidth "-1"
SampleTime "-1"
}
Block {
BlockType SubSystem
ShowPortLabels "FromPortIcon"
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
CheckFcnCallInpInsideContextMsg off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
AccumDataTypeStr "Inherit: Inherit via internal rule"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as first input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Inherit via internal rule"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Inherit via internal rule"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType ToWorkspace
VariableName "simulink_output"
MaxDataPoints "1000"
Decimation "1"
SampleTime "0"
FixptAsFi off
}
Block {
BlockType Terminator
}
Block {
BlockType UnitDelay
X0 "0"
SampleTime "1"
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
Block {
BlockType Merge
Inputs "2"
InitialOutput "[]"
AllowUnequalInputPortWidths off
InputPortOffsets "[]"
}
Block {
BlockType PMIOPort
}
Block {
BlockType Constant
Value "1"
VectorParams1D on
SamplingMode "Sample based"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "fixdt(1,16,0)"
ConRadixGroup "Use specified scaling"
OutScaling "[]"
OutDataTypeStr "Inherit: Inherit from 'Constant value'"
SampleTime "inf"
FramePeriod "inf"
}
Block {
BlockType Lookup
InputValues "[-4:5]"
Table " rand(1,10)-0.5"
LookUpMeth "Interpolation-Extrapolation"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
LUTDesignTableMode "Redesign Table"
LUTDesignDataSource "Block Dialog"
LUTDesignFunctionName "sqrt(x)"
LUTDesignUseExistingBP on
LUTDesignRelError "0.01"
LUTDesignAbsError "1e-6"
}
Block {
BlockType MinMax
Function "min"
Inputs "1"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Inherit via internal rule"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Inherit via internal rule"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType RelationalOperator
Operator ">="
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