irq.mac

LPC based lcd interface

/*
------------------------------------------------------------------------------
-    ATMEL Microcontroller Software Support  -   ROUSSET -
-----------------------------------------------------------------------------
 The software is delivered "AS IS" without warranty or condition of any
 kind, either express, implied or statutory. This includes without
 limitation any warranty or condition with respect to merchantability or
 fitness for any particular purpose, or against the infringements of
 intellectual property rights of others.
-----------------------------------------------------------------------------
- File source          : irq.mac
- Librarian            : Not applicable
- Translator           : ARM Software Development Toolkit V2.11a
-
- Treatment            : Exception Entry and Exit Macro.
- Comments             :
- Imported Resources   :
-          PtAICBase
- Exported Resources   :
-          IRQ_ENTRY
-          IRQ_EXIT
-
- 1.0 JCZ 09/03/98     : Creation
- 1.1 JCZ 15/09/98     : Force saving of scratch register r0-r3 and r12
-                      : Remove return mode selection : always in IRQ mode
- 2.0 JCZ 13/10/98     : Clean up
- 2.1 JCZ 19/01/99     : Correction register save/restore depending on
-                      : parameter $reg in the IF-ELSE-ENDIF
- 2.2 16/03/99 JCZ     : SDT V2.5
-                      : Remove warning concerning CPSR field specifier.
------------------------------------------------------------------------------
*/


/*-------------------------- List of Included Files ---------------------------*/
/* None */

/*------------------------ List of constants and types ------------------------*/
/* None */

/*------------------------- List of Imported resources -------------------------*.
/* None */

/*------------------------- List of Internal resources -------------------------*/
/*
- An interrupt occurs :
- The core set the I bit and switch in IRQ Mode. The Program counter is stored
- in the Link Register before being loaded with the IRQ vector 0x00000018.
- The Current Program Status Register is stored in the SPSR_irq register.
- The core execute the instruction stored in the vector ( ldr pc, [pc,#-&F20] )
- and load the PC with the value read in the Interrupt Vector Register of the
- Advanced Interrupt Controller.
- Read of the Interrupt Vector Register automatically clears the interrupt
- if this one is programmed edge triggered, and push in hardware stack the
- level of priority of the interrupt.
- The value read in IVR is stored in the PC. This branch here.
*/
            .macro IRQ_ENTRY   reg=r4

/*- Adjust and save LR_irq mode in IRQ stack */
            sub         r14, r14, #4
            stmfd       sp!, {r14}

/*- Save SPSR and r0 in IRQ stack */
            mrs         r14, spsr
            stmfd       sp!, {r0, r14}

/*- Enable Interrupt and Switch in SYS Mode */
            mrs         r14, cpsr
            bic         r14, r14, #I_BIT
            orr         r14, r14, #ARM_MODE_SYS
            msr         cpsr, r14

/*- Save scratch/used registers and LR in User Stack */
            stmfd       sp!, { r1-r3, \reg, r12, r14}

            .endm

            .macro  IRQ_EXIT    reg=r4

/*- Restore scratch/used registers and LR from User Stack */
            ldmia       sp!, { r1-r3, \reg, r12, r14}

/*- Disable Interrupt and switch back in IRQ mode */
            mrs         r0, cpsr
            bic         r0, r0, #ARM_MODE_SYS
            orr         r0, r0, #I_BIT | ARM_MODE_IRQ
            msr         cpsr, r0

/*- Mark the End of Interrupt on the AIC */
            ldr         r0, =AIC_BASE
            str         r0, [r0, #AIC_EOICR]

/*- Restore SPSR_irq and r0 from IRQ stack */
            ldmia       sp!, {r0, r14}
            msr         spsr, r14

/*- Restore ajusted LR_irq from IRQ stack directly in the PC */
            ldmia       sp!, {pc}^

	    .endm